JPS605144B2 - power transfer device - Google Patents

power transfer device

Info

Publication number
JPS605144B2
JPS605144B2 JP4215980A JP4215980A JPS605144B2 JP S605144 B2 JPS605144 B2 JP S605144B2 JP 4215980 A JP4215980 A JP 4215980A JP 4215980 A JP4215980 A JP 4215980A JP S605144 B2 JPS605144 B2 JP S605144B2
Authority
JP
Japan
Prior art keywords
switch
power
line
power transfer
transfer device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4215980A
Other languages
Japanese (ja)
Other versions
JPS56141773A (en
Inventor
和雄 浜里
昭吾 臼田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP4215980A priority Critical patent/JPS605144B2/en
Publication of JPS56141773A publication Critical patent/JPS56141773A/en
Publication of JPS605144B2 publication Critical patent/JPS605144B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Description

【発明の詳細な説明】 本発明は電源から負荷に対し、負荷の条件如何にかかわ
らず一定の電力を転送する電力転送装置に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power transfer device that transfers constant power from a power source to a load regardless of load conditions.

従来、この種の電力転送装置としては、第1図の如く変
成器Tと、変成器Tの1次巻線TPへ直列に挿入され、
制御端子CTからのパルス信号Pにより所定の周期によ
ってオン・オフ動作を行なうスイッチSと、ダイオード
DおよびコンデンサCとからなる構成が採用されている
Conventionally, as shown in FIG. 1, this type of power transfer device is inserted in series with a transformer T and the primary winding TP of the transformer T.
A configuration consisting of a switch S, a diode D, and a capacitor C, which is turned on and off at a predetermined cycle by a pulse signal P from a control terminal CT, is adopted.

また、変成器Tの1次巻線TPと2次巻線Tsとの極性
関係は、ドットにより示すものとなっており、スイッチ
Sがオンとなって、電源Bからの電源入力を1次巻線T
Pへ与えたときに、2次巻線Tsのダイオード○側に負
極が生じ、このときにはダイオードDが非導通となる方
向として直列に挿入されているため、2次巻線Tsに電
流が通ぜず、変成器Tは1次巻線TPがィンダクタンス
として作用し、ここに電磁エネルギーとして電力が蓄積
される。
In addition, the polarity relationship between the primary winding TP and the secondary winding Ts of the transformer T is indicated by dots, and when the switch S is turned on, the power input from the power source B is transferred to the primary winding. Line T
When applied to P, a negative electrode is generated on the diode ○ side of the secondary winding Ts, and at this time, since the diode D is inserted in series in the non-conducting direction, current flows through the secondary winding Ts. First, the primary winding TP of the transformer T acts as an inductance, and electric power is stored here as electromagnetic energy.

ここで、1次巻線TPのィンダクタンスをL、スイッチ
Sのオン時間をton、電源Bの電圧をEとすれば、変
成器Tに蓄積される電力Pcは次式によって与えられる
Here, if the inductance of the primary winding TP is L, the on-time of the switch S is ton, and the voltage of the power source B is E, then the power Pc accumulated in the transformer T is given by the following equation.

PCi左・E2‐他・‐‐‐‐‐‐‐t11この電力P
cは、スイッチSがオフとなったときに、2次巻線Ts
の議起電圧がダイオードDに対し日頃方向となるため、
コンデンサC側へ放出され、これによって負荷LDに対
し電力が供給される。
PCi left・E2-other・------t11 This power P
c is the secondary winding Ts when the switch S is turned off.
Since the electromotive voltage of is in the normal direction with respect to diode D,
It is discharged to the capacitor C side, thereby supplying power to the load LD.

なお、負荷LD‘こ通ずる電流ILはコンデンサCの作
用により、リップル成分が除去され、直流となって流通
する。また、スイッチSがオン・オフを行なう周期の周
波数をfとすれば、1秒間に転送回路の出力側へ転送さ
れる電力Poutは次式のものとなる。
Note that the ripple component of the current IL flowing through the load LD' is removed by the action of the capacitor C, and the current IL flows as a direct current. Further, if the frequency of the period in which the switch S turns on and off is f, the power Pout transferred to the output side of the transfer circuit per second is expressed by the following equation.

Pout:歩‐E2‐■n2‐f‐‐‐‐‐‐‐‐‐【
21したがって、周波数fが一定であれば、常に一定の
電力Poutが出力側へ転送される。なお、スイッチS
のオフ時間をめffとすれば、f:1/■n+toH)
.・….・.・‘3}の関係が成立するため、{21式
は次式によっても表わすことができる。
Pout: Ayumu-E2-■n2-f-------[
21 Therefore, if the frequency f is constant, a constant power Pout is always transferred to the output side. In addition, switch S
If the off time is ff, then f:1/■n+toH)
..・….・..・Since the relationship '3} holds true, the equation {21] can also be expressed by the following equation.

・ Pout=車。・ Pout = car.

E2伽2‐■n+師‐‐‐.・‐.・・【4}しかし、
第1図の構成においては、電力を蓄積する1次巻線TP
と、電力を放出する2次巻線Tsとが別個なため、両巻
線TP,Ts間には密な電磁結合を要しトこれには良質
な変成器Tを用いねばならず「高価となる欠点を生じて
いた。本発明は、従来のかかる欠点を根本的に解決する
目的を有し、単なる塞流線輪を用いることにより、従来
と同等の機能を安価な構成によって実現する極めて合理
的な、電力転送装置を提供するものである。
E2 佽2-■n+ Teacher--.・-. ...[4} However,
In the configuration shown in Figure 1, the primary winding TP that stores power
Since the secondary winding Ts and the secondary winding Ts that emit power are separate, a close electromagnetic coupling is required between the two windings TP and Ts.For this, a high quality transformer T must be used, which is expensive and expensive. The present invention has the purpose of fundamentally solving these drawbacks of the conventional technology, and has an extremely rational structure that achieves the same function as the conventional method with an inexpensive structure by using a simple blocking wire. The present invention provides a power transfer device based on the above-mentioned characteristics.

以下、実施例を示す第2図じ非蜂により本発明の詳細を
説明する。
Hereinafter, the details of the present invention will be explained with reference to FIG. 2, which shows an embodiment.

第2図は、基本的な実施例を示す回路図であり、入力端
子1と出力端子3との間の電源回路へ直列に挿入された
塞流線論CLの入力側には、第1スイッチS,が挿入し
てあると共に、塞流線論CLの出力側には、入力端子翼
,2および出力端子3,4間における電源回路の両線間
に第2スイッチS2が挿入してあり、各スイッチS,,
S2は制御端子CTから与えられるパルス信号Pにより
、同時にオン・オフを行なうものとなっている。
FIG. 2 is a circuit diagram showing a basic embodiment, in which a first switch is connected to the input side of the blockage line logic CL inserted in series into the power supply circuit between the input terminal 1 and the output terminal 3. S, is inserted, and a second switch S2 is inserted between both lines of the power supply circuit between the input terminal blade 2 and the output terminals 3 and 4 on the output side of the flow line theory CL, Each switch S,,
S2 is turned on and off simultaneously by a pulse signal P applied from a control terminal CT.

このため、各スイッチS,,S2がオンのときには、電
源Bからの電源入力が「各スイッチS,,S2を介して
塞流線論CLへ与えられ、同線論CLのィンダクタンス
を1、各スイッチS,卑S2のオン時間をのnとすれば
、塞流線論CLには{1)式に示す電力Pcが蓄積され
る。また、各スイッチS.,S2がオフとなれば、塞流
線輪にLに蓄積された電力Pcは、塞流線論CLの入力
側かつ電源回路の両線間へ挿入された第1のダイオード
D,、および、墓流線論CLの出力側へ直列に挿入され
た第2のダイオードD2に対し順方向の起電力となり、
各ダイオードD,,D2を介して負荷LD側へ放出され
、電流ILを供給する。
Therefore, when each switch S, , S2 is on, the power input from power supply B is applied to the blockage line theory CL via each switch S, , S2, and the inductance of the same line theory CL is 1, If the ON time of each switch S, S2 is n, then the power Pc shown in equation {1) is accumulated in the flow line theory CL. Also, if each switch S., S2 is turned off, The power Pc accumulated in the flow line L is transferred to the first diode D inserted between the input side of the flow line CL and between both lines of the power supply circuit, and the output side of the flow line CL. A forward electromotive force is generated for the second diode D2 inserted in series with
It is discharged to the load LD side via each diode D, , D2, and supplies current IL.

なお、第1スイッチS,は、入力端子2と出力端子4と
の間の電源回路へ挿入してもよく、第3図のとおり、塞
流線論CLの挿入された一線とは反対側の他線へ挿入し
ても、第2図と同機の結果が得られる。第4図は、各ス
イッチS,?S2として、互に逆極性のトランジスタQ
,,Q2を用いた場合の回路図でありし この例ではト
ランジスタQ,側へインバータGIを挿入し、トランジ
スタQ,,Q2を同時にオン、オフさせており、このと
おりに構成すれば、トランジスタQ,,Q2のェミツタ
が、いずれも出力端子4へ接続されるため、出力端子4
側を基準電位としたパルス信号Pにより、トランジスタ
Q,,Q2を制御することが容易となる。
Note that the first switch S, may be inserted into the power supply circuit between the input terminal 2 and the output terminal 4, and as shown in FIG. Even if it is inserted into another line, the same results as in Figure 2 can be obtained. FIG. 4 shows each switch S, ? As S2, transistors Q with opposite polarity are used.
,,Q2 is used.In this example, an inverter GI is inserted into the transistor Q, and transistors Q,,Q2 are turned on and off at the same time.If configured as shown, the transistor Q ,, Q2 emitters are all connected to output terminal 4, so output terminal 4
The transistors Q, Q2 can be easily controlled by the pulse signal P having the side as a reference potential.

なお、パルス信号Pとしては、所定の周期によりオン。
オフ制御を行なうものであれば、任意のものが用いられ
、例えば、無安定マルチパイプレータ等の出力を用いる
ことができる。ただし、各スイッチS,,S2間の動作
応答時間差により、第1スイッチS,がオンの間に第2
スイッチS2がオフとなれば、負荷Loには、第2スイ
ッチS2のオフに応ずる姿流線論CLに蓄積された電力
の放出に伴なう電流ILのほかに、電源Bからの電流も
オンとなっている第1スイッチS,を介して通じ、常に
負荷LDに対し一定の電力を与える目的からは、誤差を
生じるものとなる。
Note that the pulse signal P is turned on at a predetermined period.
Any device can be used as long as it performs off control; for example, the output of an astable multipipulator or the like can be used. However, due to the operational response time difference between each switch S, , S2, while the first switch S, is on, the second switch
When the switch S2 is turned off, the load Lo receives the current IL from the power source B, in addition to the current IL associated with the release of the power accumulated in the flow line theory CL in response to the turning off of the second switch S2. If the purpose is to always supply a constant power to the load LD through the first switch S, which is the same as the first switch S, an error will occur.

第5図は、かかる誤差の発生を完全に阻止する場合の実
施例を示す回路図であり、各スイッチS,,S2に対し
各個別に制御端子CT,,CT2を設け、第6図に示す
関係のパルス信号P,,P2により、各スイッチS,,
S2を制御している。
FIG. 5 is a circuit diagram showing an embodiment in which the occurrence of such errors is completely prevented. Control terminals CT, CT2 are individually provided for each switch S, , S2, as shown in FIG. 6. Each switch S, , by the related pulse signal P, , P2
It controls S2.

すなわち、第1スイッチS,がオンとなる期間tcに対
し、余裕期間t小 ta2を付加したパルス信号P2に
より、第2スイッチS2をオンとすれば、余裕鞠問t幻
によって誤差の発生が阻止されると共に、電力蓄積期間
tc後の余裕期間ta2においては、第2スイッチS2
およびダイオードD,の回路により蓄積された電力が保
存され、この回路を無損失とすれ‘よ電力の消費がなく
、第2スイッチS2がオフとなる期間tsにおいて放出
されるため、誤差を生じない。したがって、各スイッチ
S,,S2を同時にオンとなる期間を設けて制御すれば
、本質的な目的は蓬せられるが、第6図のとおり、第1
スイッチS,がオンとなる期間を内包する関係として、
第2スイッチS2がオンとなる期間を定めることにより
、一定の電力を正確に負荷LDへ転送することができる
That is, if the second switch S2 is turned on by the pulse signal P2, which is obtained by adding a margin period tta2 to the period tc during which the first switch S is on, the occurrence of an error is prevented by the margin period t. At the same time, in the margin period ta2 after the power storage period tc, the second switch S2
The power accumulated by the circuit of the diodes D and D is stored, and if this circuit is made lossless, there is no power consumption and it is released during the period ts when the second switch S2 is off, so no errors occur. . Therefore, if the switches S, , S2 are controlled by setting a period in which they are simultaneously turned on, the essential purpose can be achieved, but as shown in FIG.
As a relationship that includes the period during which switch S is on,
By determining the period during which the second switch S2 is on, a certain amount of power can be accurately transferred to the load LD.

第7図は、第6図を示すパルス信号P,,P2を発生す
る回路の一例を示し、第7図図における各部の波形をタ
イムチャートとして第8図に示すとおり、パルス発生器
PGの出力aと、これを遅延回路DLにより遅延時間t
dだけ遅延した遅延出力bとをANDゲートG,へ与え
、その出力cを取り出せば、パルス信号P,が得られ、
出力aと遅延出力bとをORゲートG2へ与え、その出
力dを取り出せば、パルス信号P2が得られる。
FIG. 7 shows an example of a circuit that generates the pulse signals P, P2 shown in FIG. 6, and the output of the pulse generator PG is shown in FIG. a, and delay time t by delay circuit DL.
By applying the delayed output b delayed by d to the AND gate G, and taking out the output c, a pulse signal P is obtained,
By applying the output a and the delayed output b to the OR gate G2 and taking out the output d, a pulse signal P2 is obtained.

なお、各スイッチS,,S2としては、トランジスタQ
,,Q2のほか、各種のスイッチング素子を用いても同
様であると共に、第7図の構成も条件に応じた選定が任
意であり、本発明は種々の変形が自在である。
Note that each switch S, S2 is a transistor Q.
.

また、本発明の用途としては、一定の電力供給を必要と
する各種の回路を挙げることができるが、特に、交換機
における端末機器への電流供給回路へ適用すれば好適で
ある。
Further, the present invention can be applied to various circuits that require a constant supply of power, and is particularly suitable for application to a current supply circuit to terminal equipment in an exchange.

以上の説明により明らかなとおり本発明によれば、簡単
かつ安価な構成により一定の電力を転送することができ
るため、各種用途の電力転送において多大の効果が得ら
れる。
As is clear from the above description, according to the present invention, a constant amount of power can be transferred with a simple and inexpensive configuration, and therefore great effects can be obtained in power transfer for various uses.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の回路図、第2図以降は本発明の実施例
をを示し、第2図は基本的な回路図、第3図は第1スイ
ッチを塞流線輪と反対側の池線へ挿入した場合の回路図
、第4図は各スイッチにトランジスタを用いた場合の回
路図、第5図は正確に一定電力の転送を行なう場合の回
路図、第6図は第5図に用いるパルス信号の波形図、第
7図は第6図のパルス信号を発生する回路のブロック図
、第8図は第7図における各部の波形を示すタイムチャ
ートである。 1,2……入力端子、3,4……出力端子、CL・・・
・・・塞流線論、S.・・・・・・第1スイッチ、S2
・・・…第2スイッチo第1図 第2図 第3図 第4図 第5図 第6図 第7図 第8図
Fig. 1 is a circuit diagram of a conventional example, Fig. 2 and subsequent figures show embodiments of the present invention, Fig. 2 is a basic circuit diagram, and Fig. 3 shows the first switch on the side opposite to the blocking wire ring. Figure 4 is a circuit diagram when a transistor is used for each switch, Figure 5 is a circuit diagram when a constant power is transferred accurately, Figure 6 is a circuit diagram when it is inserted into a power line, and Figure 6 is a circuit diagram when a transistor is used for each switch. 7 is a block diagram of a circuit that generates the pulse signal of FIG. 6, and FIG. 8 is a time chart showing waveforms of various parts in FIG. 7. 1, 2...Input terminal, 3, 4...Output terminal, CL...
...Block line theory, S. ...First switch, S2
...Second switch o Fig. 1 Fig. 2 Fig. 3 Fig. 4 Fig. 5 Fig. 6 Fig. 7 Fig. 8

Claims (1)

【特許請求の範囲】 1 電源回路へ直列に挿入された塞流線輪と、前記電源
回路の入力側へ直列に挿入された転送電力に応じた周期
によりオン、オフを反復する第1スイツチと、前記塞流
線輪の出力側かつ前記電源回路の両線間へ挿入された前
記第1スイツチと同時にオンとなる期間を設けてオン、
オフを反復する第2スイツチと、前記第1スイツチおよ
び第2スイツチがオフとなったときの前記塞流線輪によ
る起電力に対し順方向として前記塞流線輪の入力側かつ
前記電源回路の両線間へ挿入された第1のダイオードと
、前記起電力に対し順方向として前記塞流線輪の出力側
へ直列に挿入された第2のダイオードとを備えたことを
特徴とする電力転送装置。 2 第1スイツチを塞流線輪の挿入された一線へ設けた
ことを特徴とする特許請求の範囲第1項記載の電力転送
装置。 3 第1スイツチを塞流線輪の挿入された一線とは反対
側の他線へ設けたことを特徴とする特許請求の範囲第1
項記載の電力転送装置。
[Scope of Claims] 1. A blockage wire inserted in series into a power supply circuit, and a first switch which is inserted in series into an input side of the power supply circuit and repeatedly turns on and off at a cycle according to the transferred power. , providing a period in which the first switch inserted into the output side of the blocking wire ring and between both lines of the power supply circuit is turned on at the same time;
a second switch that is repeatedly turned off; A power transfer characterized by comprising a first diode inserted between both lines, and a second diode inserted in series to the output side of the blocking coil in the forward direction with respect to the electromotive force. Device. 2. The power transfer device according to claim 1, wherein the first switch is provided on the line into which the blocking wire is inserted. 3. Claim 1, characterized in that the first switch is provided on the other line on the opposite side to the one line in which the blocking line is inserted.
The power transfer device described in Section 1.
JP4215980A 1980-04-01 1980-04-01 power transfer device Expired JPS605144B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4215980A JPS605144B2 (en) 1980-04-01 1980-04-01 power transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4215980A JPS605144B2 (en) 1980-04-01 1980-04-01 power transfer device

Publications (2)

Publication Number Publication Date
JPS56141773A JPS56141773A (en) 1981-11-05
JPS605144B2 true JPS605144B2 (en) 1985-02-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP4215980A Expired JPS605144B2 (en) 1980-04-01 1980-04-01 power transfer device

Country Status (1)

Country Link
JP (1) JPS605144B2 (en)

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USRE36098E (en) * 1982-02-04 1999-02-16 Vlt Corporation Optimal resetting of the transformer's core in single-ended forward converters
JPS60215222A (en) * 1984-04-11 1985-10-28 Fuji Photo Film Co Ltd Dc power supply circuit
IT1225633B (en) * 1988-11-30 1990-11-22 Sgs Thomson Microelectronics PROTECTION FROM NETWORK TRANSITORS.
EP0723331B1 (en) 1995-01-17 2003-05-07 Vlt Corporation Control of stored magnetic energy in power converter transformers
TWI353102B (en) 2006-06-16 2011-11-21 Fujitsu Semiconductor Ltd Step-up/step-down type dc-dc converter, and contro

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