JPS6043928A - Automatic frequency distortion compensating device - Google Patents

Automatic frequency distortion compensating device

Info

Publication number
JPS6043928A
JPS6043928A JP15177483A JP15177483A JPS6043928A JP S6043928 A JPS6043928 A JP S6043928A JP 15177483 A JP15177483 A JP 15177483A JP 15177483 A JP15177483 A JP 15177483A JP S6043928 A JPS6043928 A JP S6043928A
Authority
JP
Japan
Prior art keywords
circuit
transmission
wave
phi
dcc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15177483A
Other languages
Japanese (ja)
Inventor
Sadao Takenaka
竹中 貞夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15177483A priority Critical patent/JPS6043928A/en
Publication of JPS6043928A publication Critical patent/JPS6043928A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/005Control of transmission; Equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To compensate automatically transmission distortion by inserting the transmission distortion produced on a transmission line due to multi-path fading to a receiver having a specific transmission characteristic. CONSTITUTION:A transmission distortion compensating circuit DCC-2 consists of hybrid circuits H-3, H-4, circuit rho having the vibrating ratio rho between a direct wave and an interference wave, circuit tau having a time difference tau between the direct wave and the interference wave, and a circuit phi producing a phase difference phi. Then a feedback loop is constituted via a control section CONT-2. The transmission distortion is compensated automatically by using the feedback loop by reducing the transmission characteristic of the circuit DCC-2 to Hc(omega)=1/ (1+rhoexp-j(omegatau+phi)).

Description

【発明の詳細な説明】 [a) 発明の技術分野 本発明は周波数歪補償装置に係り、特に多値ディジタル
無線装置に適用する伝搬歪補償装置に関するものである
DETAILED DESCRIPTION OF THE INVENTION [a) Technical Field of the Invention The present invention relates to a frequency distortion compensator, and particularly to a propagation distortion compensator applied to a multilevel digital radio device.

(+))従来技術と問題点 茜速のディンタル信号をディジタル無線装置で相手局に
送る際シ(、直接波と伝搬路の状態に依って発生した干
渉イ反とが同時に相手局受信機に加わり、第2図tal
に示す様に受信レベルにティップを生ずる事がある。
(+)) Conventional technology and problems When sending a digital radio signal at a diagonal speed to the other station using a digital wireless device, the direct wave and the interference generated depending on the propagation path condition are simultaneously transmitted to the receiver of the other station. Join, Figure 2 tal
As shown in the figure, a tip may occur in the reception level.

この様なマルチパス・フェージングVこ依る周波数歪は
、例えば2相又は4相PSK(Phase Shift
Keying)波に対しては余り問題にならないが、1
6幼直交娠幅変調波の様な多値の変調波に対しては非常
に大きな影響を与え回線品質が低下する。
Frequency distortion caused by such multipath fading V is caused by, for example, two-phase or four-phase PSK (Phase Shift
Keying) It is not a problem for waves, but 1
This has a very large effect on multi-level modulated waves such as 6-fold orthogonal width modulated waves, and the line quality deteriorates.

第1図は従来の伝搬歪補償方法を実施する為の概略のブ
ロック接続図で、第2図は第1図のブロック接続図の動
作を説明する為の図である。
FIG. 1 is a schematic block connection diagram for implementing a conventional propagation distortion compensation method, and FIG. 2 is a diagram for explaining the operation of the block connection diagram of FIG. 1.

そこで、第2図を参照しながら第1図の動作を時、明す
る。
The operation shown in FIG. 1 will now be explained with reference to FIG.

先ず、第2図+a+に示す様なマルチパス・フェージン
グに依って生じたディップのある受信波は受信機(図示
せず)に加えられ、増幅9周波数変換等の後筒1図に示
す伝搬歪補償回路DCC−1に加えられる1、 この回路は直列接A4tされた増幅器A−1とA−2と
の接続点とアースとの間に、コンデンサC及び線輪りか
ら構成された並列共振回路を挿入12だもので、周波数
特性は第2図(1)(に示す様に第2図(alに示した
形の逆になっている。
First, a received wave with a dip caused by multipath fading as shown in Figure 2+a+ is applied to a receiver (not shown), and the propagation distortion shown in Figure 1 is applied to the rear cylinder such as amplification 9 and frequency conversion. 1 added to the compensation circuit DCC-1. This circuit is a parallel resonant circuit consisting of a capacitor C and a wire ring, which is connected between the connection point of the series-connected amplifiers A-1 and A-2 and the ground. 12, the frequency characteristics are the opposite of the shape shown in FIG. 2 (al), as shown in FIG. 2 (1).

又、第2図(alのディップの形状及び中心周波数f−
0に、第1図に示した並列共振回路のQ及び共振周波数
を一致させる為に、増幅器A−2の出力信号の一部を)
l+Ii御部C0NT−4に加え、この制御部C0NT
−1からのt[’l!御信号で可変抵抗器R及び可変コ
ンダンサCの値を変え、これを行っている。
In addition, Fig. 2 (shape of the dip of al and center frequency f-
0, in order to match the Q and resonant frequency of the parallel resonant circuit shown in Figure 1, a part of the output signal of amplifier A-2)
In addition to l+Ii control unit C0NT-4, this control unit C0NT
t['l! from -1 This is done by changing the values of the variable resistor R and variable capacitor C using a control signal.

しかし、急峻なディップを生ずる深いフェージングによ
る伝搬歪を補償する為には、前記の並列共振器のQを大
きくしなければならないが、このことは第2図(b)に
示す様に必然的に挿入損失りが大きくなり、又共振器の
共振特性の非対象の為に完全には補償することが出来ず
、第2図fc)に示す様に等化残差が残り符号誤り率が
悪化する等の問題があった。
However, in order to compensate for the propagation distortion due to deep fading that causes steep dips, the Q of the parallel resonator must be increased, which inevitably results in The insertion loss increases, and due to the asymmetric resonance characteristics of the resonator, it cannot be completely compensated, and as shown in Figure 2 fc), an equalization residual remains and the bit error rate worsens. There were other problems.

(C1発明の目的 本発明は上記従来技術の問題に鑑みなされたものであっ
て、伝搬路にマルチパス・フェージングが発生しても回
線品質を劣化させない為の伝搬歪補償方法を提供する事
を目的としている。
(C1 Purpose of the Invention The present invention has been made in view of the above-mentioned problems of the prior art.It is an object of the present invention to provide a propagation distortion compensation method for preventing line quality from deteriorating even if multipath fading occurs in a propagation path. The purpose is

fdl 発明の構成 上記発明の目的は、マルチパス・フェージングに依って
伝搬路に生じた伝搬歪を −j(ωτ+φ) He(ω)=1/(1+ρe ) なる伝送特性を有する回路を受信機に挿入して該1; 伝搬歪全自動的補償することを特徴とする伝搬歪補償装
置を提供する事に依り達成される。
fdl Structure of the Invention The object of the above invention is to provide a receiver with a circuit having transmission characteristics such as -j(ωτ+φ) He(ω)=1/(1+ρe) to reduce the propagation distortion caused in the propagation path due to multipath fading. This is achieved by providing a propagation distortion compensator characterized by fully automatically compensating propagation distortion.

(el 発明の実施例 第3図はマルチパス117エージングの等価回路の図で
ある。
Embodiment of the Invention FIG. 3 is a diagram of an equivalent circuit of multipath 117 aging.

図中、ρは直接波と干渉波の振幅比がρとなる回路を、
τは直接波及び干渉波の伝搬路の時間差がτとなる回路
を、φは位相差φを与える回路を、H−1及びH−2は
それぞれハイブリッド回路を、1は入力端子を、2は出
力端子をそれぞれ示す。
In the figure, ρ is the circuit where the amplitude ratio of the direct wave and interference wave is ρ,
τ is a circuit where the time difference between the propagation paths of direct waves and interference waves is τ, φ is a circuit that provides a phase difference φ, H-1 and H-2 are hybrid circuits, 1 is an input terminal, and 2 is a circuit that provides a phase difference φ. The output terminals are shown respectively.

第3図に於て、入力端子1に加えられた波はハイプリ、
ド回路H−1で径路のを通る振幅1の直接波と径路■を
通る振幅1の干渉波に分かれる。
In Figure 3, the wave applied to input terminal 1 is Hypuri,
The signal is divided into a direct wave with an amplitude of 1 passing through the path 1 and an interference wave with an amplitude 1 passing through the path 2 in the path H-1.

直接波はそのまま進んでハイブリ、ド回路H−2に加え
られる。一方、径路■に進んだ干渉波は回路ρで振幅が
ρに、回路τで直接波との時間差がτに、回路φで位相
差がφになる様に変化を受けた後ハイブリッド回路H−
2に加えられる ここで加算された直接波と干渉波は出
力波として出力端子2から取り出される。
The direct wave continues as it is and is added to the hybrid circuit H-2. On the other hand, the interference wave that has proceeded to the path ■ undergoes changes such that the amplitude becomes ρ in the circuit ρ, the time difference with the direct wave becomes τ in the circuit τ, and the phase difference becomes φ in the circuit φ, and then the hybrid circuit H-
The direct wave and interference wave added here are taken out from the output terminal 2 as output waves.

この出力波Yは次の様に表される。This output wave Y is expressed as follows.

−Nωτ+φ) y=x+xρe ここで、査1項は直接波を、第2号は干渉波を示す。-Nωτ+φ) y=x+xρe Here, the first term indicates a direct wave, and the second term indicates an interference wave.

従って、この等価回路の伝送特性H−1(ω)は次の様
になる。
Therefore, the transmission characteristic H-1(ω) of this equivalent circuit is as follows.

−j(ωτ+φ) H−1(ω)=X/Y=1+ρe 即ち、この伝送特性H−1(ω)はフェージング特性を
示し、これと全く逆の伝送特性を有する回路全受信機に
挿入すれば、この7エージング特性を完全に補償する事
ができその影#をなくす事が出来る。
-j(ωτ+φ) H-1(ω)=X/Y=1+ρe In other words, this transmission characteristic H-1(ω) exhibits a fading characteristic, and a circuit with completely opposite transmission characteristics should be inserted into all receivers. If so, this aging characteristic can be completely compensated for and its shadow can be eliminated.

従りて、伝搬歪補償回路の伝送特性は下記の式%式% ) (1) ここで、ρを変える事によりフェージングの深さくディ
ップ)ヲ、φtl−変える事により前記ディップの位置
をそれぞれ独立VC補償する事ができる。
Therefore, the transmission characteristics of the propagation distortion compensation circuit are expressed by the following formula. VC compensation can be provided.

又、τは伝搬路の平均行路差長に設定する。Further, τ is set to the average path difference length of the propagation path.

第4図は本発明を実施する為のブロック接続図である。FIG. 4 is a block connection diagram for implementing the present invention.

図中、■−3及びH−4はハイブリッド回路を、DCC
−2は伝搬歪補償回路を、C0NT−2は制御部をそれ
ぞれ示す。
In the figure, ■-3 and H-4 are hybrid circuits, DCC
-2 indicates a propagation distortion compensation circuit, and C0NT-2 indicates a control section.

尚2g3図と同じ記号は同じ部分を表す、1この回路は
伝搬歪補償回路DCC−2と1tll制御部C0NT−
2から構成され、前者の回路DCC−2の伝送特性を(
1)式に示した伝送特性と同じにする為にこの回路は帰
還ループを形成している。
Note that the same symbols as in Figures 2g and 3 represent the same parts.1 This circuit includes the propagation distortion compensation circuit DCC-2 and the 1tll control unit C0NT-.
2, and the transmission characteristics of the former circuit DCC-2 are expressed as (
This circuit forms a feedback loop in order to make the transmission characteristics the same as shown in equation 1).

尚、ρ〉1の場合はこの系が発振するのでρ〉1でなけ
ればならない。又、出力信号はハイブリッド4の出力に
限らず、移相器φ、減衰器ζ、ハイブリット3のいずれ
の出力から取り出しても構わない。又ρ、φ、τの部分
はそれぞれ可変減衰器、フェイズシフター、遅延線路で
構成する事が出来、この伝搬歪補償回路は例えば受信機
の中間周波増幅機と復調器との間に挿入する。
Note that if ρ>1, this system will oscillate, so it must be ρ>1. Further, the output signal is not limited to the output of the hybrid 4, and may be extracted from any of the outputs of the phase shifter φ, the attenuator ζ, and the hybrid 3. Further, the ρ, φ, and τ portions can each be configured with a variable attenuator, a phase shifter, and a delay line, and this propagation distortion compensation circuit is inserted, for example, between the intermediate frequency amplifier and demodulator of the receiver.

第5図は第4図に示した伝搬歪補正回路DCC−2の性
能を示した図で、第5図falはこの回路の周波数特性
を、第5図(())は伝搬歪を補償した後の受信波の周
波数特性をそれぞれ示す。
Fig. 5 is a diagram showing the performance of the propagation distortion correction circuit DCC-2 shown in Fig. 4. Fig. 5 fal shows the frequency characteristics of this circuit, and Fig. 5 (()) shows the performance of the propagation distortion correction circuit DCC-2. The frequency characteristics of the subsequent received waves are shown respectively.

第6図は第5図(1))に示す様に伝搬歪を完全に補償
する為のft1lj御部C0NT−2の制御方法を説明
する為の図である。
FIG. 6 is a diagram for explaining a control method of the ft1lj controller C0NT-2 to completely compensate for propagation distortion as shown in FIG. 5(1)).

一般に、ディジタル信号で変調された変調波のスペクト
ラムを成る時間かけて見ると、第6図181の様に上面
が平坦な形をしている。
Generally, when looking at the spectrum of a modulated wave modulated by a digital signal over time, it has a flat top surface as shown at 181 in FIG.

そこで、同図に示す様にスペクトラムの中心と両側の周
波数f−2,f−1とf−3付近のエネルギーを、特性
が全く同じ狭帯域ろ波器で抽出すると抽出された電力は
全て同−知なっている。
Therefore, as shown in the figure, if the energy around frequencies f-2, f-1, and f-3 on both sides of the spectrum is extracted using a narrow band filter with exactly the same characteristics, the extracted power will all be the same. -I know.

今、伝搬歪が加えられると第6図181に示した波形が
歪み、それに対応した電力が抽出される。
Now, when propagation distortion is applied, the waveform shown in FIG. 6 181 is distorted, and the corresponding power is extracted.

例えば、第6図(blの様な電力が得られたとすると、
これからf−1とf−3の点で抽出した電力を比較する
と、f−3の方が電力が大きいので中心周波数はf−2
より左によっている事が分ねこれを右に寄せる必要があ
る。
For example, if the power shown in Figure 6 (bl) is obtained,
Comparing the power extracted at points f-1 and f-3, the power at f-3 is greater, so the center frequency is f-2.
I understand that it is more to the left, so I need to move it to the right.

又ディップの大きさは(f−1)+ (f−3)/2の
電力とf−2の電力の差だからディップを0にするには
Qを大きくする必要がある。
Also, since the magnitude of the dip is the difference between the power of (f-1)+(f-3)/2 and the power of f-2, it is necessary to increase Q to make the dip zero.

そこで制御すべき方向が決ったのでf−1゜f−2,f
−3の各電力が等しくなる様にρ、φの部分を制御する
Since the direction to be controlled has been decided, f-1゜f-2, f
The parts of ρ and φ are controlled so that the respective powers of -3 are equal.

ffl 発明の詳細 な説明した様に、本発明に依れば(1)式に示す伝送特
性を有する回路を受信機に挿入する事に依す、ヤルチパ
ス・フェージングに依る伝搬歪を完全に補償する事が出
来るのでディジタル伝送回線の品質低下を防止する事が
できる。
ffl As described in detail, according to the present invention, propagation distortion caused by half-path fading can be completely compensated for by inserting a circuit having the transmission characteristics shown in equation (1) into the receiver. This makes it possible to prevent the quality of digital transmission lines from deteriorating.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は伝搬歪補償方法を実施する為の従来のプロ、り
接続図を、第2図は第1図の機能を説明する為の図を、
第3図はマルチパス・フェージングの等何回路を、第4
図は本発明′fc夾施する為のブロック接続図を、第5
図は第4図の性能を示した図を、第6図は第4図に示し
た制御部の制御方法を説明する為の図をそれぞれ示す。 図中、ρは振幅比がρとなる回路を、τは直接波及び干
渉波の伝搬路の時間差がτとなる回路を、φは位相差φ
を与える回路をそれぞれ示す。 把t′f/J r−−一一−−−−−−−−−−−−イDCC−/?−
2因 (b) (C) (d) 寮3酊 / 峯4噌 来5閲 峯り圀 チーl た2 t−3呵41父 ブー/ f−2f−3ヨP皮涛り 丁続補 11:、書(自発) 昭和 で+jf ll 59.8.29 111′例11J25゛ 旬 昌、1′1貯j1 :A
i /!r−/ 77t/ ど1 1山 11 ′1 
」 ・J と 11’l ’内閉(111,1,′j1j11漕「]人
111す1 神令用県川崎11川り1;を区j/j・1
11中1015Z地(522) )’、(:+富1:通
株式会社・1 代 jψ )、 1]1す1 神4<1
11.l川崎山中ハ;ilX: l−小111中101
5番地富1:通株式会社内 昭fll Fl’ II IIなL (1)明細書第3頁第12行の[挿入損失LJを「挿入
損失l」と補正する。 (2)明細書第6頁第20行乃至第7頁1行の[尚、ρ
〉1・・・・ならない。」を以下のように補正する。 「尚、ρ〉lの場合は、この系が発振するのでρくlで
なければならない。」 (3)明細書第7頁第2行の「減衰器ζ」を「減衰器ρ
」と補正する。 (4)図面第2図を別紙の如く補正する。 第2図 (aン (b) (C) た1
Figure 1 is a conventional professional connection diagram for implementing the propagation distortion compensation method, and Figure 2 is a diagram for explaining the function of Figure 1.
Figure 3 shows how many circuits with multipath fading are used.
Figure 5 shows a block connection diagram for implementing the present invention'fc.
This figure shows the performance of FIG. 4, and FIG. 6 shows a diagram for explaining the control method of the control section shown in FIG. 4. In the figure, ρ is a circuit where the amplitude ratio is ρ, τ is a circuit where the time difference between the propagation paths of the direct wave and interference wave is τ, and φ is the phase difference φ
The circuits that give each are shown. t'f/J r--11------------I DCC-/? −
2 causes (b) (C) (d) Dormitory 3 drunkenness / Mine 4 噌rai 5 Viewing mine ri kuni chil ta 2 t-3 呵 41 Father Boo / f-2 f-3 YoP skin tumble ding continuation supplement 11 :, calligraphy (spontaneous) Showa era +jf ll 59.8.29 111'Example 11J25゛ Shun Masa, 1'1 storage j1 :A
i/! r-/ 77t/ Do 1 1 mountain 11 '1
・J and 11'l' inner closure (111,1,'j1j11 row ``]person 111s1 Jinreiyoken Kawasaki 11kawari 1; ward j/j・1
11 out of 1015Z land (522) )', (: + wealth 1: Tsu Co., Ltd. 1st generation jψ), 1] 1su 1 God 4 < 1
11. l Kawasaki Yamanaka HA; ilX: l-Elementary School 111 Junior High School 101
No. 5 Tomi 1: Uchiaki Uchiaki Co., Ltd. Fl' II II L (1) Insertion loss LJ on page 3, line 12 of the specification is corrected to "insertion loss l." (2) [In addition, ρ
〉1...No. ” is corrected as follows. "If ρ>l, this system will oscillate, so it must be ρ<l." (3) "Attenuator ζ" on page 7, line 2 of the specification should be replaced with "attenuator ρ
” he corrected. (4) Revise Figure 2 of the drawing as shown in the attached sheet. Figure 2 (a) (b) (C) ta1

Claims (1)

【特許請求の範囲】 周波数怜を受けた受信入力信号を遅延回路可変と 移相器及び可変減衰器を通して受信入力信萼宜加える手
段と、合成後の出力信号のスペクトラムが所定のスペク
トラムになる様に可変減衰器及び可変移相器を自動的に
制御する手段とからなる事を特徴とする自動周波数歪補
償装置。
[Claims] Means for appropriately adding a received input signal subjected to frequency adjustment to the received input signal through a variable delay circuit, a phase shifter, and a variable attenuator, and so that the spectrum of the output signal after synthesis becomes a predetermined spectrum. and means for automatically controlling a variable attenuator and a variable phase shifter.
JP15177483A 1983-08-20 1983-08-20 Automatic frequency distortion compensating device Pending JPS6043928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15177483A JPS6043928A (en) 1983-08-20 1983-08-20 Automatic frequency distortion compensating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15177483A JPS6043928A (en) 1983-08-20 1983-08-20 Automatic frequency distortion compensating device

Publications (1)

Publication Number Publication Date
JPS6043928A true JPS6043928A (en) 1985-03-08

Family

ID=15526000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15177483A Pending JPS6043928A (en) 1983-08-20 1983-08-20 Automatic frequency distortion compensating device

Country Status (1)

Country Link
JP (1) JPS6043928A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5564447A (en) * 1978-11-08 1980-05-15 Nippon Telegr & Teleph Corp <Ntt> Digital signal transmission system
JPS55102935A (en) * 1979-01-31 1980-08-06 Nec Corp System and device for amplitude equalization
JPS561634A (en) * 1979-06-20 1981-01-09 Nec Corp Equalizer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5564447A (en) * 1978-11-08 1980-05-15 Nippon Telegr & Teleph Corp <Ntt> Digital signal transmission system
JPS55102935A (en) * 1979-01-31 1980-08-06 Nec Corp System and device for amplitude equalization
JPS561634A (en) * 1979-06-20 1981-01-09 Nec Corp Equalizer

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