JPS6043852A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPS6043852A JPS6043852A JP15130783A JP15130783A JPS6043852A JP S6043852 A JPS6043852 A JP S6043852A JP 15130783 A JP15130783 A JP 15130783A JP 15130783 A JP15130783 A JP 15130783A JP S6043852 A JPS6043852 A JP S6043852A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- vdd
- output voltage
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/577—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices for plural loads
Abstract
Description
【発明の詳細な説明】 本発明ぽMUS集積回路九関するものである。[Detailed description of the invention] The present invention relates to a PoMUS integrated circuit.
一般rc M、 (J S集積回路に広い動作範囲を有
するものが理想とされるが実際VCは内部テバイスの能
力やその他の影響等により動作範囲は、ある一定範囲に
制限される。動作範囲は大さく動作電圧範囲と動作温度
範囲に分けられるがいずれも電源電圧変動や温度変動に
より内部デバイスの能力低下を生じる為に動作範囲が制
限されるものである。この内部デバイスの能力低下に電
源電圧と温度とに別々に作用する為、MU8集積回路設
計時九ニ、目標の動作電圧範囲と動作温度範囲を確保す
る為に動作上一番厳しい電源電圧と温度でマージンを持
って動作するように設計を行なっている。しかしながら
上述の様な設計でに動作電圧範囲や動作温度範囲が広範
囲ICなると一番厳しい条件で設計を行なっている為定
常の使用状態では内部回路はかなり余裕を持って動作し
ておりオーバーマージンの設計となりやすくムダが多く
なVチック”サイズの増大につながるという欠点があっ
た。General rc M, (J S It is ideal for an integrated circuit to have a wide operating range, but in reality, the operating range of VC is limited to a certain range due to the capabilities of internal devices and other influences. The operating range can be roughly divided into operating voltage range and operating temperature range, but in both cases, the operating range is limited because internal device performance decreases due to power supply voltage fluctuations and temperature fluctuations. When designing the MU8 integrated circuit, it is important to ensure that the MU8 integrated circuit operates with a margin at the most severe power supply voltage and temperature to ensure the target operating voltage range and operating temperature range. However, in the case of an IC with a wide operating voltage range and operating temperature range, as described above, the IC is designed under the most severe conditions, so the internal circuits operate with considerable margin under normal usage conditions. This has the disadvantage that it tends to result in an over-margin design, which leads to an increase in the V-tick size with a lot of waste.
本発明は上述の点にかえりみ、オーバーマージンの設計
にならずに広い動作範囲會有するM(JS集積回路を提
供するものであり、外部からの供給電圧を昇圧する電圧
昇圧回路、前記電圧昇圧回路の出力電圧全安定化する定
電圧回路、前記定電圧回路の出力電圧で駆動される内部
回路?有し、前記定電圧回路が内部回路の動作温度特注
を補償するような出力電圧温度特上を有する事を特徴と
するMO8集積回路全提供するものである。The present invention has been made in consideration of the above-mentioned points, and provides an M (JS integrated circuit) having a wide operating range without over-margin design. It has a constant voltage circuit that fully stabilizes the output voltage of the constant voltage circuit, and an internal circuit that is driven by the output voltage of the constant voltage circuit, and the constant voltage circuit has a special output voltage temperature increase that compensates for the custom operating temperature of the internal circuit. The present invention provides an entire MO8 integrated circuit featuring:
以下vc笑施例を示し本発明の詳細な説fiAする。Hereinafter, a detailed explanation of the present invention will be given with reference to examples.
第1図は本発明の実施例を指すブロック図であるlは外
部からの′電源の入力端子2は電圧昇圧回路3は電圧昇
圧回路2の出力電圧を安定化する定電圧回路、4に内部
回路テロvcpυ、ROM、 RAM、レジスタ等で構
成されている。第2図は各回路の出力電圧変化を示した
ものである。Aは外部からの電源音入力Tる入力端子l
の電圧波形、Bは電圧昇圧回路2の出力電圧波形eH定
電圧回路3の出力電圧波形である。まず1゛lの状態で
に入力端子1の電圧UVDDであり、電圧昇圧回路が今
2倍の昇圧gヒを有していると、電圧昇圧回路2の電圧
は21Voi〕となり、定電圧回路3の出力電圧Vn6
はvDD、cり多少低い電圧になる様に設定しておき、
温度上昇と共に出力電圧が上昇する様足温度勾配を持た
せてあり、この定電圧回路3の出力電圧で内部回路4に
駆動される。内部回路4は常温でば定′亀圧回路3の出
力電圧VDDの時に最も動作特注か良好になる様に設計
されている0この様に外部からの供給電圧がVDDの時
は、内部回路に最良の動作特注を有する電源電圧VDD
で駆動さhておジ動作%注は良好である。次にT2の状
態に外部からの供給電圧がVDDから最低動作電圧のV
2 VDDVc’変動した時であるが、この時に電圧昇
圧回路2の出力電圧t’!VDDとなり定電圧回路の安
定化電圧範囲の下限2■nDとVDDの間の電圧とする
と、電圧昇圧回路2の出力電圧VDDtff定電圧回路
3にエフVDDに定電圧化され内部回路4はT1の状態
と同様xVnaで駆動される為外部からの供給電圧がV
2に低下したにもかかわらず動作特注は良好である。外
部からの供給電圧が上昇した場合屹も上述の理由rcよ
り内部回路1qVapで駆動され動E′V−特注に影響
は無い。次に温度変wJに対する影響?考えてみる。外
部からの供給電圧は最低動作電圧の’2 VDDとする
と常温でに定電圧回路3の出力電圧ばVDDであるが温
度が上昇すると内部回路テロ収している内部デバイス(
MO8トランジスタラは通常の使用電圧VpprCおい
て能力の低下を生ずる為に普通は動作特注が悪化するが
、本発明では定電圧回路3の出力電圧VDDが内部回路
の動作特注の悪化を補償する様に増加する為に内部デバ
イスの能力低下は起こらず動作特注も良好なままである
0逆に温度が低下した時は、内部デバイスの能力に同上
するが定電圧回路3の出力電圧VDDが低下し、全体と
しての動作%註ハ同様vc、変化せず広い温度範囲で動
作%注が良好となる。なお上述の回路状態でに電圧昇圧
回路2だけに外部からの供給電圧で動作する事になるが
、電圧昇圧回路2に内部回路に比較してずっと低い周波
数で動作している為かなり低い電圧まで動作可能な様に
設計する事は容易でありチップサイズ的VCもほとんど
影響を与えない。以上の様に本発明l′c工れば広い動
作範囲にもかかわらず内部回路はVDDという一定電圧
で動作するように設計すればよく非常に効率よ<MUS
集積回路の設計が可能で同一動作範囲であればチップサ
イズの小さなMO8集積回路全設計する事ができる。FIG. 1 is a block diagram showing an embodiment of the present invention. l is an input terminal of an external power supply; 2 is a voltage booster; 3 is a constant voltage circuit that stabilizes the output voltage of the voltage booster; 4 is an internal It consists of circuit terrorism vcpυ, ROM, RAM, registers, etc. FIG. 2 shows changes in output voltage of each circuit. A is the input terminal for external power sound input.
B is the output voltage waveform of the voltage booster circuit 2; and B is the output voltage waveform of the constant voltage circuit 3. First, if the voltage at the input terminal 1 is UVDD in the state of 1゛l, and the voltage booster circuit now has twice the boost ghi, then the voltage of the voltage booster circuit 2 becomes 21Voi], and the voltage at the constant voltage circuit 3 output voltage Vn6
Set it so that the voltage is a little lower than vDD and c,
A temperature gradient is provided so that the output voltage increases as the temperature rises, and the internal circuit 4 is driven by the output voltage of the constant voltage circuit 3. The internal circuit 4 is designed to operate best when the output voltage of the voltage circuit 3 is VDD, which is constant at room temperature.In this way, when the external supply voltage is VDD, the internal circuit Power supply voltage VDD with best working customization
The performance is good when driven by h. Next, in the state of T2, the external supply voltage is changed from VDD to the lowest operating voltage V
2 VDDVc' fluctuates, but at this time the output voltage t' of the voltage booster circuit 2! If the voltage is between the lower limit of the stabilized voltage range of the constant voltage circuit 2■nD and VDD, the output voltage of the voltage booster circuit 2 is set to VDDtff, and the voltage of the constant voltage circuit 3 is regulated to VDD, and the internal circuit 4 is As in the state, it is driven by xVna, so the external supply voltage is V.
Even though it has dropped to 2, the operation customization is good. Even if the supply voltage from the outside increases, it will be driven by the internal circuit 1qVap for the reason rc mentioned above, and there will be no effect on the dynamic E'V-custom order. Next, the effect on temperature change wJ? I'll think about it. Assuming that the external supply voltage is 2 VDD, which is the minimum operating voltage, the output voltage of the constant voltage circuit 3 is VDD at room temperature, but as the temperature rises, the internal devices (with internal circuit terrorism)
MO8 transistors normally suffer from deterioration in performance due to a drop in performance at the normal operating voltage VpprC, but in the present invention, the output voltage VDD of the constant voltage circuit 3 compensates for the deterioration in the performance customization of the internal circuit. As the temperature increases, the performance of the internal devices does not decrease and the special order operation remains good.On the other hand, when the temperature decreases, the output voltage VDD of the constant voltage circuit 3 decreases, although the internal device performance decreases. As with the overall operating percentage, vc does not change and the operating percentage is good over a wide temperature range. Note that in the circuit state described above, only the voltage booster circuit 2 will operate with the voltage supplied from the outside, but since the voltage booster circuit 2 operates at a much lower frequency than the internal circuit, it can reach a considerably lower voltage. It is easy to design it to be operable, and the chip size VC has almost no effect. As described above, if the present invention is implemented, the internal circuit can be designed to operate at a constant voltage of VDD despite the wide operating range, and the efficiency is very high.
It is possible to design an integrated circuit, and if the operating range is the same, it is possible to design all MO8 integrated circuits with a small chip size.
Claims (1)
昇圧回路の出方電圧を安定化する定電圧回路、前記定電
圧回路の出方電圧で駆wJされる内部(ロ)路全有し、
前記定電圧回路が内部回路の動作温度特注を補償するよ
うな出力電圧温度%註全有すること全特徴とする集積回
路。It has a voltage booster circuit that boosts the voltage supplied from the outside, a constant voltage circuit that stabilizes the output voltage of the voltage booster circuit, and an internal (b) circuit that is driven by the output voltage of the constant voltage circuit,
An integrated circuit characterized in that said constant voltage circuit has an output voltage temperature range such as to compensate for the operating temperature customization of internal circuitry.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15130783A JPS6043852A (en) | 1983-08-19 | 1983-08-19 | Integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15130783A JPS6043852A (en) | 1983-08-19 | 1983-08-19 | Integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6043852A true JPS6043852A (en) | 1985-03-08 |
Family
ID=15515796
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15130783A Pending JPS6043852A (en) | 1983-08-19 | 1983-08-19 | Integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6043852A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5481210A (en) * | 1993-11-26 | 1996-01-02 | Temic Telefunken Microelectronic Gmbh | Method for controlling clock frequency of a digital logic semiconductor according to temperature |
-
1983
- 1983-08-19 JP JP15130783A patent/JPS6043852A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5481210A (en) * | 1993-11-26 | 1996-01-02 | Temic Telefunken Microelectronic Gmbh | Method for controlling clock frequency of a digital logic semiconductor according to temperature |
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