JPS604304Y2 - Information recording medium playback device - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an information recording medium reproducing device, in which, for example, a signal converter (stylus) for picking up a video signal from an information recording medium on which a video signal is recorded is placed on the recording medium. The relative velocity between the recording medium and the needle is quickly set to a predetermined steady relative velocity from the moment the needle is placed on the recording medium, so that a substantially normal image can be obtained on a television receiver, for example, from the moment the needle is placed on the recording medium. The purpose is to provide a playback device that can perform the following functions.

Generally, a signal (for example, an NTSC color video signal) recorded on an information recording medium, particularly a disk-shaped information recording medium (hereinafter referred to as a disk) with a single spiral groove, is traced by engaging the groove. In a device that performs pick-up and playback using a stylus, timing information (for example, horizontal For example, the number of rotations of the disk is controlled using the synchronizing pulse (synchronous pulse).

Here, no signal is reproduced except when the needle is in the groove of the disk and there is relative movement between the disk and the needle.

After the disc playback device is then switched on, the needle is properly engaged in the groove containing the information on the disc, and
No signal is taken until there is relative movement between the disk and the needle.

Therefore, since no timing information is obtained during this startup period, the speed control system described above cannot detect speed errors.

For this reason, the speed control system takes an arbitrary state during this activation period, and when regeneration starts, the maximum current is applied to the speed control brake, and the brake continues to work even though the disc has not reached the predetermined speed. This may prevent the disk from reaching a desired speed and may also destroy the turntable drive mechanism.

Therefore, in order to solve the above problem, when there is no signal at the output section of the pickup needle, a so-called mute signal that cuts off the video and audio circuits is used to deactivate the speed control brake during this startup period. It is well known that the following means are used.

In this case, after the needle engages the groove, the speed control circuit is activated, current flows to the brake, and the turntable goes from maximum rotational speed to steady rotational speed.

The time from this maximum rotation speed to the steady rotation speed (
The settling time (hereinafter referred to as "settling time") is determined by the cutoff frequency determined by the inertia of the turntable, the time constant of the compensation circuit, the gain of the DC amplifier, etc., and the capacity of the brake.

The speed control system described above is a so-called low-frequency error correction system that operates to maintain the relative average speed of the needle and the disk at a predetermined speed, and generally, the higher the cutoff frequency, the shorter the settling time.

However, the above-mentioned low-frequency error correction system is used in combination with a so-called high-frequency error correction system that corrects the deviation of the instantaneous relative velocity between the disk and the needle from the average speed of the disk. Public notice.

In the conventional reproducing device as described in 2007, when the above-mentioned cutoff frequency is raised and the settling time is shortened, the response frequency ranges of these two systems overlap, resulting in harmful interaction between these two systems. It had the disadvantage of causing effects.

On the other hand, if the above cutoff frequency is lowered and the settling time is lengthened, the time it takes for the turntable rotation speed to reach the steady rotation speed, if the signal recorded on the disk is a color video signal, the television receiver will play the signal. The drawbacks were that the hue of the image would change, the colors would disappear, and horizontal synchronization would be lost.

The present invention is intended to eliminate the above-mentioned drawbacks, and one embodiment thereof will be described below with reference to the drawings.

FIG. 1 shows the frequency-gain characteristics of the error correction system of the device of the present invention.

In the figure, curves ``■'' and ``■'' indicate the frequency-gain characteristics of the low-frequency error correction system, respectively.

The cut-off frequency is around 0.5 Hz for the servo system of a VTR, and around 10 Hz for the direct drive turntable of an audio record player.

Curve (2) shows the frequency-gain characteristic of the high-frequency error correction system.

For example, when the turntable is 180Orpm, ω3 is 3
What is ω3 when it is 0Hz and 450 rpm? , 5H2, and ω4 is about 100 to 200 Hz.

If the cut-off frequency of the low-frequency error correction system is 10 Hz and the cut-off frequency ω3 of the high-frequency error correction system is 7.5H2, the frequency characteristics of these two systems will overlap, causing a harmful interaction.

Therefore, in the device of the present invention, the operation of the high-frequency error correction system is delayed from the start of the low-frequency error correction system, and the cut-off frequency of the low-frequency error correction system is set to curve 1 until the high-frequency error correction system starts operating. By increasing the height as shown by ω2, the settling time is shortened, and from the moment when the needle engages with the groove of the disk, the disk can be brought to a specified rotational speed in a short period of time, and from the time when the high-frequency error correction system starts operating. By lowering the cutoff frequency of the low-frequency error correction system as shown by ω1 in curve I, the interaction between these two systems can be eliminated, and the rotation speed due to fluctuations in the power supply frequency or changes over time in the turntable drive mechanism can be reduced. This is an attempt to correct the fluctuation of

FIG. 2 shows a block system diagram of one embodiment of the device of the present invention.

In the figure, reference numeral 1 denotes a motor, which rotates a turntable 2 to rotate a disk 3 placed on the turntable 2. As shown in FIG.

This results in a relative movement between the disc 3 and the needle 4, which is positioned in a groove provided in the surface of this disc 3.

Reference numeral 14 denotes a brake coil which, when not energized, operates at a maximum speed higher than a predetermined rotational speed required by the turntable drive mechanism including the motor 1 that causes relative movement between the disk 3 and the needle 4. The rotating turntable 2 is not braked, but when a current is applied, the brake is applied to the turntable 2 in proportion to the amount of current to reduce its rotational speed.

A brake drive circuit consisting of Darlington-connected NPN transistors Q, , Q is connected between the brake coil 14 and the power supply terminal.

Further, 10 is a circuit that generates a mute signal that cuts off the video and audio circuits when no signal is present at the output section of the needle 4.

First, when the disc playback device is turned on, the turntable 2 starts rotating, and if the stylus 4 has not yet been engaged in the groove containing information on the disc 3, the output of the stylus 4 is At this time, the mute signal generating circuit 10 operates and outputs, for example, a high-level mute signal.

This high level mute signal is passed through the resistor R to the NPN
It is supplied to the base of transistor Q, turning it on.

Therefore, the transistor Q1 is turned off, and hence the transistor Q2 is also turned off, no current flows through the brake coil 14, and the turntable 2 rotates at the maximum speed.

Further, the mute signal from the mute signal generation circuit 10 is supplied to a delay circuit 11 having a general configuration, and after being delayed for a predetermined time as described later, a low frequency error correction system compensation circuit 8 and a DC amplifier 9, High frequency error signal generation circuit 1
2 as operation control signals.

However, the compensation circuit 8, the DC amplifier 9, and the high-frequency error signal generation circuit 12 are configured so that they do not operate depending on the mute signal.

Next, when the needle 4 is engaged in the groove having the information of the disk 3 placed on the turntable 2 rotating at maximum speed as described above, from this moment on, the needle 4 engages the disk 3. A recorded signal, for example a signal representing video information, is picked up and supplied to a signal processing circuit 5,
Here, it is considered as a composite video signal.

This composite video signal is supplied to a conventional television receiver or the like through a terminal 15 and played back, while the sync separation circuit 6
and the mute signal generation circuit 10, respectively.

As a result, the mute signal generating circuit 10 outputs, for example, a low level signal, turning off the transistor Q, and
Transistor Q□? Q2 are respectively activated while being supplied to the delay circuit 11.

At the same time, the synchronization signal separated by the synchronization separation circuit 6' is supplied to the speed detection circuit 7, where the deviation from the predetermined speed of the disk 3 is detected. The signals are supplied to a brake drive circuit consisting of transistors Q, , Q through amplifiers 9, respectively, and the two transistors are activated.

As a result, the brake coil 14 is supplied with a current responsive to the error signal, and applies a brake to the turntable 2 to adjust the speed of the disk 3 in order to minimize the speed error of the disk 3.

Here, the compensation circuit 8 has a known low-pass filter that can vary the cut-off frequency, and operates at a high cut-off frequency ω2 while the output of the delay circuit 11, which will be described later, is supplied.
When the output of the delay circuit 11 is supplied, the cutoff frequency ω1 is low.
is configured to operate.

Therefore, the low-frequency error correction system that responds to the above-mentioned error signal has a high cutoff frequency, as shown by ω2 in curve ① in Fig. 1, and changes the relative speed between the disk 3 and the needle 4 to a predetermined speed in a short time. Put it away.

Incidentally, the delay time of the delay circuit 11 is selected to be approximately equal to the settling time.

Therefore, the output of this delay circuit 11 is the output of the turntable 2.
When it reaches a predetermined rotational speed, it is supplied to the compensation circuit 8 and the DC amplifier 9 of the low-frequency error correction system, and the amplification degrees of the compensation circuit and DC amplifier 9 are changed simultaneously, and the low-frequency The cutoff frequency of the error correction system is determined by curve I in Figure 1.
Change it to a lower value as shown by ω□.

Further, the delayed output of the delay circuit 11 is supplied to the high frequency error signal generating circuit 12 to operate it, thereby starting the operation of the high frequency error correction system.

This high-frequency error signal generation circuit 12 has a bandpass filter whose lower limit frequency is ω3 and whose upper limit frequency is ω.

That is, the synchronization signal from the synchronization separation circuit 6 is transmitted to the circuit 1.
2, where it is converted into a high-frequency error signal representing the deviation of the instantaneous relative velocity between the disc 3 and the needle 4 from the average velocity of the disc 3, and then supplied to a transducer 13, which converts this error signal into The position of the needle 4 with respect to the disk 3 is changed so as to minimize.

This high-frequency error correction system can correct the deviation of the instantaneous relative velocity between the disk 3 and the needle 4 from the disc average speed, which exceeds the correction effective range of the low-frequency error correction system.

Furthermore, at the same time as the high-frequency error correction system starts operating, the cut-off frequency of the low-frequency error correction system changes to ω as shown by ω□ in Figure 1.
Since it is set to be lower than 3, there is no harmful interaction between these two error correction systems, and each system can fully demonstrate its capabilities.

Note that the signal recorded on the disc 3 need not be a video signal, but may be any signal having a synchronization signal.

As described above, the information recording medium reproducing apparatus according to the present invention includes a signal converter that moves relative to an information recording medium on which an information signal including timing information is recorded and picks up the information signal from the information recording medium. a detection circuit that detects the presence or absence of the information signal extracted from the signal converter; and a detection circuit that is connected to the detection circuit and outputs an output signal of the detection circuit upon detecting the information signal after a predetermined time delay. a delay circuit; and a circuit connected to the delay circuit that operates at a relatively high cut-off frequency until the output of the delay circuit is supplied, and operates at a relatively low cut-off frequency after the output of the delay circuit is supplied. a first error correction circuit that generates a current to maintain the average speed of the information recording medium at a predetermined speed using the low-frequency component of the error signal formed from the timing signal from the signal converter; a first speed adjusting means connected to the first error correction circuit and variably adjusting the speed of the information recording medium according to the current generated by the first error correction circuit; The signal converter stops operating until the output of the circuit is supplied, and operates at a lower cutoff frequency higher than the cutoff frequency of the first error correction circuit when the output of the delay circuit is supplied. a second error correction circuit that generates a signal for maintaining a relative speed of the converter with respect to the information recording medium at a predetermined speed using a high-frequency component of an error signal formed from the timing signal; and a second speed adjusting means connected to the error correction circuit and variably adjusting the relative speed of the converter with respect to the information recording medium according to the signal generated by the second error correction circuit. can be brought to a predetermined speed in an extremely short time from the time when the information signal is detected by the detection means, and therefore the actual track number and normality can be determined from the moment the signal converter starts picking up the information signal from the recording medium. It is possible to completely eliminate the harmful interaction between the first error correction means and the second error correction means, so that the error correction of these two error correction means is It has many features such as being able to fully demonstrate each ability.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the frequency-gain characteristics of the error correction system of the device of the present invention, and FIG. 2 is a block diagram of one embodiment of the device of the present invention. 2...Turn ten pull, 3...Disc, 4...Needle, 5...Signal processing circuit,
6... Synchronization separation circuit, 7... Speed detection circuit, 8... Compensation circuit, 9... DC amplifier, 10... Mute Signal generation circuit, 11.
... Delay circuit, 12 ... High frequency error signal generation circuit, 14 ... Brake coil.

Claims (1)

[Scope of utility model registration request] A signal converter for picking up the information signal from the information recording medium by moving relative to the information recording medium on which the information signal includes timing information, and detecting the presence or absence of the information signal taken out from the signal converter. a detection circuit for detecting; a delay circuit connected to the detection circuit for delaying and outputting an output signal of the detection circuit upon detecting the information signal by a predetermined time; The timing signal is formed from the timing signal from the signal converter, which operates at a relatively high cut-off frequency until the output is supplied, and operates at a relatively low cut-off frequency when the output of the delay circuit is supplied. a first error correction circuit that generates a current to maintain the average speed of the information recording medium at a predetermined speed based on the low frequency component of the error signal; and a first error correction circuit connected to the first error correction circuit. a first speed adjusting means that variably adjusts the speed of the information recording medium according to the current generated by the circuit; and a first speed adjusting means that is connected to the delay circuit and stops operating until the output of the delay circuit is supplied. , a high-frequency component of an error signal formed from the timing signal from the signal converter, which operates at a lower cutoff frequency higher than the cutoff frequency of the first error correction circuit when the output of the delay circuit is supplied. a second error correction circuit that generates a signal to maintain the relative speed of the converter with respect to the information recording medium at a predetermined speed; and a second error correction circuit that is connected to the second error correction circuit. An information recording medium reproducing apparatus comprising: second speed adjusting means for variably adjusting the relative speed of the converter with respect to the information recording medium in accordance with a generated signal.