JPS6039933A - Fm receiver - Google Patents

Fm receiver

Info

Publication number
JPS6039933A
JPS6039933A JP58147720A JP14772083A JPS6039933A JP S6039933 A JPS6039933 A JP S6039933A JP 58147720 A JP58147720 A JP 58147720A JP 14772083 A JP14772083 A JP 14772083A JP S6039933 A JPS6039933 A JP S6039933A
Authority
JP
Japan
Prior art keywords
circuit
output
level
detection
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58147720A
Other languages
Japanese (ja)
Inventor
Yoshio Shimizu
清水 可雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP58147720A priority Critical patent/JPS6039933A/en
Priority to GB08418788A priority patent/GB2144947B/en
Priority to CA000459502A priority patent/CA1218115A/en
Priority to US06/634,033 priority patent/US4578819A/en
Priority to FR8411807A priority patent/FR2550032B1/en
Priority to NL8402346A priority patent/NL192169C/en
Priority to AT2407/84A priority patent/AT393577B/en
Priority to DE19843427473 priority patent/DE3427473A1/en
Publication of JPS6039933A publication Critical patent/JPS6039933A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0802Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection
    • H04B7/0817Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with multiple receivers and antenna path selection
    • H04B7/082Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with multiple receivers and antenna path selection selecting best antenna path
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0802Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection
    • H04B7/0831Compensation of the diversity switching process for non-uniform properties or faulty operations of the switches used in the diversity switching process

Abstract

PURPOSE:To improve the total reception performance by fixing a harmonic component and a noise component in an FM detection output of all reception circuit to the state just before they reach a reference level or over to reduce the switching noise. CONSTITUTION:When the harmonic component and the noise component in any of FM detected outputs of the reception circuits 10A, 10B are below the reference level, a changeover switch 20 is switched so as to select and extract the smaller level. On the other hand, when the harmonic component and the noise component of the FM detection output of all the reception circuits are the reference level or over, the switch 20 selects and extracts the state just before the point of time when the harmonic component and the noise component in the FM detection outputs of all the reception circuits reach the reference level or over or the FM detection output of a specific reception circuit. Thus, the switching noise is reduced and the total reception performance is improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、それぞれアンテナ、フロノドエンド。[Detailed description of the invention] Industrial applications The present invention is an antenna and a front end, respectively.

中間周波増幅回路及びFMi険波同波回路する複数の受
信回路が設けられ、これら複数の受信回路で同−の放送
局のF M放送が受信されるとともに、これら複数の受
信回路のうちの受信状態が最も良好な受信回路のFM検
波出力か選択されるJi” M受信機に関する。
A plurality of receiving circuits including an intermediate frequency amplification circuit and an FMi high frequency wave circuit are provided, and these plurality of receiving circuits receive FM broadcasts from the same broadcasting station, and the receiving circuits of these plurality of receiving circuits receive FM broadcasts from the same broadcasting station. This relates to a Ji''M receiver in which the FM detection output of the receiving circuit in the best condition is selected.

背景技術とその問題点 いわゆるダイバーンティl−i” M受信機として、そ
れぞれアンテナ、フロントエンド2中間周波増幅回路及
びFMM波回路を有するノ個の受信回路が設けられ、こ
れら2個の受信回路で同一の放送局のF M放送が受信
されるとともに、それぞれの受信回路のF M検波出力
に含寸れる高調波成分及びノイズ成分のレベルが相互に
比較されることによって、相対的にいずれの受信回路の
受信状態か良いかが検出され、その受信状態の良い方の
受信回路の検波出力が切換スイッチによシ選択されて取
り出されるものがおるが、かかるFM受信機では、2個
の受信回路の検波出力が切換えられる際に切換スイッチ
の過渡応答によって出力の音声信号にノイズが発生する
。特にとのIi” M受信機は車などに設けられて移動
する状態で受信がなされ、そのため各々の受信回路の受
信状態が常に変化して、切換スイッチによる検波出力の
切換えが頻繁になされるので、ノイズも頻繁に現われる
。特にそれぞれの受信回路の受信状態が悪く、もともと
音声S 。
BACKGROUND TECHNOLOGY AND PROBLEMS The so-called diverti l"M receiver is provided with two receiving circuits each having an antenna, two front-end intermediate frequency amplification circuits, and an FMM wave circuit. When FM broadcasts from the same broadcasting station are received, the levels of harmonic components and noise components included in the FM detection output of each receiving circuit are compared with each other, so that the FM broadcasts from the same broadcasting station are relatively Some FM receivers detect whether the reception state of the circuit is good, and the detection output of the receiving circuit with the better reception state is selected by a changeover switch and taken out. When the detection output is switched, noise is generated in the output audio signal due to the transient response of the changeover switch. In particular, the Ii"M receiver is installed in a car and receives reception while moving, so each Since the receiving state of the receiving circuit constantly changes and the detection output is frequently switched by the changeover switch, noise frequently appears. In particular, the reception conditions of each receiving circuit were poor, and the audio S was originally low.

信号の4か悪くなるときは、そのノイズが目立つように
なる。
When the signal becomes worse than 4, the noise becomes noticeable.

発明の目的 本発明は、かよう々FMFM受信機いて、複数の受信回
路の検波出力の切換えによるノイズを減少させて、!・
−タルの愛情性能を向上させるようにしたものである。
OBJECTS OF THE INVENTION The present invention provides an FMFM receiver that reduces noise caused by switching detection outputs of a plurality of receiving circuits.・
-It is designed to improve Tal's love performance.

発明の概要 前述のように、それぞれの受信回路の受信状態が悪く、
もともと音声信号の渦が悪くなるときは、複数の受信回
路の検波出力の切換えによるノイズが目立つようになる
。しかも、複数の受信回路のいずれにおいても受信状態
がある限界以」二に悪いときは、いずれの受信回路の検
波出力が選択されても、もはや満足な音声信号は得られ
ない。
Summary of the Invention As mentioned above, the reception condition of each receiving circuit is poor,
Originally, when the vortex of the audio signal deteriorates, noise due to switching of detection outputs of multiple receiving circuits becomes noticeable. Furthermore, if the reception state of any of the plurality of reception circuits is worse than a certain limit, no matter which reception circuit's detection output is selected, a satisfactory audio signal will no longer be obtained.

本発明では、この点に着目し、すべての受信回路のF 
M検波出力中の高調波成分及びノイズ成分が一定の基準
レベル以上であるときは、相対的にいずれの受信回路の
1=” M検波出力が高調波成分及びノイズ成分のレベ
ルが最も小さいかに関係なく、FM検波出力の切換えを
停止させて、すべての受信回路のli” M検波出力中
の高調波成分及びノイズ成分がこの基準レベル以」二に
なった時点の直前の状態、または特定の受信回路のP 
M検波出力が選択される状態に固定する。
In the present invention, focusing on this point, the F of all receiving circuits is
When the harmonic components and noise components in the M detection output are higher than a certain reference level, it is relatively important to determine which receiving circuit's M detection output has the lowest harmonic and noise component levels. Regardless, the switching of the FM detection output is stopped and the state immediately before the harmonic components and noise components in the li"M detection output of all receiving circuits are below this reference level, or a specific P of receiving circuit
Fix the state in which the M detection output is selected.

実 施 例 第1図は本発明の1・゛へ4受信機の一例で、2個の受
信回路IOA、10Bを有し、とれら受信回路70A。
Embodiment FIG. 1 is an example of a 1-4 receiver according to the present invention, which has two receiving circuits IOA and 10B, including a receiving circuit 70A.

10Bはそれぞれ、アンテナ//A、 //Bと、アン
テナ//A、 //Bで受信されたF M放送信号のあ
る同一の放送局のものを選局してF M中間周波信号に
変換スルフロン1−エンド/、2A、 /2B 、!:
、フロントエンド/、2A、 /2Bの出力のF M中
間周波信号を増幅する中間周波増幅回路/3に、 /3
Bと、中間周波増幅回路/3A、 /3Bの出力のFM
中中間周波波信号F’M検波するF M検波回路/II
A、/≠Bとからなっていて、出力にFMM波信号5A
IS11か得られ、このFMM波信号5AISI]が切
換スイッチ、20の入力端子2/A、2/Hに供給され
、スイッチ、20の切換制御端子、22A 、 2.2
 Bに力えられる後述の切換信号によシ、スイッチノθ
の出力端子、、23に信号S A + S 11のうち
のいずれか一方が選択されて取り出され、その選択され
たF M検波信号がステレオ復調回路30に供給されて
左、右の音り信号S b +SRが復調される。
10B selects the same broadcasting station with FM broadcast signals received by antennas //A and //B and antennas //A and //B and converts them into FM intermediate frequency signals. Sulfuron 1-endo/, 2A, /2B,! :
, an intermediate frequency amplification circuit /3 that amplifies the FM intermediate frequency signal output from the front end /, 2A, /2B, /3
B, FM output of intermediate frequency amplifier circuit /3A, /3B
FM detection circuit/II that detects intermediate frequency signal F'M
A, /≠B, and the output is an FMM wave signal of 5A.
IS11 is obtained, and this FMM wave signal 5AISI] is supplied to the input terminals 2/A and 2/H of the changeover switch 20, and the changeover control terminal 22A of the switch 20, 2.2
Due to the switching signal, which will be described later, applied to B, the switch θ is
One of the signals S A + S 11 is selected and extracted from the output terminal , , 23, and the selected FM detection signal is supplied to the stereo demodulation circuit 30 to produce left and right sound signals. S b +SR is demodulated.

受信回路IOA、10Bの出力のFMM検波信号A。FMM detection signal A of the output of the receiving circuit IOA, 10B.

S 11は捷だレベル比較回路グθに供給されて、信号
S A I S uに含まれる高調波成分及びノイズ成
分のレベルが相互に比較されることにより、相対的に信
号SA、Sl、のいずれが高調波成分及びノイズ成分の
レベルが小さいかが、即ち相対的に受信回路IOA、1
0Bのいずれが良好な受信状態にあるかが検出される。
S11 is supplied to a sharp level comparison circuit θ, and the levels of the harmonic components and noise components included in the signal SAISU are compared with each other, so that the relative values of the signals SA, Sl, Which one has the lower harmonic component and noise component levels, that is, the receiving circuit IOA, 1
It is detected which of the 0Bs is in good reception condition.

具体的には、FMM検波信号A。Specifically, FMM detection signal A.

snがノ・イパスフィルタll−/A、#/Bに供給さ
れて信号S A I S n中の例えば乙0kHz以上
の周波数の成分NAINBがそれぞれ取り出され、この
成分NA。
sn is supplied to pass filters ll-/A and #/B, and components NAINB of frequencies of, for example, 0 kHz or higher in the signal S A I S n are extracted, and these components NA.

NBが整流回路グ、2AβりBに供給されてそれぞれ整
流され、その整流電圧VA、V11が電圧比較回路’l
−3に供給されて互いに比較され、電圧比較回路l13
の出力、即ちレベル比較回路l10の出力のノつの信号
XA、X、として、受信回路10Aの受信状態が受信回
路10Bのそれより良く、従って受信回路IOAのF 
M検波回路/l1−Aで発生する高調波成分及びノイズ
成分が受信回路/ 013のFM検波回路/I1.Bで
発生するそれよりレベルか小さく、電圧vAが電圧V 
IIより低いときは、信号XAが高レベルで信号X I
Iが低レベルとなり、受信回路10Bの受信状態が受信
回路IOAのそれより良く、従って受信回路10BのI
” M検波回路/≠Bで発生する高調波成分及びノイズ
成分が受信回路IOAのFM検波回路/4’−Aで発生
するそれよりレベルが小さく、電圧V Tlが電圧■Δ
より低いときは、信号XAが低レベルで信号X nか高
レベルとなるものが得られる。
NB is supplied to the rectifier circuit G and 2Aβ and B and is rectified, respectively, and the rectified voltages VA and V11 are supplied to the voltage comparison circuit 'l
-3 and are compared with each other, voltage comparison circuit l13
, that is, the two signals XA,
The harmonic components and noise components generated in the M detection circuit/I1-A are transferred to the FM detection circuit/I1 of the receiving circuit/013. The voltage vA is lower than that generated at B, and the voltage vA is the voltage V
When lower than II, signal XA is high level and signal XI
I becomes low level, the receiving condition of the receiving circuit 10B is better than that of the receiving circuit IOA, and therefore the I of the receiving circuit 10B becomes low level.
"The harmonic components and noise components generated in the M detection circuit/≠B are lower in level than those generated in the FM detection circuit/4'-A of the receiving circuit IOA, and the voltage V Tl is the voltage ■Δ
When it is lower, the result is that the signal XA is at a low level and the signal Xn is at a high level.

本発明ではさらに、受信回路IOA、 10Bの出力の
FM検波信号S 人+ S 11のいずれかの高調波成
分及びノイズ成分が一定の基準レベルに満たないか、い
ずれの高調波成分及びノイズ成分もこの基準レベル以上
であるかを判別する、即ち、受信回路/ (II;IA
 、 10Bのいずれかの受信状態がある限界以」二に
悪くないか、いずれの受信状態もこの限界」ヅ」二に悪
いかを判別するレベル判別回路30か設けられ、そして
第1図の例では、レベル比較回路4t。
In the present invention, the present invention further determines whether any of the harmonic components and noise components of the FM detection signals S11 output from the receiving circuits IOA and 10B are below a certain reference level, or whether any of the harmonic components and noise components are It is determined whether the level is above this reference level, that is, the receiving circuit / (II; IA
, 10B is provided, and a level discrimination circuit 30 is provided to determine whether any reception condition of 10B is worse than a certain limit or whether any reception condition is worse than this limit. Now, the level comparison circuit 4t.

の出力の信−号XA、X11がそのままスイッチ!0の
切換信号としてスイッチ、、20の切換制御端子22A
The output signals XA and X11 are just switches! 0 switching signal as a switch, 20 switching control terminal 22A
.

、2.:2Bに力先られるのではなく、信号XA、X1
1が特殊な切換信号出力回路乙0に供給されて、このリ
ノ換信号出力回路乙0の出力の信号l A I 211
かスイッチ、20の切換信号としてスイッチ、20の切
換制御端子、2.2A、2.2Bに力えられ、かつこの
切換イムは出力回路乙0がレベル!1−IJ別回路jO
の出力の情−シWCにより制御される。
, 2. : Instead of being focused on 2B, signals XA and X1
1 is supplied to a special switching signal output circuit Otsu 0, and the output signal l A I 211 of this switching signal output circuit Otsu 0 is supplied.
The switching signal of the switch 20 is applied to the switching control terminals 2.2A and 2.2B of the switch 20, and at this switching time, the output circuit O0 is at the level! 1-IJ separate circuit jO
It is controlled by the output information WC.

具体的にレベル判別回路、5′0では、レベル比較回路
1I−0の整流回路41,2A 、グ、2Bの出力の整
流電IイーVA、VBが電圧比較回路3/A、3;/B
に供給されてそれぞれ一定の基準電圧V Itと比較さ
れ、電圧比較回路3−/A 、 、3−/ J3の出力
の信号wA、w、がアンドゲート回路3..2に供給さ
れ、受信回路IOA、 10Bの出力の1”M検波信刊
SA I 814のいずれかの高調波成分及びノイズ成
分が一定の基準レベルに満たず、整流回路弘、、2A、
も」の出力の整流電圧VA。
Specifically, in the level discrimination circuit 5'0, the rectified currents Ie VA, VB of the outputs of the rectifier circuits 41, 2A, 2B of the level comparison circuit 1I-0 are connected to the voltage comparison circuits 3/A, 3;/B.
The output signals wA, w of the voltage comparator circuits 3-/A, , 3-/J3 are supplied to the AND gate circuit 3. .. 2, the harmonic components and noise components of the 1"M detection signal SA I 814 of the output of the receiving circuit IOA, 10B do not meet a certain standard level, and the rectifier circuit Hiroshi, 2A,
The rectified voltage VA of the output of "Mo".

V 11のいずれかが基準電圧V Itに満たないとき
は、′電圧比較回路J−/A、汐/Bの出力の信号W 
A 、 ’JJ I)のいずれかが低レベルになり、ア
ントゲ−1・回路5.2の出力の信号WGか低レベルに
なるか、受信回路IOA、10Bの出力のJ” M検波
信号S A + S11のいずれの高調波成分及びノイ
ズ成分も基準レベル以上で、整流回路lA、、2A、’
、’−,2Bの出力の整流電圧VA、V11のいずれも
が基準電圧V1(、以上のときは、電圧比較回路3/A
、37Bの出力の信号wA、w、、のいずれもが高レベ
ルになり、アントゲート回路汐!の出力の信号weが高
レベルになる。
When either of V11 is less than the reference voltage VIt, the output signal W of the voltage comparator circuit J-/A and Shio/B
Either A, 'JJ I) becomes low level, and either the signal WG of the output of Antogame 1/circuit 5.2 becomes low level, or the J"M detection signal S A of the output of receiving circuits IOA and 10B becomes low level. + All harmonic components and noise components of S11 are above the reference level, and the rectifier circuits 1A, 2A,'
, '-, 2B output rectified voltages VA and V11 are both reference voltage V1 (, when the voltage comparator circuit 3/A
, 37B output signals wA, w, , all become high level, and the ant gate circuit shio! The output signal we becomes high level.

さらに切換信号出力回路乙0は、例えばJ’ K −ノ
リツブフロップ回路乙/を有し、レベル比較回路グ0の
信号xA、x、が得られる出力側が抵抗感2A、乙、2
Bを介してJK−フリップフロップ回路乙/のプリセッ
ト端子PR,クリア端子CLにそれぞれ接続され、レベ
ル判別回路j0のアントゲート トランジスタ乙≠A,乙4’Bのベースにそれぞれ接続
され、トラノジスタ乙4’A,乙≠BのコレクタがJ 
K−フリップフロップ回路乙/のプリセット端子PR,
クリア端子CLにそれぞれ接続され、エミツタかそれぞ
れ接地され、J K−フリップフロップ回路乙/のJ端
子,クロック端子CP及び■(端子がそれぞれ接地され
、Q端子,Q端子かスイッチ、20の切換制御端子.2
.2A, 、、2.2B K接続された構成にされる。
Furthermore, the switching signal output circuit Otsu 0 has, for example, a J'K-Noritz flop circuit Otsu/, and the output side from which the signals xA, x of the level comparison circuit G0 are obtained has a resistance of 2 A, O, 2.
It is connected to the preset terminal PR and clear terminal CL of the JK-flip-flop circuit Otsu/ through B, respectively, and connected to the bases of the ant gate transistors O≠A and Otsu4'B of the level discrimination circuit j0, respectively. 'The collector of A, B≠B is J
K-Flip-flop circuit B/preset terminal PR,
The terminals are connected to the clear terminal CL, the emitters are respectively grounded, the J terminal of the JK-flip-flop circuit B/, the clock terminals CP and ■ (terminals are respectively grounded, the Q terminal, the Q terminal switch, and the switching control of 20). Terminal.2
.. 2A, , 2.2B K-connected configuration.

従って、受信回路IOA, 10Bの出力のt’ M検
波信号S A + S Rのいずれかの高調波成分及び
ノイズ成分か基準レベルに満たないときは、レベル判別
回路jOの出力の信号WOが低レベルになるので、トラ
ンジスタ乙りA,乙≠Bがともにオフになり、レベル比
較回路グ0の出力の信号xA,x.がその捷t J K
−フリップフロップ回路乙/のプリセット端子PR,ク
リア端子CLにそれぞれ力えられ、即ちプリセット端子
PR,クリア端子CLの信号YA + Y 11かレベ
ル比較回路≠0の出力の信号XA。
Therefore, when any of the harmonic components and noise components of the t'M detection signals S A + S R output from the receiving circuits IOA and 10B do not meet the reference level, the signal WO output from the level discrimination circuit jO becomes low. level, transistors A and B are both turned off, and the output signals xA and x of the level comparator circuit G0 are turned off. That's the trick JK
- The signals YA + Y 11 of the preset terminal PR and clear terminal CL of the flip-flop circuit B/ are respectively applied, that is, the signal XA of the output of the level comparison circuit ≠0.

Xl、とそれぞれ同じになり、このときJ K−フリッ
プフロップ回路乙/の6端子、Q端子に得られる切換信
号ZA、 + Z 11はプリセット端子PR,クリア
端一(CLの信号YA、Y11とそれぞれ同じになるの
で、結局、切換信号2人、Z11はレベル比較回路lZ
Oの出力の信号X A + X nとそれぞれ同じにな
る。
At this time, the switching signals ZA and +Z11 obtained at the 6 terminals and Q terminals of the JK-flip-flop circuit B/ are the same as the preset terminal PR and the clear terminal (signals YA and Y11 of CL). Since they are the same, in the end there are two switching signals, and Z11 is the level comparison circuit lZ.
They are the same as the output signal X A + X n of O.

従って、第2図の時点t/以前及び時点1.以降で示す
ように、受信回路10Aの出力の信号s A’l]の高
調波成分及びノイズ成分か受信回路10Bの出力の信号
S I’l中のそれよシレベルが小さければ、スイッチ
!θにおいてダイオード、24’Aがオン、ダイオ−1
’ 、21l−Bがオフになって、受信回路IOAの出
力の信−号SAが出力端子、23に取り出され、受信回
路1013の出力の信号S n中の高調波成分及びノイ
ズ成分が受信回路10Aの出力の信号SA中のそれより
レベルが小さければ、スイッチ、20においてダイオー
ド、2≠Aがオフ、ダイメート、2II−Bかオンにな
って、受信回路10Bの出力の信号SBが出力端子、2
3に取り出され、信号SA及びS oのうちの高調波成
分及びノイズ成分のレベルが小さい方が選択される。
Therefore, before time t/ and time 1. of FIG. As shown below, if the harmonic components and noise components of the signal s A'l output from the receiving circuit 10A are smaller than those in the signal S I'l output from the receiving circuit 10B, switch! At θ, diode, 24'A is on, diode-1
', 21l-B is turned off, the signal SA output from the receiver circuit IOA is taken out to the output terminal 23, and the harmonic components and noise components in the signal Sn output from the receiver circuit 1013 are output to the receiver circuit 1013. If the level in the signal SA of the output of 10A is smaller than that in the signal SA of the output of the receiving circuit 10B, the diode 2≠A is turned off in the switch 20, the dimer, 2II-B is turned on, and the signal SB of the output of the receiving circuit 10B is connected to the output terminal. 2
3, and the one of the signals SA and S o with lower harmonic component and noise component levels is selected.

受信回路IOA、 10Bの出力のFM検波侶信号A+
Snのいずれの高調波成分及びノイズ成分も基?Y、f
ニレベル以−ヒであるときは、レベル゛rll別回路汐
θの出力の信号Wcが高レベルになるので、トランジス
タ乙4’A、乙グBかともにオンになり、J K−フリ
ップフロップ回路乙/のプリセット端子1]R,クリア
端子CLの電位がともに接地電位になる。従って、第β
図の時点t/とPJ点tλの間で示すように、相対的に
受信回路10h、10Hの出力の]パM倹波信号SA 
+ S Hのいずれが高調波成分及びノイズ成分のレベ
ルが小さいかにし「1係なく、即しレベル比較回路ψ0
の出力の信号X A I X 11の状I♂13の如何
に拘わらず、J K−ソリノブフロップ回路乙/の点端
子、Q女:A’+子に得られるLり換信−弓ZA l 
l IIにL時点t/の直前の状態、第、2図の場合は
信号ZAが低レベルで信号Z flが高レベルの状態に
固定される。従って、スイッチ、20の切換えが停止さ
れて、スイッチ−20も時点t/の直前の状態、第2図
の場合はダイオード、、2!Aがオフ、ダイオード、2
II−Bかオンで受信回路/θBの出力の信号SBが出
力端子23に取り出される状態に固定され、高調波成分
及びノイズ成分のレベルに無関係なある一方の受信回路
の出力のF M検波信号が選択される。
FM detection signal A+ of output of receiving circuit IOA, 10B
Are any of the harmonic components and noise components of Sn based? Y,f
When the level is higher than the second level, the signal Wc of the output of the level-rll separate circuit θ becomes high level, so both the transistor Otsu 4'A and the O-tag B are turned on, and the JK-flip-flop circuit O is turned on. The potentials of the preset terminal 1]R and the clear terminal CL of / become the ground potential. Therefore, the β
As shown between time t/ and PJ point tλ in the figure, the output of the reception circuits 10h and 10H is relatively
+ S H The level comparison circuit ψ0
Regardless of the state of the output signal X A I l
In the state immediately before the L time t/, in the case of FIG. 2, the signal ZA is fixed at a low level and the signal Zfl is fixed at a high level. Therefore, switching of switch 20 is stopped, and switch 20 is also in the state immediately before time t/, in the case of FIG. 2 a diode, 2! A off, diode, 2
When II-B is on, the signal SB of the output of the receiving circuit/θB is fixed to the output terminal 23, and the FM detection signal of the output of one of the receiving circuits is unrelated to the levels of harmonic components and noise components. is selected.

第1図の例は、受信回路IOA、 10Bの出力の1=
’ M検波信号S A + S Rのいずれの高調波成
分及びノイズ成分も基準レベル以上であるときは、ステ
レオ復調回路30の出力の左、右の音声信号S1.。
In the example of FIG. 1, the output of the receiving circuit IOA, 10B is 1=
' When both harmonic components and noise components of the M detection signal S A + S R are equal to or higher than the reference level, the left and right audio signals S1 . .

S +tがそのt寸出力端子に導出されずに、レベル判
別回路汐0の出力の信号weとレベル比較回路/I−0
の整流回路≠、2人、グ、2Bの出力の整流電圧VA。
S
Rectifier circuit ≠, 2 people, G, 2B output rectified voltage VA.

V 11によって、左、右の音声信号S +、 + S
 +tに含寸れる高調波成分やノイズ成分が遮断されて
、聴感的に耳につくのが和らけられる」;うにした場合
である。
By V 11, left and right audio signals S +, + S
This is the case where the harmonic components and noise components contained in +t are blocked and the audible impact is softened.

即ち、ステレオ復調回路30の出力の左、右の音声信号
S I、 、 S nが帯域制御回路70L、 70H
の入力端子7/にそれぞれ供給され、この帯域制御回路
70L、70Rはそれぞれ、入力端子7/か抵抗7.2
.コンデンザ73.トランジスタ7≠のコレクタ・エミ
ッタ及びトランジスク7jのコレクタ・エミッタの直列
回路を介して接地され、トランジスタ7ケのベースより
抵抗分割回路7乙を介して制御端子77が導出され、ト
ランジスタ7ケのベースより別の制御Qi#を子7gが
導出され、抵抗7、.2とコンデンサ73の接続点より
出力端子7りが導出されたもので、レベル判別回路jO
の出力の信号Weが41v域i1i制御回路7θL、7
01.tの制御&ii6子7gにそれぞれ供給され、レ
ベル比較回路グθの整流回路ヶ、2A、グ、2Bの出力
の8!1≧流?Ijj圧V、、V□か加算回路gθに供
給されて両者の317−均値の電圧御回路70L、70
YLの制御端子77にそれぞれ供給される。
That is, the left and right audio signals S I, S n of the output of the stereo demodulation circuit 30 are transmitted to the band control circuits 70L and 70H.
The band control circuits 70L and 70R are supplied to the input terminal 7/ and the resistor 7.2, respectively.
.. Condenser 73. It is grounded through a series circuit of the collector-emitter of the transistor 7≠ and the collector-emitter of the transistor 7j, and a control terminal 77 is led out from the base of the transistor 7 via the resistor divider circuit 7B, and from the base of the transistor 7 Another control Qi# is derived from resistors 7, . The output terminal 7 is derived from the connection point between 2 and the capacitor 73, and the level discrimination circuit jO
The output signal We is in the 41v range i1i control circuit 7θL, 7
01. t control & ii 6 and 7g respectively, level comparison circuit g θ rectifier circuit, 2A, g, 2B output 8!1≧flow? Ijj voltages V,, V□ are supplied to the adder circuit gθ, and the voltage control circuits 70L, 70 of the average value of both 317
They are respectively supplied to control terminals 77 of YL.

従って、受信回路/ OA 、 / OBの出力の1・
゛へ4検波信号S A + 313のいずれかの高調波
成分及びノイズ成分が基準レベルに満たないときは、レ
ベル判別回路30の出力の信号Weが低レベルになるの
で、帯域制御回路70L、70Rのトランジスタ7jは
オフで、ステレオ復調回路30の出力の左、右の音声信
号S 1. + S I−Lは回路70L、 70Rに
おいて何ら帯域が制限されることなく抵抗7.2を通じ
て出力端子79′に導出される。これに対して、受信回
路IOA、10Bの出力のJ−? M検波信号S A 
+ S I’lのいずれの高調波成分及びノイズ成分も
基準レベル以上であるときは、レベル判別回路jOの出
力の信号Wcが高レベルになるので、帯域制御回路70
L。
Therefore, the output of the receiving circuit /OA, /OB is 1.
゛When any of the harmonic components and noise components of the 4-detection signal S A + 313 does not meet the reference level, the signal We output from the level discrimination circuit 30 becomes a low level, so the band control circuits 70L and 70R The transistor 7j is off, and the left and right audio signals S1. +SI-L is led out to the output terminal 79' through the resistor 7.2 without any band limitation in the circuits 70L and 70R. On the other hand, J-? of the output of the receiving circuit IOA, 10B? M detection signal S A
+ S I'l When any of the harmonic components and noise components are above the reference level, the signal Wc output from the level discrimination circuit jO becomes high level, so the band control circuit 70
L.

70Rのトランジスク7jがオンになり、加算回路g0
の出力の電圧Voが一定値以」二でトランジスク7/I
−もオンになると、回路70L、70Rはローパスフィ
ルタを構成し、ステレオ復調回路30の出力の左、右の
音声信号S b + S rtは回路70L、70Rに
おいて高調波成分やノイズ成分を含む高周波成分が遮断
されて出力端子79に導出される。この場合、受信回路
IOA、10Bの出力のJ” M検波信号SA + 8
11に含寸れる高調波成分及びノイズ成分の平均のレベ
ルか大きいほど、即ち加算回路gOの出力の電圧VCか
高いほど、回路701.、70Rのローパスフィルタに
おけるカットオフ周波数が低くされる。
Transistor 7j of 70R is turned on, and addition circuit g0
When the voltage Vo of the output of transistor 7/I exceeds a certain value,
- also turns on, the circuits 70L and 70R constitute a low-pass filter, and the left and right audio signals S b + S rt of the output of the stereo demodulation circuit 30 are converted into high-frequency signals including harmonic components and noise components in the circuits 70L and 70R. The components are blocked and led out to the output terminal 79. In this case, the J"M detection signal SA + 8 of the output of the receiving circuit IOA, 10B
The higher the average level of the harmonic components and noise components contained in the circuit 701. , 70R low-pass filters are lowered.

なお、整流電圧VA、V13の平均値の電圧V Cの代
わりに、整流電圧’V’AtたはV 11が制御端子7
7に供給されてもよい。
Note that instead of the voltage VC, which is the average value of the rectified voltages VA and V13, the rectified voltage 'V'At or V11 is applied to the control terminal 7.
7 may be supplied.

第1図の例は、受信回路10h、 10Bの出力のF 
M検波信号5AIS11のいずれの高調波成分及びノイ
ズ成分も基準レベル以上であるときに1、スイッチ、2
0 ノ切換信号Z A + Z 13が信号SA、S1
1のいずれの高調波成分及びノイズ成分も基準レベル以
上になった時点の直前の状態に固定され、スイッチ、2
0が信号S A + 811のいずれの高調波成分及び
ノイズ成分も基準レベル以上になった時点の直前の状態
に固定される場合であるが、スイッチ、20の切換信号
ZA、Zllが特定の状態、例えば信号ZAが高レベル
で信号Z 13か低レベルの状態に固定され、スイッチ
、20が特定の受信回路の出力の1” M検波信号を出
力端子、23に取り出す状態、例えばダイオード、2≠
Aがオン、ダイオード、21I−13がオフで受信回路
10Aの出力のFM検波信号SAを出力端子、23に取
り出す状態に固定されるようにしてもよい。
In the example of Fig. 1, the output F of the receiving circuits 10h and 10B is
1, switch, 2 when any harmonic component and noise component of M detection signal 5AIS11 are above the reference level.
0 switching signal Z A + Z 13 is the signal SA, S1
All harmonic components and noise components of 1 are fixed at the state immediately before they exceeded the reference level, and the switch 2
0 is fixed to the state immediately before the time when all harmonic components and noise components of the signal S A + 811 exceed the reference level, but the switching signals ZA and Zll of the switch 20 are in a specific state. , for example, the signal ZA is fixed at a high level and the signal Z 13 is fixed at a low level, and the switch 20 takes out the 1"M detection signal of the output of a specific receiving circuit to the output terminal 23. For example, a diode, 2≠
It may be fixed in such a state that A is on, the diode 21I-13 is off, and the FM detection signal SA output from the receiving circuit 10A is taken out to the output terminal 23.

また、第1図の例のように特殊な切換信号出力回路乙0
が設けられずに、レベル比較回路≠00出力の信号XA
、X、、がそのitスイッチ、20の切換信号としてス
イッチ20の切換制御端子、2.2A 。
In addition, as shown in the example in Figure 1, a special switching signal output circuit
is not provided, and the level comparison circuit≠00 output signal XA
,

2.2Bに与えられるとともに、レベル判別回路jθの
出力の信号WGによりレベル比較回路llOの電圧比較
回路1I−3が制御されて、受信回路10A。
2.2B, and the voltage comparison circuit 1I-3 of the level comparison circuit 11O is controlled by the signal WG of the output of the level discrimination circuit jθ.

10Bの出力のP M検波信号S A T S nのい
ずれの高調波成分及びノイズ成分も基準レベル以上であ
るときは、信号W、か高レベルになることにより、電圧
比較回路ケ3の電圧比較動作か阻止されて、整流回路/
I−,2A、11..2Bの出力の整流電圧V A +
 V 11のいずれが相対的に高いかに拘わらず、電圧
比較回路≠3の出力の切換信号XA、XBか強制的に特
定の状態、例えば信号XAが高レベルで信号Xnが低レ
ベルの状態にされる構成でもよい。
When any of the harmonic components and noise components of the PM detection signal S A T S n of the output of 10B are higher than the reference level, the signal W becomes high level, so that the voltage comparison circuit 3 performs the voltage comparison. Operation is blocked and the rectifier circuit/
I-, 2A, 11. .. 2B output rectified voltage V A +
Regardless of which of V11 is relatively high, the switching signals XA and XB of the output of the voltage comparator circuit≠3 are forced to a specific state, for example, the signal XA is at a high level and the signal Xn is at a low level. A configuration may also be used.

応用例 前述のレベル判別回路30の出力の信号Wcを適当な表
示回路に供給すれば、受信回路70A。
Application Example If the signal Wc output from the level discrimination circuit 30 described above is supplied to a suitable display circuit, the receiving circuit 70A.

10Hのいずれの受信状態もある限界以上に悪いときに
、その旨を表示することができる。
When any reception condition of 10H is worse than a certain limit, a message to that effect can be displayed.

また、局部発振周波数が自動的に走査されて選局がなさ
れるタイプの受信機において、レベル判別回路jOの出
力の信号Wct走査の開始信刊として用いて、受信回路
10A、 10Bのいずれの受信状態もある限界以上に
悪いときは、自動的に別の受信状態の良い放送局がザー
チされるようにするとともできる。
In addition, in a type of receiver in which the local oscillation frequency is automatically scanned to select a station, the signal Wct of the output of the level discriminator jO is used as a signal to start scanning, and the signal Wct of the output of the level discriminator jO is used as a starting signal for scanning, If the condition is worse than a certain limit, another station with better reception can be searched automatically.

さらに、放送局を設定するメモリーを有する受信機にお
いて、レベル判別回路汐0の出力の信けWeをメモリー
の読み出し信号として用いて、受信回路#)A、 10
Hのいずれの受信状態もある限711以上に悪いときは
、メモリーから予め設定された放送局が読み出されて、
その放送局に自動的に一ノ換えられるようにすることも
できる。
Further, in a receiver having a memory for setting a broadcast station, the output signal We of the level discrimination circuit 0 is used as a readout signal of the memory, and the reception circuit #)A, 10
When the reception condition of any of the H is worse than 711, the preset broadcasting station is read from the memory,
It is also possible to automatically switch to that broadcasting station.

発明の効果 本発明によれば、それぞれの受信回路の受信状態が悪く
、もともと音声信号の堀が悪くなるときは、複数の受信
回路の検波出力の切換えによるノイズが目立つJ、うに
なるとともに、複数の受信回路のいずれにおいても受信
状態がある限界以上に悪いときは、いずれの受信回路の
検波出力が選択されても、もはや満足な音声信号が得ら
れないことに着目して、すべての受信回路のF M検波
出力中の高調波成分及びノイズ成分が一定の基準レベル
以」二であるときは、相対的にいずれの受信回路の1・
゛M検波出力が高調波成分及びノイズ成分のレベルが最
も小さいかに関係なく、l? M検波出力の切換えを停
dzさせて、すへての受信回路のF M検波出力中の高
調波成分及びノイズ成分がこの基をレベル以上になった
時点の直前の状態、または特定の受信回路のFM検波出
力が選択される状態に固定するので、複数の受信回路の
検波出力の切換えによるノイズが減少し、トータルの受
信性能が向上する。
Effects of the Invention According to the present invention, when the reception condition of each receiving circuit is poor and the sound signal depth is originally poor, noise due to the switching of the detection outputs of the plurality of receiving circuits becomes noticeable, and the plurality of Focusing on the fact that if the reception condition in any of the receiving circuits is worse than a certain limit, no matter which receiving circuit's detection output is selected, a satisfactory audio signal will no longer be obtained. When the harmonic components and noise components in the FM detection output of
゛Regardless of whether the M detection output has the lowest harmonic component and noise component levels, l? By stopping switching of the M detection output, the state immediately before the harmonic components and noise components in the FM detection output of all receiving circuits exceed this level, or the state of a specific receiving circuit. Since the FM detection output is fixed in the selected state, noise caused by switching the detection outputs of the plurality of reception circuits is reduced, and the total reception performance is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のF M受信機の一例の接続図、第2図
はその動作の説明のための波形図である。 図中、10h及び10Bは受信回路、//A及び//B
はアンテナ、/、2A及び72Bはフロントエンド゛、
/”A及び73Bは中間周波増幅回路、//I−A及び
//I−BはF M検波回路1..20はり換スイッチ
、30はステレオ復調回路、グ0はレベル比較回路、≠
/A及び4’/Bはノ・イパスフィルタ、ll−,2A
及び≠!Bは整流回路、グ3は電圧比較回路、joはレ
ベル゛r41別回路、5/A及び3/Bは電圧比較回路
、乙0は切換信号出力回路である。 代 理 人 弁理士神原貞昭(′□、′:””::。
FIG. 1 is a connection diagram of an example of the FM receiver of the present invention, and FIG. 2 is a waveform diagram for explaining its operation. In the figure, 10h and 10B are receiving circuits, //A and //B
is the antenna, /, 2A and 72B are the front end,
/"A and 73B are intermediate frequency amplification circuits, //I-A and //I-B are FM detection circuits 1..20 switching switches, 30 are stereo demodulation circuits, G0 is level comparison circuits, ≠
/A and 4'/B are no-pass filters, ll-, 2A
and ≠! B is a rectifier circuit, G3 is a voltage comparison circuit, JO is a circuit for each level R41, 5/A and 3/B are voltage comparison circuits, and B0 is a switching signal output circuit. Agent: Patent attorney Sadaaki Kanbara (′□,′:””::.

Claims (1)

【特許請求の範囲】[Claims] それぞれ、アンテナと、このアンテナで受信されたFM
放送信号のある放送局のものを選局してJ” M中間周
波信号に変換するフロントエンドと、このフロントエン
ドの出力のI” M中間周波信号を増幅する中間周波増
幅回路と、この中間周波増幅回路の出力のFM中間周波
信号をFM検波するル゛M検波回路を備えた複数の受信
回路と、これら複数の受信回路のJi″M検波出力のう
ちの7つを選択して取り出す切換スイッチと、それぞれ
の受信回路の1・゛M検波出力に含1れる高調波成分及
びノイズ成分のレベルを相互に比較して、いずれの受信
回路のFM検波出力か高調波成分及びノイズ成分のレベ
ルが最も小さいかを検出するレベル比較回路と、いずれ
かの受信回路のFM検波出力中の高調波成分及びノイズ
成分が一定の基準レベルに満たないか、すべての受信回
路のF M検波出力中の高調波成分及びノイズ成分が上
記基準レベル以上であるかを判別するレベル判別回路と
を有し、いずれかの受信回路のFM検波出力中の高調波
成分及びノイズ成分か上記基準レベルに満たないときは
、上記切換スイッチが上記複数の受信回路のFM検波出
力のうちの高調波成分及びノイズ成分のレベルが最も小
さいものを選択して取り出すように切換えられ、すべて
の受信回路のJ” M検波出力中の高調波成分及びノイ
ズ成分か上iL基準レベル以上であるときは、」1記切
換スイッチがすべての受信回路のFM検波出力中の高調
波成分及びノイズ成分が上記基準レベル以上になった時
点の直前の状態、または特定の受信回路の1・゛M検波
出力を選択して取シ出す状態に固定される、F M受信
機。
antenna and the FM received by this antenna, respectively.
A front end that selects a broadcasting station and converts it into a J"M intermediate frequency signal; an intermediate frequency amplification circuit that amplifies the I"M intermediate frequency signal output from this front end; A plurality of receiving circuits each equipped with a FM detection circuit that performs FM detection on the FM intermediate frequency signal output from the amplifier circuit, and a changeover switch that selects and extracts seven of the Ji''M detection outputs of the plurality of receiving circuits. Then, compare the levels of the harmonic components and noise components included in the 1·゛M detection output of each receiving circuit, and determine the level of the harmonic component and noise component of the FM detection output of which receiving circuit. A level comparison circuit detects whether the harmonic components and noise components in the FM detection output of any receiving circuit are below a certain reference level, or whether the harmonic components and noise components in the FM detection output of all receiving circuits are the lowest. and a level discrimination circuit that determines whether the wave components and noise components are above the above reference level, and when the harmonic components and noise components in the FM detection output of any of the receiving circuits do not meet the above reference level. , the changeover switch is switched to select and extract the one with the lowest harmonic component and noise component level among the FM detection outputs of the plurality of receiver circuits, and the J"M detection output of all the receiver circuits is switched. When the harmonic components and noise components in the FM detection output of all receiver circuits are at or above the above reference level, the changeover switch 1 is set to An FM receiver that is fixed in the previous state or in a state in which the 1.M detection output of a specific receiving circuit is selected and extracted.
JP58147720A 1983-07-25 1983-08-12 Fm receiver Pending JPS6039933A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP58147720A JPS6039933A (en) 1983-08-12 1983-08-12 Fm receiver
GB08418788A GB2144947B (en) 1983-07-25 1984-07-24 Space diversity receivers
CA000459502A CA1218115A (en) 1983-07-25 1984-07-24 Space diversity receiver
US06/634,033 US4578819A (en) 1983-07-25 1984-07-24 Space diversity receiver
FR8411807A FR2550032B1 (en) 1983-07-25 1984-07-25 RECEPTOR WITH SPATIAL DIVERSITY
NL8402346A NL192169C (en) 1983-07-25 1984-07-25 Space diversity receiver.
AT2407/84A AT393577B (en) 1983-07-25 1984-07-25 ROOM DIVERSITY RECEIVER FOR RECEIVING BROADCAST SIGNALS
DE19843427473 DE3427473A1 (en) 1983-07-25 1984-07-25 DIVERSITY RECEIVER

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58147720A JPS6039933A (en) 1983-08-12 1983-08-12 Fm receiver

Publications (1)

Publication Number Publication Date
JPS6039933A true JPS6039933A (en) 1985-03-02

Family

ID=15436657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58147720A Pending JPS6039933A (en) 1983-07-25 1983-08-12 Fm receiver

Country Status (1)

Country Link
JP (1) JPS6039933A (en)

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