JPS6039181B2 - Reactive power detection method - Google Patents

Reactive power detection method

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Publication number
JPS6039181B2
JPS6039181B2 JP7871476A JP7871476A JPS6039181B2 JP S6039181 B2 JPS6039181 B2 JP S6039181B2 JP 7871476 A JP7871476 A JP 7871476A JP 7871476 A JP7871476 A JP 7871476A JP S6039181 B2 JPS6039181 B2 JP S6039181B2
Authority
JP
Japan
Prior art keywords
reactive power
value
load current
load
detection method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7871476A
Other languages
Japanese (ja)
Other versions
JPS534580A (en
Inventor
典久 上杉
眞一 今泉
力 原
博隆 白石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP7871476A priority Critical patent/JPS6039181B2/en
Publication of JPS534580A publication Critical patent/JPS534580A/en
Publication of JPS6039181B2 publication Critical patent/JPS6039181B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は無効電力検出方式に関する。[Detailed description of the invention] The present invention relates to a reactive power detection method.

種々の電力機器において無効電力の検出は重要である。Detection of reactive power is important in various power devices.

一つの相の電源電圧(負荷電圧)の瞬時値および実効値
をそれぞれORおよびEで表わし、負荷電流の瞬時値お
よび実効値をそれぞれIRおよびIRで表わし、負荷電
流IRが電源電圧eRよりも位相角のだけ遅れているも
のとすると、eR:ノ2E Sm のt
・・イー}IR=ノ玄IR SIN(のt−の)
…【21であり、この相の無効電力QRはQRニEI
RSNの …【3}で表わされる(
但し、のは角周波数、tは時間を表わす)。
The instantaneous value and effective value of the power supply voltage (load voltage) of one phase are represented by OR and E, respectively, and the instantaneous value and effective value of the load current are represented by IR and IR, respectively. Assuming that there is a delay by an angle, t of eR: ノ2E Sm
...E}IR=Nogen IR SIN (of t-)
...[21, and the reactive power QR of this phase is QR-EI
The RSN is represented by …[3} (
However, represents the angular frequency and t represents the time).

従来の無効電力検出方法として、上記式‘1}で表わさ
れる電圧を竹/2移相器に通して該電圧より汀/2だけ
位相のずれた電圧e′=ノ2ES川(■t−m/2)を
得、これを上記式{2}で表わされる電流値と共に乗算
器に入力して、q=e′×iR ニEIRSmの一EIRC○6(2のt−汀/2−の)
.・・{4)という出力を得、これをフィル夕に通して
式■の右辺第2項のりップル分を除去し式{4}の右辺
第1項のみを取出す方法が知られている。
As a conventional reactive power detection method, the voltage expressed by the above equation '1} is passed through a bamboo/2 phase shifter, and a voltage e'=no2ES river (■t-m /2) and input this to the multiplier together with the current value expressed by the above formula {2}, q = e' x iR
.. A known method is to obtain the output {4}, pass it through a filter, remove the ripple component of the second term on the right side of equation (2), and extract only the first term on the right side of equation {4}.

この方法は、フィル夕によって検出遅れが生ぜしめられ
るので例えばァーク炉負荷のように急激な負荷変動が生
ずる場合追従できないという欠点がある。なお、3相対
称負荷の場合は各相の電圧の瞬時値を加算すればリップ
ル成分はなくなるが、一般の3相負荷(特にアーク炉負
荷)は非対称となるので3相負荷の場合でもフィル夕を
必要とし、結局、検出遅れは避けられない。本発明の目
的は、上述したような従来技術の欠点を除去し、検出遅
れがなくしかも波形歪の影響を受け!こくい無効電力検
出方式を提供することである。
This method has the disadvantage that it cannot follow sudden changes in load, such as in the arc furnace load, because a detection delay is caused by the filter. Note that in the case of a three-phase symmetrical load, the ripple component can be eliminated by adding the instantaneous values of the voltages of each phase, but since a general three-phase load (especially an arc furnace load) is asymmetrical, even in the case of a three-phase load, the filter component cannot be removed. As a result, a delay in detection is inevitable. The purpose of the present invention is to eliminate the drawbacks of the prior art as described above, eliminate detection delay, and eliminate the influence of waveform distortion! The object of the present invention is to provide a method for detecting high reactive power.

本発明は、無効電力QR=EIRSINのをESINの
(またはSINの)とIRとに分けて別々に検出し、こ
れらの検出された値を乗算することにより無効電力の値
を求めることとし、かつ、ESINのおよびIRの検出
は予測検出法、すなわち、電圧E或いは電流IRの正弦
波が2分の1サイクルを経てしまわない時間内にESI
Nの(またはSINの)およびIRを代表しうる値を予
測的に得る方法によって行うようにしたものである。以
下図面を参照しながら本発明を説明する。
The present invention separately detects reactive power QR=EIRSIN as ESIN (or SIN) and IR, and calculates the value of reactive power by multiplying these detected values, and , ESIN and IR is a predictive detection method, i.e. the ESI is detected within a time period in which the sine wave of voltage E or current IR does not pass through one-half cycle.
This is done by a method of predictively obtaining values representative of N (or SIN) and IR. The present invention will be described below with reference to the drawings.

上述したように、本発明は無効電力QR=EIRSIN
のをESINのとIRとに分けて別々に予測検出し、こ
れらの予測検出値の積として求めるものである。
As mentioned above, the present invention provides reactive power QR=EIRSIN
is divided into ESIN and IR, predicted and detected separately, and obtained as the product of these predicted detection values.

第1図は負荷電流の予測検出法の一例を図解するもので
、負荷電流波形が負から正或いは正から負に変わる雲通
過点Bから予め定めた時間Tの点まで負荷電流波形を積
分して得られる値が負荷電流の実効値IR或いはピーク
値ノ21Rに比例することを利用する。
Figure 1 illustrates an example of a predictive detection method for load current, in which the load current waveform is integrated from a cloud passage point B where the load current waveform changes from negative to positive or from positive to negative to a point at a predetermined time T. The fact that the value obtained is proportional to the effective value IR or peak value 21R of the load current is utilized.

すなわち、パ磯T(のt)=ノ21R の 〔一COS(のt−の)〕2毛≦髪十のTニノ21R〈
1−C。
That is, Paiso T (t) = ノ21R [1 COS (t-)] 2 hairs ≦ hair 10 T nino 21R
1-C.

6 のT) であり、也Tが一定の場合、積分値はノ21Rに比例す
る。
6 T), and when T is constant, the integral value is proportional to R.

また、電源電圧にSINのを秦算したもの、ESINの
、の検出法としては、例えば、第1図において、B点に
おける電源電圧の瞬時値をサンプル保持する方法をとる
ことができる。
Further, as a method for detecting the power supply voltage plus SIN or ESIN, for example, in FIG. 1, a method may be used in which the instantaneous value of the power supply voltage at point B is sampled and held.

別の方法として、例えば或る一定電圧を電源電圧波形の
零点通過点Aから負荷電流の零点通過点Bまで積分した
値がの‘こ比例することを利用して位相差のを検出し、
それを正弦関数発生器に通してSIN◇の値を求め、こ
れに電源電圧の実効値Eを秦算してもよい。通常、得ら
れた最終検出信号は無効電力補償袋贋を制御するのに用
いられるが、この制御は検出信号に比例して行われるも
のであり、従って検出信号そのものは実際の値を表わす
必要はなく実際の値に比例する信号で充分であり、制御
が正しく行われるか否かは制御装置の比例常数の設定の
問題である。その理由で、実際上は、ESmのまで求め
なくとも、SINのを求めれば充分である。第2図には
IRの検出に上述したような予測検出法を用いES川の
の検出に上述したような瞬時値サンプリング保持法を用
いる回路構成のブロック図が示され、第3図には第2図
の回路の種々の点に現われる信号の時間図が示されてい
る。
Another method is to detect the phase difference by utilizing the fact that the value obtained by integrating a certain constant voltage from the zero point A of the power supply voltage waveform to the zero point B of the load current is proportional to, for example,
It may be passed through a sine function generator to obtain the value of SIN◇, and the effective value E of the power supply voltage may be subtracted from this value. Normally, the obtained final detection signal is used to control the reactive power compensation bag counterfeit, but this control is performed in proportion to the detection signal, so the detection signal itself does not need to represent the actual value. A signal proportional to the actual value is sufficient, and whether or not control is performed correctly is a matter of setting the proportionality constant of the control device. For that reason, in practice, it is sufficient to find SIN without even finding ESm. Figure 2 shows a block diagram of a circuit configuration in which the predictive detection method as described above is used to detect IR and the instantaneous value sampling and holding method as described above is used to detect ES. A time diagram of the signals appearing at various points in the circuit of FIG. 2 is shown.

例えば計器用変圧器PTからなる軍圧取出手段、例えば
変流器CTからなる鷺流取出手段、比較器CP(1)お
よびCP(ロ)、論理回路LOGIC、例えば単安定マ
ルチパイプレータMSからなる時間設定手段、積分器I
NT、サンプル保持回路SH、および乗算器MULTが
第2図に示されたように接続される。第3図に示されて
いるように、比較器CP(1)およびCP(ロ)はそれ
ぞれ電圧eRおよび電流IRの極性判別信号を発生し、
論理回路LOGICはこれらの極性判別信号に応じてサ
ィプル保持回路SHおよび積分器川Tを制御する。
For example, a military pressure extraction means consisting of a voltage transformer PT, a heron current extraction means consisting of a current transformer CT, comparators CP(1) and CP(b), a logic circuit LOGIC, such as a monostable multipipelator MS. Time setting means, integrator I
NT, sample and hold circuit SH, and multiplier MULT are connected as shown in FIG. As shown in FIG. 3, comparators CP(1) and CP(b) generate polarity determination signals for voltage eR and current IR, respectively,
The logic circuit LOGIC controls the siple holding circuit SH and the integrator T in accordance with these polarity determination signals.

サンプル保持回路SHは論理回路LOGIQこより第3
図の波形「LOGIC−SH」に示されたように制御さ
れる。すなわち、電圧eが零を通過するたびに、その時
点Aから電流iの零点通過点Bまでサンプルモードーこ
セットされ、この期間電圧eを追跡し、電流iが零点B
を通過する瞬間に保持モードに切換えられ、従って、保
持モードの期間中電流iの零点Bにおける瞬時値すなわ
ちノ2ESINのに比例した値を保持するように制御さ
れ、波形「SH」に示されたような出力を発生する。
The sample holding circuit SH is the third one from the logic circuit LOGIQ.
It is controlled as shown in the waveform "LOGIC-SH" in the figure. That is, each time the voltage e passes through zero, the sample mode is set from that point A to the zero point B of the current i, and the voltage e is tracked during this period, and the current i is set to the zero point B.
is switched to the hold mode at the moment when the current i passes through the hold mode, and is therefore controlled to hold the instantaneous value at zero point B of the current i during the hold mode, i.e., the value proportional to ESIN, as shown in the waveform "SH". produces output like this.

積分器INTは論理回路LOGICおよび単安定マルチ
パイプレータMSによって波形「LOGIC−mT」で
示されたように制御される。
The integrator INT is controlled by the logic circuit LOGIC and the monostable multipipulator MS as shown by the waveform "LOGIC-mT".

すなわち、電流iが零点Bを通過するごとに、単安定マ
ルチパイプレータMSで定められる一定時間Tの間だけ
積分モード‘こセットされ、それ以外は保持モードにお
かれる。電圧波形の各半波の終了付近で積分器INTを
次の積分に備えてリセツトするため、例えば波形「CP
I」を利用してリセツト信号「RESET」が発生され
る。このようにして積分器州Tからは波形nNT」に示
されたようなノ21R(1一COS のT)の波高値を
有する信号が発生される。従って、乗算器MULTの出
力は波形「MULT」で示されたようなEIRSmのに
比例する波高値を有する信号が発生され、これは直接的
または別のサンプル保持回路を介して無効電力検出出力
として取出される。
That is, each time the current i passes through the zero point B, the integral mode is set for a certain period of time T determined by the monostable multipipulator MS, and the holding mode is set for the rest of the time. To reset the integrator INT for the next integration near the end of each half-wave of the voltage waveform, e.g.
A reset signal ``RESET'' is generated using ``I''. In this way, a signal having a peak value of 21R (T of 1-COS) as shown in the waveform nNT is generated from the integrator state T. Therefore, the output of the multiplier MULT is a signal having a peak value proportional to EIRSm as shown by the waveform "MULT", which is directly or through another sample holding circuit as a reactive power detection output. taken out.

以上の説明から知られる通り、本発明は電流または電圧
の正弦波の2分の1サイクルというような極めて短い時
間内に無効電力を予測検出するので、例えば正弦波の半
波の前半において得られた無効電力の値を直ちに同じ半
波の後半において利用して無効電力補償装置を制御する
ことができ、検出遅れに基く悪影響を除去できる。
As is known from the above description, the present invention predicts and detects reactive power within an extremely short period of time, such as one-half cycle of a sine wave of current or voltage. The reactive power value obtained can be immediately used in the second half of the same half wave to control the reactive power compensator, and the adverse effects caused by the detection delay can be eliminated.

例えば、第4図に示されたような構成で無効電力補償を
行う場合、本発明の如き予測検出を行うことにより遅れ
のない制御が可能である。第4図において、Qsは系統
の無効電力、Qcはコンデンサ8からなる固定進相無効
電力発生部の無効電力、Q^は負荷5の無効電力、Qs
Rはサィリスタ6およびィンダクタンス7からなる可変
遅相無効電力発生部の無効電力を表わし、また、1はQ
^予測検出器、2はQsRの指令演算器、3はサィリス
タ点弧角調整器、4はパルス増幅器、5は負荷、6はサ
ィリス夕を示し、QA予測検出器1で得られた情報に基
きQsR指令演算器2が演算を行い、その演算値に従っ
てサィリスタ点弧角調整器3の信号を制御し、最終的に
はサィリスタ6の点弧角を制御して系統のQsを一定に
維持するものである。一般に、負荷電流の位相のの変動
範囲は0から汀/2までの範囲であり、補償装置のサィ
リスタ点弧範囲Qは汀/2からげまでの範囲であり、か
つのが大きいときはQも大きくなる。従って、本発明方
式に従って負荷電流の半波(2分の1サイクル)の前半
の期間でその無効分を検出し、その半波の後半に対応す
るQ;汀/2〜汀の間で補償装置のサィリスタを点弧し
補償すべき電流を流してやることにより半波毎の補償が
可能である。これは第5図に図解されている。簡単に説
明すれば、のが0〜m/2の範囲内で変化することに第
2図の回路が応答してQがm/2〜mの範囲内で変化し
、このQの大きさに従ってサィリスタを流れる電流is
Rの基本波無効分が変化してQsを一定に保つのである
。以上の説明から知られる通り、本発明は無効電力を負
荷電流の正弦波が2分の1サイクルを経てしまわないよ
うな時間内に検出するものである。
For example, when performing reactive power compensation with the configuration shown in FIG. 4, control without delay is possible by performing predictive detection as in the present invention. In FIG. 4, Qs is the reactive power of the system, Qc is the reactive power of the fixed phase advanced reactive power generating section consisting of capacitor 8, Q^ is the reactive power of load 5, and Qs
R represents the reactive power of the variable delayed phase reactive power generation section consisting of the thyristor 6 and the inductance 7, and 1 represents the Q
^ Prediction detector, 2 is the QsR command calculator, 3 is the thyristor firing angle adjuster, 4 is the pulse amplifier, 5 is the load, 6 is the thyristor, based on the information obtained by the QA prediction detector 1 The QsR command calculator 2 performs calculations, controls the signal of the thyristor firing angle regulator 3 according to the calculated value, and finally controls the firing angle of the thyristor 6 to maintain the Qs of the system constant. It is. Generally, the variation range of the phase of the load current is from 0 to 0/2, and the thyristor firing range Q of the compensator is from 0/2 to 0/2. growing. Therefore, according to the method of the present invention, the reactive component is detected in the first half period of a half-wave (1/2 cycle) of the load current, and the compensation device is used between Q; Compensation for each half wave is possible by firing the thyristor and passing the current to be compensated. This is illustrated in Figure 5. To explain briefly, the circuit shown in Fig. 2 responds to a change in Q within a range of 0 to m/2, Q changes within a range of m/2 to m, and according to the magnitude of Q, The current flowing through the thyristor is
The fundamental wave reactive component of R changes to keep Qs constant. As is known from the above description, the present invention detects reactive power within a time period in which the sine wave of the load current does not pass through one-half cycle.

電流の予測検出については、例えば第1図の点Bから一
定時間後の電流瞬時値を検出するというような方法も考
えられるが、しかしこの方法によると例えばアーク炉の
如き負荷では電流の波形歪が著しく、誤差が大きくなっ
てしまう。これに対して、本発明では電流の積分値を用
いているので、高調波の影響が低減され、また、ノイズ
電流による誤動作も防止される。例えばwT=電気角3
60o/5=電気角7が(50日2のとき、Tニ4ms
)となるようにTを選べば、負荷電流中の第5高調波の
影響を除去することができ(但し、Tをあまり大きく選
ぶと、点弧遅れのため半波内での補償ができなくなるの
で、実用上点弧遅れが問題とならない程度の適当な値に
選ぶ必要がある)、従って、このような点でも本発明は
従来方式に比較して有用性の高いものである。
Regarding the predictive detection of current, it is possible to consider a method of detecting the instantaneous value of the current after a certain period of time from point B in Fig. 1, for example, but this method causes distortion of the current waveform in loads such as arc furnaces. is significant, and the error becomes large. In contrast, in the present invention, since the integrated value of the current is used, the influence of harmonics is reduced, and malfunctions due to noise current are also prevented. For example, wT = electrical angle 3
60o/5=When electrical angle 7 is (50 days 2, T 4ms
), the influence of the fifth harmonic in the load current can be removed. (However, if T is chosen too large, compensation within half a wave will not be possible due to the ignition delay. Therefore, it is necessary to select an appropriate value to the extent that the ignition delay does not pose a problem in practice.) Therefore, the present invention is more useful than the conventional system in this respect as well.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は負荷電流の予測検出法を図解する概略図、第2
図は本発明を実施する回路構成の一例を示すブロック図
、第3図は第2図の回路の種々の点に現われる信号のタ
イミングを示す時間図、第4図は無効電力補償装置の一
例を示す概略図、第5図は第4図の装置の動作の時間関
係を示す概略図である。 PT:計器用変圧器、CT:変流器、CP(1),CP
(D):比較器、LOGIC:論理回路「 MS:単安
定マルチ/くィブレ−夕、SH:サンプル保持回路、I
NT:積分器、MULT:乗算器、1:Q^予測検出器
、2:QsR指令演算器、3:サィリスタ点弧角調整器
、4:パルス増幅器、5:負荷、6:サイリスタ。 第5図 第2図 第3図 第4図 第5図
Figure 1 is a schematic diagram illustrating the load current predictive detection method;
FIG. 3 is a block diagram showing an example of a circuit configuration for implementing the present invention, FIG. 3 is a time diagram showing the timing of signals appearing at various points in the circuit of FIG. 2, and FIG. 4 is an example of a reactive power compensator. FIG. 5 is a schematic diagram showing the time relationship of the operation of the device of FIG. 4. PT: Potential transformer, CT: Current transformer, CP (1), CP
(D): Comparator, LOGIC: Logic circuit MS: Monostable multi/wave controller, SH: Sample holding circuit, I
NT: Integrator, MULT: Multiplier, 1: Q^ prediction detector, 2: QsR command calculator, 3: Thyristor firing angle adjuster, 4: Pulse amplifier, 5: Load, 6: Thyristor. Figure 5 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】 1 力率角ψを有する負荷の無効電力を検出する方式に
おいて、負荷電流の実効値に比例する値および電源電圧
のSINψ倍に比例する値をそれぞれこれらの負荷電流
或いは電源電圧の正弦波が2分の1サイクルを経てしま
わない時間内に検出するそれぞれの手段と、これらの検
出された値を受取りそれらの積を表わす信号を発生する
手段とを具備することを特徴とする無効電力検出方式。 2 特許請求の範囲第1項の無効電力検出方式において
、負荷電流の実効値に比例する値を検出する手段が負荷
電流波形の零点通過点から該電流波形の4分の1サイク
ルよりも短い所定時間の点まで負荷電流波形を積分する
ようになつた積分回路であり、電源電圧のSINψ倍に
比例する値を検出する手段が負荷電流波形の上記零点通
過点における瞬時値をサンプル保持するサンプル保持回
路であることを特徴とする無効電力検出方式。
[Claims] 1. In a method of detecting the reactive power of a load having a power factor angle ψ, a value proportional to the effective value of the load current and a value proportional to SINψ times the power supply voltage are respectively set to these load currents or power supply voltages. characterized in that it comprises respective means for detecting a sinusoidal wave of voltage within a time period which does not pass through one-half cycle, and means for receiving these detected values and generating a signal representative of their product. reactive power detection method. 2. In the reactive power detection method set forth in claim 1, the means for detecting a value proportional to the effective value of the load current is a predetermined value shorter than one-fourth cycle of the current waveform from the zero point passing point of the load current waveform. This is an integrating circuit that integrates the load current waveform up to a point in time, and the means for detecting a value proportional to SINψ times the power supply voltage is a sample holding circuit that samples and holds the instantaneous value at the above-mentioned zero point passing point of the load current waveform. A reactive power detection method characterized by a circuit.
JP7871476A 1976-07-02 1976-07-02 Reactive power detection method Expired JPS6039181B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7871476A JPS6039181B2 (en) 1976-07-02 1976-07-02 Reactive power detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7871476A JPS6039181B2 (en) 1976-07-02 1976-07-02 Reactive power detection method

Publications (2)

Publication Number Publication Date
JPS534580A JPS534580A (en) 1978-01-17
JPS6039181B2 true JPS6039181B2 (en) 1985-09-04

Family

ID=13669528

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7871476A Expired JPS6039181B2 (en) 1976-07-02 1976-07-02 Reactive power detection method

Country Status (1)

Country Link
JP (1) JPS6039181B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS622835U (en) * 1985-06-22 1987-01-09
JPH02114061A (en) * 1988-10-21 1990-04-26 Nippon Seiko Kk Steering device for vehicle

Also Published As

Publication number Publication date
JPS534580A (en) 1978-01-17

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