JPS6034295B2 - frequency conversion circuit - Google Patents

frequency conversion circuit

Info

Publication number
JPS6034295B2
JPS6034295B2 JP51042856A JP4285676A JPS6034295B2 JP S6034295 B2 JPS6034295 B2 JP S6034295B2 JP 51042856 A JP51042856 A JP 51042856A JP 4285676 A JP4285676 A JP 4285676A JP S6034295 B2 JPS6034295 B2 JP S6034295B2
Authority
JP
Japan
Prior art keywords
transistor
frequency conversion
output
base
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51042856A
Other languages
Japanese (ja)
Other versions
JPS52126118A (en
Inventor
常男 大久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP51042856A priority Critical patent/JPS6034295B2/en
Publication of JPS52126118A publication Critical patent/JPS52126118A/en
Publication of JPS6034295B2 publication Critical patent/JPS6034295B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/26Circuits for superheterodyne receivers
    • H04B1/28Circuits for superheterodyne receivers the receiver comprising at least one semiconductor device having three or more electrodes

Description

【発明の詳細な説明】 本発明はラジオ受信機等に使用する周波数変換回路に係
り、局部発振回路の出力が中間周波段に漏洩するのを極
力防止し、簡単な構成で変換効率のよい優れた周波数変
換回路を提供しようとするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency conversion circuit used in radio receivers, etc., which prevents the output of a local oscillation circuit from leaking to an intermediate frequency stage as much as possible, and has a simple configuration and excellent conversion efficiency. The purpose of this invention is to provide a frequency conversion circuit that has the following characteristics.

一般に周波数変換回路は周波数変換用トランジスタのベ
ースに高周波信号を印加し、ェミッタに局部発振回路の
出力を印加してコレクタより両者の差に等しい周波数の
中間周波信号を取出すように構成している。
Generally, a frequency conversion circuit is configured to apply a high frequency signal to the base of a frequency conversion transistor, apply the output of a local oscillation circuit to the emitter, and extract from the collector an intermediate frequency signal with a frequency equal to the difference between the two.

しかしながら従来より用いられているこの種の周波数変
換回路では周波数変換用のトランジスタが1個で構成さ
れており、コレクタに局部発振回路の出力が大きく漏洩
することがあり余り好ましいものではなかった。本発明
は以上のような従釆の欠点を除去するものであり、周波
数変換用のトランジスタの他にもう1つトランジスタを
使用し、局部発振回路の出力に対しては上記2つのトラ
ンジスタのコレクタに現われる漏れ分が互に相殺される
ように構成したものである。
However, this type of frequency conversion circuit that has been used in the past is configured with one transistor for frequency conversion, which is not very desirable because the output of the local oscillation circuit may leak to the collector. The present invention eliminates the above-mentioned drawbacks of the conventional structure, and uses one more transistor in addition to the frequency conversion transistor, and connects the collectors of the two transistors to the output of the local oscillation circuit. The structure is such that the leakage components that appear cancel each other out.

以下、本発明の周波数変換回路について一実施例の図面
とともに説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The frequency conversion circuit of the present invention will be described below with reference to drawings of an embodiment.

第1図は本発明の周波数変換回路における一実施例の電
気的結線図であり、図中1は高周波回路、2は周波数変
換回路、3は局部発振回路である。
FIG. 1 is an electrical connection diagram of one embodiment of the frequency conversion circuit of the present invention, in which 1 is a high frequency circuit, 2 is a frequency conversion circuit, and 3 is a local oscillation circuit.

そして11は高周波回路1の出力を周波数変換用トラン
ジスタ14のベースに導く結合コソデンサ、12,13
は周波数変換用トランジスタ14のベースバイアス用の
抵抗、15は別に設けたトランジスタ、16,17はト
ランジスタ14,15のェミッタ抵抗、18,19は局
部発振回路3の出力を上記トランジスタ14,15のェ
ミツタに導く結合コンデンサ、20‘まトランジスタ1
4,15のコレクタ間に接続された中間周波トランス「
21,22はトランジスタ15のベースバイアス用の抵
抗、23,24はトランジスタ15のベースインピーダ
ンスがトランジスター4のベースインピーダンスに等し
くなるようにするための補償用の抵抗、及びコンデンサ
である。上記実施例において、高周波回路1の出力がコ
ンデンサ11を介して周波数変換用トランジスタ14の
ベースに印加され、トランジスタ竃4のベース信号はト
ランジスター4のェミツタに出力され、コンデンサー8
? 19を介してトランジスタ15のェミツタに加えら
れる。
and 11 is a coupling capacitor for guiding the output of the high frequency circuit 1 to the base of the frequency conversion transistor 14; 12, 13;
is a base bias resistor of the frequency conversion transistor 14, 15 is a separately provided transistor, 16 and 17 are emitter resistors of the transistors 14 and 15, and 18 and 19 are used to connect the output of the local oscillation circuit 3 to the emitters of the transistors 14 and 15. Coupling capacitor 20' leading to transistor 1
An intermediate frequency transformer connected between collectors 4 and 15.
21 and 22 are resistors for base bias of the transistor 15, and 23 and 24 are compensation resistors and capacitors for making the base impedance of the transistor 15 equal to the base impedance of the transistor 4. In the above embodiment, the output of the high frequency circuit 1 is applied to the base of the frequency conversion transistor 14 via the capacitor 11, the base signal of the transistor 4 is output to the emitter of the transistor 4,
? 19 to the emitter of transistor 15.

そして、局部発振回路3の出力はコンデンサ18,19
を介してトランジスタ14,15のェミツタに印加され
る。そのため、トランジスタ14,15のコレクタには
入力信号と局部発振信号の差に相当する出力が現われ中
間周波数トランス20の出力端には周波数変換された中
間周波信号が現われる。この場合トランジスタ14のコ
レクタ側には従来と同じように局部発振回路3の出力が
大きく漏洩するが上記実施例によれば、局部発振回路3
の出力がコンデンサ18を介して周波数変換用トランジ
スター4のェミツ外こ印加されるだけではなく、コンデ
ンサ19を介して別に設けたトランジスタ15のェミツ
タにも印加されるため、トランジスタ15のコレクタに
も同様に局部発振回路3の出力が現われ、したがって両
トランジスター4,15のコレクタに現われた局部発振
回路3の出力が中間周波トランス20を介して互に相殺
されることになり、中間周波トランス20の出力端には
上記局部発振回路3の出力はほとんど現われなくなる。
すなわち、上記実施例によれば、トランジスタ14,1
5のコレク外こ局部発振回路3の出力が同位相で現われ
るが、これらの出力は中間周波トランス20の一次巻線
によってそれぞれa点とb点では互に逆位相となり、し
たがってこれらは互に相殺され中間周波トランス20の
出力端には全く現われなくなるものである。この場合中
間周波トランス20の一次巻線を中点でアースし、トラ
ンジスタ14,15における増幅度を同じ1こすること
が望ましい。
Then, the output of the local oscillation circuit 3 is connected to capacitors 18 and 19.
is applied to the emitters of transistors 14 and 15 via. Therefore, an output corresponding to the difference between the input signal and the local oscillation signal appears at the collectors of the transistors 14 and 15, and a frequency-converted intermediate frequency signal appears at the output end of the intermediate frequency transformer 20. In this case, the output of the local oscillation circuit 3 leaks to the collector side of the transistor 14 as in the conventional case, but according to the above embodiment, the output of the local oscillation circuit 3 leaks to the collector side of the transistor 14.
The output of is applied not only to the emitter of the frequency conversion transistor 4 via the capacitor 18, but also to the emitter of the separately provided transistor 15 via the capacitor 19. The output of the local oscillation circuit 3 appears at the collectors of both transistors 4 and 15, so the outputs of the local oscillation circuit 3 appearing at the collectors of both transistors 4 and 15 cancel each other out through the intermediate frequency transformer 20, and the output of the intermediate frequency transformer 20 At the end, the output of the local oscillation circuit 3 hardly appears.
That is, according to the above embodiment, the transistors 14,1
The outputs of the local oscillation circuit 3 appear in the same phase, but these outputs have opposite phases at points a and b due to the primary winding of the intermediate frequency transformer 20, so they cancel each other out. and does not appear at the output end of the intermediate frequency transformer 20 at all. In this case, it is desirable that the primary winding of the intermediate frequency transformer 20 be grounded at its midpoint, and that the amplification degrees of the transistors 14 and 15 be the same.

そのため、上言己実施例ではトランジスタ15のベース
とアースとの間に抵抗23とコンデンサ24の直列回路
を接続し、トランジスタ15のベースインピーダンスが
トランジスタ14のベースインピーダンスに等しくなる
ように構成している。このように、上記実施例によれば
周波数変換用トランジスタの他にもう1つトランジスタ
を設け、これら2つのトランジスタのエミツタにそれぞ
れ局部発振回路の出力を印加し、上記周波数変換用トラ
ンジスタのコレクタに現われた上記局部発振回路の出力
をもう1つのトランジスタのコレクタに現われた出力で
互に相殺するように構成したものであり、中間周波トラ
ンスの出力端に漏れる局部発振回路の出力を極力小さく
することができるものである。
Therefore, in the above embodiment, a series circuit of a resistor 23 and a capacitor 24 is connected between the base of the transistor 15 and the ground, so that the base impedance of the transistor 15 is made equal to the base impedance of the transistor 14. . In this way, according to the above embodiment, one more transistor is provided in addition to the frequency conversion transistor, and the output of the local oscillation circuit is applied to the emitters of these two transistors, and the output is applied to the collector of the frequency conversion transistor. The output of the local oscillation circuit described above is canceled out by the output appearing at the collector of another transistor, and the output of the local oscillation circuit leaking to the output terminal of the intermediate frequency transformer can be minimized. It is possible.

尚実施例では、トランジスター5のベースとアースとの
間に抵抗23とコンデンサ24より成る直列回路を接続
してトランジスタ14,15のベースインピーダンスが
互に等しくなるように構成しているがトランジスタ15
のベース、アース間に抵抗23、コンデンサ24より成
る直列回路を必ずしも接続する必要はない。
In the embodiment, a series circuit consisting of a resistor 23 and a capacitor 24 is connected between the base of the transistor 5 and the ground so that the base impedances of the transistors 14 and 15 are equal to each other.
It is not necessarily necessary to connect a series circuit consisting of a resistor 23 and a capacitor 24 between the base of the resistor 23 and the ground.

すなわち、中間周波トランス20の一次巻線が中点でア
ースされている場合でもベースバイアス用の抵抗21,
22で増幅度をほ)、等しくすることも可能である。
また、上記実施例では中間周波トランス20の一次巻線
に並列にコンデンサを接続しているが第2図に示すよう
に二次巻線に並列にコンデンサを接続しても良い。以上
、実施例より明らかなように本発明は、ベースに入力信
号が印加される周波数変換用の第1トランジスタと、こ
の第1トランジスタの他にもう1つの第2のトランジス
タを有し、これらの第1、第2のトランジスタのコレク
タ間に中点がアースされた中間周波トランスを接続する
と共に、上記第1、第2トランジスタのェミッタを互に
交流的に結合し、上記第1、第2トランジスタのェミッ
タはそれぞれ局部発振回路の出力信号を印加し、かつ上
記第1トランジスタと上記第2トランジスタのベースイ
ンピーダンスをほぼ等しくなるように構成したので、上
記第1、第2のトランジスタが差動動作し、入力信号と
局部発振信号との差信号である中間周波信号が上記第1
、第2のトランジスタのコレクタで互に逆相信号となり
、この逆相信号が一次巻線の中点をアースした中間周波
トランスで加算されて二次巻線に大きな出力を取り出す
ことができ、また、局部発振信号は第1、第2のトラン
ジスタのコレクタで同相信号であり、上記中間周波トラ
ンスで打消される。
In other words, even if the primary winding of the intermediate frequency transformer 20 is grounded at its midpoint, the base bias resistor 21,
It is also possible to make the amplification degree equal to 22.
Further, in the above embodiment, a capacitor is connected in parallel to the primary winding of the intermediate frequency transformer 20, but a capacitor may be connected in parallel to the secondary winding as shown in FIG. As is clear from the above embodiments, the present invention has a first transistor for frequency conversion to which an input signal is applied to the base, and another second transistor in addition to this first transistor. An intermediate frequency transformer whose middle point is grounded is connected between the collectors of the first and second transistors, and the emitters of the first and second transistors are coupled to each other in an alternating current manner. The output signals of the local oscillation circuits are applied to the respective emitters, and the base impedances of the first transistor and the second transistor are approximately equal, so that the first and second transistors operate differentially. , the intermediate frequency signal which is the difference signal between the input signal and the local oscillation signal is the first
, they become mutually opposite phase signals at the collector of the second transistor, and these opposite phase signals are added by an intermediate frequency transformer whose middle point of the primary winding is grounded, allowing a large output to be taken out to the secondary winding. , the local oscillation signal is an in-phase signal at the collectors of the first and second transistors, and is canceled by the intermediate frequency transformer.

したがって、本発明によれば局部発振出力のもれをほゞ
完全に防止することができ、周波数変換効率を著しく向
上させることができるものである。したがって、本発明
の周波数変換回路によれば、特にダブルスーパヘテロダ
ィン方式の第1の周波数変換回路として有効なものであ
る。すなわち、ダフルスーパへテロダィン方式の受信機
において局部発振出力の漏れがあると、非受信状態でも
上記漏れによって第2中間周波信号が現われて、あたか
も受信状態にあるかのように動作することがあるが、本
発明によれば局部発振出力の漏れがほとんどないため、
このような問題はほとんどなくきわめて有利なものであ
る。
Therefore, according to the present invention, leakage of local oscillation output can be almost completely prevented, and frequency conversion efficiency can be significantly improved. Therefore, the frequency conversion circuit of the present invention is particularly effective as a first frequency conversion circuit of the double superheterodyne system. In other words, if there is a leakage of local oscillation output in a duffle superheterodyne receiver, a second intermediate frequency signal may appear due to the leakage even in a non-receiving state, and the receiver may operate as if it were in a receiving state. According to the present invention, there is almost no leakage of local oscillation output, so
There are almost no such problems and it is extremely advantageous.

【図面の簡単な説明】 第1図は本発明の周波数変換回路における一実施例の電
気的結線図、第2図は他の実施例の要部電気的結線図で
ある。 1・・・・・・高周波回路、2・・・・・・周波数変換
回路、3・・・局部発振回路、14・・・・・・周波数
変換用トランジスタ、15……トランジスタ、20・・
・・・・中間周波トランス、23,24・・・・・・抵
抗、コンデンサ。 第1図第2図
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an electrical wiring diagram of one embodiment of the frequency conversion circuit of the present invention, and FIG. 2 is an electrical wiring diagram of main parts of another embodiment. DESCRIPTION OF SYMBOLS 1... High frequency circuit, 2... Frequency conversion circuit, 3... Local oscillation circuit, 14... Frequency conversion transistor, 15... Transistor, 20...
...Intermediate frequency transformer, 23, 24...Resistor, capacitor. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 1 ベースに入力信号が印加される周波数変換用の第1
トランジスタと、この第1トランジスタの他にもう1つ
の第2トランジスタを有し、これらの第1、第2トラン
ジスタのコレクタ間に一次巻線の中点がアースされた中
間周波トランスを接続すると共に、上記第1、第2トラ
ンジスタのエミツタを互いに交流的に結合し、上記第1
、第2トランジスタのエミツタにそれぞれ局部発振回路
の出力信号を印加し、かつ上記周波数変換用の第1トラ
ンジスタのベースインピーダンスと上記もう1つの第2
トランジスタのベースインピーダンスとが互にほぼ等し
くなるように構成した周波数変換回路。 2 周波数変換用の第1トランジスタの他に設けたもう
1つの第2トランジスタのベースとアース間に抵抗、コ
ンデンサより成る直列回路を接続したことを特徴とする
特許請求の範囲第1項記載の周波数変換回路。
[Claims] 1. A first base for frequency conversion to which an input signal is applied.
A transistor, and a second transistor in addition to the first transistor, an intermediate frequency transformer having a primary winding whose midpoint is grounded is connected between the collectors of the first and second transistors, and The emitters of the first and second transistors are coupled to each other in an alternating current manner, and
, the output signal of the local oscillation circuit is applied to the emitter of the second transistor, and the base impedance of the first transistor for frequency conversion and the other second transistor are applied.
A frequency conversion circuit configured so that the base impedances of the transistors are almost equal to each other. 2. The frequency according to claim 1, characterized in that a series circuit consisting of a resistor and a capacitor is connected between the base of another second transistor provided in addition to the first transistor for frequency conversion and the ground. conversion circuit.
JP51042856A 1976-04-14 1976-04-14 frequency conversion circuit Expired JPS6034295B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51042856A JPS6034295B2 (en) 1976-04-14 1976-04-14 frequency conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51042856A JPS6034295B2 (en) 1976-04-14 1976-04-14 frequency conversion circuit

Publications (2)

Publication Number Publication Date
JPS52126118A JPS52126118A (en) 1977-10-22
JPS6034295B2 true JPS6034295B2 (en) 1985-08-08

Family

ID=12647652

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51042856A Expired JPS6034295B2 (en) 1976-04-14 1976-04-14 frequency conversion circuit

Country Status (1)

Country Link
JP (1) JPS6034295B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145590U (en) * 1986-03-08 1987-09-14

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5126408A (en) * 1974-08-29 1976-03-04 Sony Corp MIKISAKAIRO

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5126408A (en) * 1974-08-29 1976-03-04 Sony Corp MIKISAKAIRO

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145590U (en) * 1986-03-08 1987-09-14

Also Published As

Publication number Publication date
JPS52126118A (en) 1977-10-22

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