JPS6033066A - Burn-in method of high frequency transistor - Google Patents

Abstract

PURPOSE:To observe various parameters and set burn-in condition by putting a high-frequency transistor (TR) to be tested in operation with a low-frequency signal. CONSTITUTION:The high-frequency TR9 to be tested where load impedance is connected while an adjustment is made on the basis of static characteristics and a bias point is applied with a drain voltage VD and a gate-bias voltage VG, and a low-frequency signal is applied to the gate, so while voltages and currents at respective necessary points are observed through a measuring instrument, the burn-in condition is set. Simultaneously, the TR9 is heated to take an accelerated test. Consequently, when the high-frequency TR is put in turn-in operation, various parameters, e.g. the drain voltage and drain current, etc., are observed and the burn-in condition is set.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to
This paper relates to improvements in the burn-in method, which is an accelerated test for guaranteeing the quality of high-frequency transistors such as GaAs field-effect transistors used in G11z).

Prior Art and Problems Conventionally, in the burn-in method for high-frequency transistors as described above, the frequency at which the high-frequency transistor is used, that is, for example, l 00 (Mllz) ~ 2 (1 (G
The quality of the high-frequency transistor is determined by operating the high-frequency transistor in a high-temperature mode (2000-2000) and increasing the ambient temperature by placing it on a pot play 1 or, depending on the case, placing it in a heating furnace. A so-called radio frequency (RF) burn-in method has been adopted in which the quality of the parts is checked, and what is destroyed is destroyed.

It is thought that the reason why this method has been adopted is that ζ is applied to the actual operating frequency of the high-frequency transistor under test.

FIG. 1 is a circuit diagram of a main part of a test device used when carrying out a conventional high frequency burn-in method.

In the figure, 1 is a high-frequency oscillator, 2 and 3 are compres- ing capacitors, 4 and 5 are inductances forming a path for the distributed constant 11, 6 and 'l are high-frequency bypass capacitors, 8 is a high-frequency load, and 9 is a receiving capacitor. Test high frequency transistor,
−■c is the gate bias voltage, +■. indicate the drain voltage, respectively.

In this test apparatus, a drain voltage +V is applied to the drain of the high-frequency transistor 9 under test, and a gate bias voltage -V6 is applied to the gate.
An accelerated test is performed in a state where the high frequency transistor under test is operated by applying a signal of 7) to 20 (Gllz) and the temperature of the high frequency transistor under test is raised by heat from the plate.

However, in order to carry out the RF burn-in method with such a configuration, many devices and components are required, such as a high frequency oscillator 1, compression capacitors 2 and 3, a bias power supply circuit, and a power monitor circuit. Since it is required to be used for high frequencies, it is extremely expensive, especially when the high frequency transistor under test is for power use.
Since the high-frequency oscillator 1, bias power supply circuit, etc. must have large outputs, the economic burden further increases.

Moreover, in addition to the heavy economic burden as described above, what is worse is that the operating state of the high-frequency transistor under test cannot be fully grasped during RF burn-in. That is,
Because the operating frequency is too high, various parameters cannot be observed with existing measuring instruments such as oscilloscopes and voltage makers, and can only be observed in the form of voltage x current, that is, in the form of electric power. Therefore, it is almost impossible to control the burn-in conditions,
It is merely an accelerated test.

OBJECTS OF THE INVENTION The present invention provides a method for setting burn-in conditions by making it possible to observe various parameters such as drain voltage, drain current, gate voltage, and gate current when performing burn-in of a high-frequency transistor. The equipment and parts used are inexpensive and can be used in time.

Structure of the Invention According to the knowledge of the present inventors, for example, 100 (Mloo
(i8 that operates in the range of ~20 (Gllz)
In principle, the i-frequency transistor and its sister simply operate according to the high-frequency load impedance based on the characteristics of the drain voltage and drain current, that is, the static characteristics, as shown in FIG. If it is possible to operate within a predetermined operating range by swinging around the bias point B on the There should be no problem even if the operating frequency is a low frequency below I O (Mllz), which is the frequency range in which voltage and current can be observed, or a direct current.

Therefore, in the present invention, a drain voltage and a gate bias voltage are applied to the high-frequency transistor under test to which a load impedance adjusted based on the static characteristics and bias point is connected, and a low-frequency signal is applied to the gate. The burn-in conditions are set while observing the voltage and current at each point with a measuring device, and the high-frequency transistor under test is heated for accelerated testing. Note that in the present invention, the term "low frequency" refers to an operating frequency of 10 (Mllz3 or lower) that can be observed with the various measuring instruments described above.

By doing this, it is possible to observe the drain voltage, drain current, gate voltage, and gate current depending on the time, so that precise burn-in control can be performed based on this.

Embodiment of the Invention FIG. 3 is a main circuit diagram for explaining the implementation of the present invention, and the same parts as those explained with respect to FIG. 1 are indicated by the same symbols.

In the figure, 11 is a low frequency oscillator, 12 is, for example, [μF
14 is a gate resistor, and 18 is a variable resistor as a load.

In this embodiment, by selecting the value of the variable resistor 18, the slope of the load line in FIG. Can be tested while scanning, negative M
The operating range of Ill can be easily determined using, for example, an oscilloscope. Also, the gate voltage VG and drain voltage VD are the transistor 9
The gate current IG and drain current ID are determined by observing the voltage across the double gate resistor 14 and the voltage across the variable resistor 18. Fits easily. Furthermore, the ambient temperature can be conveniently determined by any conventional means, such as by using a thermocouple.

In this way, if the load condition, gate voltage ■G, gate current IG, drain voltage V111, drain current ■G, ambient temperature, etc. can be observed, the high-frequency transistor under test 9
It is easy to know how much accelerated testing has been applied to the This is completely impossible in acceleration tests using high frequencies, which impedance is determined by distributed constants and is almost impossible to adjust. Incidentally, the time required for burn-in in the present invention is the same as in the conventional case, and may be changed to 168 hours, 200 hours, 500 hours, or 3000 hours as necessary.
You can select the time as appropriate.

Effects of the Invention According to the burn-in method of the present invention, since the high-frequency transistor under test is operated with a low-frequency signal, a variable resistor that is a pure resistance can be used as a load for the high-frequency transistor under test. Therefore, by appropriately selecting the value of the variable resistor, it is possible to perform an accelerated test while scanning a predetermined operating region of the high-frequency transistor under test. Furthermore, it is possible to directly and easily know under what load conditions an accelerated test is being conducted at a certain point in time by observing the measuring instrument, and also to check the gate voltage, gate current, and gate voltage of the high-frequency transistor under test. Drain voltage, drain current and ambient dJ.

Since it is possible to observe things such as degrees directly with a measuring device,
It is possible to clearly understand how much acceleration testing is being performed, and therefore the conditions can be easily controlled. Furthermore, since the equipment, jigs, circuit parts, etc. used for burn-in can be those for low frequencies, costs can be kept significantly lower than when performing burn-in at high frequencies.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a main part of a test equipment used when implementing the conventional technique, and FIG. 2 is a diagram showing the relationship between drain voltage and drain current to explain the operation of a transistor.
FIG. 3 is a circuit diagram of a main part showing an example of a test device used in carrying out the present invention. In the figure, 9 is a high frequency transistor under test, 11 is a high frequency oscillator, 12 is a coupling capacitor, 14 is a gate resistor, 18 is a variable resistor, -vG is a gate bias voltage, and +vD is a drain voltage. Figure 1 - vG +vD Figure 2 Figure 3 - VG +v.

Claims (1)

[Claims] Apply the drain voltage and gate bias voltage to the high-frequency transistor under test to which the load impedance adjusted based on the static characteristics and bias point is connected, and apply a low-frequency signal to the gate, then calculate the voltage and current at each required point. 1. A burn-in method for a high-frequency transistor, which comprises setting burn-in conditions and heating the high-frequency transistor under test to perform an accelerated test while observing the high-frequency transistor with a measuring device.