JPS6032837B2 - Method for generating strong beat control signals for electronic metronome - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for generating a strong beat control signal for an electronic metronome, in which a strong beat control signal is obtained by extremely simplified means using a rational circuit arrangement.

The conventional strong beat control signal generation circuit is known from those described in Hakama Akira Sho 53-33241, Japanese Patent Application No. Sho 53-33242, or Utseki Sho 52-40762, filed by the present applicant. It is being

These have the same content, and an example is shown in FIG. In the figure, 1 is a tempo signal generation circuit, whose pulse signal is input to a BCD (binary coded decimal) counter 2, and a signal obtained by a time signature setting circuit 3 which logically synthesizes the output is sent to the reset input of 8CD counter 2. BCD is connected to R, and the moment the reset input R becomes logic “1”, the BCD
Since a predetermined number of beats is obtained by setting the counter 2 to "000" and "IJ", a strong beat control signal synthesis section 3' is required to obtain a strong beat control signal.This part is B
This method involves calculating the logical product of the negation of each output of the CD counter 2 and the tempo signal, and requires a large number of components, resulting in a complicated circuit. The present invention is a method for generating a strong beat control signal for a Shigeko metronome that eliminates these conventional drawbacks, and allows the strong beat control signal to be generated using extremely simple means using a rational circuit arrangement that does not require the strong beat control signal synthesis section 3'. This is to obtain a beat signal.

Embodiment circuits of the present invention will be described below.

FIG. 1 is a block diagram showing the outline of an electronic metronome according to the present invention, which includes a tempo signal generating circuit 1, a BCD counter 2 driven by the signal, and a signal obtained by logically synthesizing the output thereof to the old CD counter 2. A beat setting circuit 3 that inputs reset input, a dynamic beat sound generation circuit 4 that selectively operates based on the strong beat control signal obtained by the BCD counter 2, and a dynamic beat sound display circuit 5 that visually displays the strong beat sound. A tone width control circuit 6 controls the tone width of the dynamic beat sound generation circuit 4, and the waveform shaping of the signal from the tempo signal generation circuit 1 is inputted to the tone width control circuit 6 and the dynamic beat display circuit 5, and the tone width and display are performed. A waveform shaping circuit 7 that obtains a signal to appropriately control the width, and an amplifier 8 that amplifies the output of the tone width control circuit 6.
and a speaker 9.

FIG. 2 shows an example of its internal circuit.

The tempo signal generation circuit 1 consists of an oscillation circuit using PUTIO, and uses a variable resistor 11 to obtain a tempo signal of 40 to 2 bits (per minute) necessary for a metronome. The pulse output of the sensor can be obtained at regular intervals. This signal is added to the input of the BCD counter 2, and the binary IQ Hayabusa numbers are obtained from each output A, B, C, and D as shown in FIG. The time signature setting circuit 3 consists of a switch 12 which selects a desired number of beats by logically synthesizing the respective outputs of A, B, C, and D. A, 口, C, and 2 are respectively 2, 3, 4, and 6 beats. This is the selected position. The beat signal selected by the switch 12 is connected to the reset input terminal R of the BCD counter 2. The upper half of FIG. 3 shows a timing chart when no external reset is applied, and the logic output shown in the figure is repeated. now,
When the switch 12 is switched to the second selection position, that is, 6 beats, at the moment when the 5 beats have been counted and the 6th beat is reached, both outputs A and C become logic "" as shown by the dot marks in the figure. 1”, the logical “
1" is applied, an external reset is applied, and immediately "1001" outputs representing the 1qth beat are obtained at the A, B, C, and D terminals, which corresponds to the 6th beat. Also,
Immediately after counting the sixth beat, it returns to the first beat and is spelled back. Therefore, the actual output from this circuit is the timing chart shown in the lower half of Figure 3, and the D terminal has a logic "0" for 5 out of 6 beats and a logic "1" for 1 beat.
is obtained and this signal is used as a strong beat control signal. Next, this D output is supplied to the dynamic beat sound generating circuit 4.
Among these, the circuit consisting of NAND gates 13, 14, resistors, and capacitors shown in the upper half is a strong beat sound generation circuit and generates a rectangular wave of about Hz, and the NAND gates 15, 16 shown in the lower half The circuit consisting of a resistor and a capacitor is a weak beat sound generating circuit, and a rectangular wave of about IKHz can be obtained. ○
The signal from the terminal is the NAND gate 13 of the strong beat sound generation circuit.
It is applied to one input of the NAND gate 15 of the weak beat tone generation circuit through the inverter 17. Therefore, when the D state is logic "1", the strong beat blue generation circuit operates and a rectangular wave is obtained at the b terminal, while the weak beat sound generation circuit has one input at the c terminal because one input is logic "0". is logic “1”
” is obtained. Also, when the D terminal is logic “0”, the b terminal obtains a logic “1” and the c terminal obtains a rectangular wave. These are shown in the chart in the lower half of Figure 3. It is as follows, b
, c are passed through the AND gate 18, and a rectangular wave signal as shown in the figure is obtained at the d terminal. Since the dynamic beat tone obtained in this way is a continuous wave, the pitch control circuit 6
The pulse signal applied to one input of the ND gate 19 and obtained by the tempo signal generation circuit 1 is ANDed with the output of the waveform shaping circuit 7 where the pulse signal is shaped by the integrating circuit 20 and the inverter 21 so as to increase the pulse width. By performing the synthesis, an intermittent wave is obtained at the f terminal, and a width control suitable for a metronome is performed. Then volume 22
is output from the speaker 9 through the amplifier 8. Also,
The dynamic beat display circuit 5 is connected to NAND gates 23, 24 and LE.
It consists of D (light emitting diodes) 25 and 26, and is divided by the output pulse width of the waveform shaping circuit 7 at the same pulse width as the sound width.
5 lights up. As explained above, in the electronic metronome strong beat control signal generation method of the present invention, the output of the BCD counter 2 is reset to "1001" at the moment logic "1" is applied to the reset input R of the BCD counter 2. Since the strong beat control signal is obtained at the D terminal, the strong beat control signal synthesis section 3' as shown in the related example becomes unnecessary, the circuit is simplified, and a rational circuit arrangement can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the electronic metronome of the present invention, Fig. 2 is its circuit diagram, Fig. 3 is a timing chart showing waveforms of each part of the circuit, and Fig. 4 is a conventional strong beat control signal generation circuit diagram. be. 1...Tempo signal generation circuit, 2...8CD
Counter, 3...Time signature setting circuit, 4...
・・Strong beat sound generation circuit, 5 ・・Strong beat display circuit, 6 ・・Tone width control circuit, 7 ・・Waveform shaping circuit, 8 ・・・...Amplifier, 9...Speaker,
10...PUT, 1 1...Variable resistor, 12...
Time signature selection switch, 13-16...NAND gate, 17...Inverter, 1 8, 19...
...AND gate, 20...Integrator circuit, 2
1...Inverter, 22...Sound volume, 23,2
4...NAND gate, 25, 26...LED (light emitting diode). Figure 1 Figure 2 Figure 4 Figure 3

Claims (1)

[Claims] 1 Consists of a tempo signal generation circuit, a BCD counter driven by the signal, and a time signature setting circuit that resets and inputs a signal obtained by logically synthesizing the outputs to the BCD counter, and a logic "1" is given to the reset input. A method for generating a strong beat control signal for an electronic metronome, characterized in that the output of the BCD counter is instantaneously reset to "1001" to obtain a strong beat control signal at the output of the BCD counter.