JPS6032403B2 - Fail-safe signal output device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an improvement of a signal output device for a control device in which fail-safe is important in vehicle control and the like.

[Background of the Invention] Conventionally, in control devices for vehicles, etc., erroneous output is dangerous, so the output of a logic circuit is used as an alternating signal, and after amplifying this alternating signal, an alternating current coupling circuit such as a transformer is connected. The signal energy is transmitted to the output relay through the relay to drive the output relay, thereby ensuring fail-safe operation.

However, this method has the disadvantage that when the number of output relays increases, an AC coupling circuit such as a transformer is required for each output relay, resulting in a large size. Even in this case, if there is a certain relationship between the multiple output signals (for example, as long as the three output signals of 2 out of 3 are normal, all three output signals are the same). For example, it is possible to logically find failures, and fail-safety can be ensured.

However, if the properties of the plurality of output signals are unrelated to each other, unless the aforementioned AC coupling circuits are provided individually,
It is difficult to make it fail-safe. [Object of the Invention] The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to avoid the complexity and form of An object of the present invention is to provide a fail-safe signal output device that can be

[Summary of the invention]

In the present invention, a binary signal is output depending on the presence or absence of an alternating signal that alternates between two different potentials, and a signal in which the output potential without the alternating signal in normal conditions is fixed to one of the two potentials. There is a plurality of signal output means arranged such that when outputting the alternating signal they generate alternating signals in synchronization with each other.

Further, a plurality of relay elements are provided corresponding to each of these signal output means, which respond to the alternating signal and an output signal fixed to the other of the two potentials.

That is, there is no need for means for extracting only alternating current signals, such as a transformer, between each signal output means and the relay element.

Instead, this in itself cannot be fail-safe, and the relay element that receives a signal fixed at the other of the two potentials will malfunction due to a failure of the signal output means or the like. Therefore, a common failure detection means is provided which calculates the logical sum of the outputs of the plurality of signal output means and responds to the fact that the outputs do not alternate.

That is, when a plurality of signal output means are present, one of the signal output means can be configured to always generate an alternating signal, and as long as the signal output means is normal, the failure detection means does not operate.

However, if all of the plurality of signal output means stop outputting an alternating signal, or if the output of one of the signal output means is fixed at the potential of the other, the OR output will always be one of the two. The potential is fixed at , and the alternation disappears.

Therefore, an abnormality can be detected by the above-mentioned failure detection means, and fail-safe operation can be achieved. The signal output means outputs a binary signal depending on the presence or absence of an alternating signal,
It is originally impossible for the other potential output to occur.

However, it is possible that such an output may occur due to some kind of failure, and in this case, it should be detected immediately and
It is necessary to perform a protective operation. In the present invention, a common failure detection means is provided for a plurality of signal output means in a form that can operate reliably even if the characteristics of the signal outputs are unrelated to each other, thereby creating a simple and fail-safe signal output device. can be provided. [Embodiments of the Invention] The present invention will be described in detail below using embodiments shown in FIGS. 1 and 2.

FIG. 1 is a circuit diagram showing an embodiment of the output relay drive circuit of the present invention.

In FIG. 1, 11 to IN are signal output circuits such as logic circuits, and 21 to 2N are transistors that amplify logic circuit level signals to relay drive level.
Turn on, turn off. 31 to 3N are output relays.

When the signal output circuits 11 to IN such as logic circuits do not drive the respective output relays 31 to 3N, the output is extinguished by turning off the transistors 21 to 2N, and when the output relays 31 to 3N are driven, It is designed to output an alternating signal (rectangular wave). However, the phases of the alternating signals from the respective logic circuits 11 to IN are matched. That is, the signal output (logic) circuits 11 to IN output binary values (
(logical) signal, and by outputting an alternating signal, each output relay 31 is
3N are driven (turned on), the output relays 31 to 3N are turned off by disappearance of the alternating signal.

At this time, the signal output circuits 11 to IN are connected to the transistors 21
~2N must not be turned on, so the output is fixed at one of the two potentials (zero potential in this example),
It must not be at the other of the two potentials (positive potential in this example). When two or more signal output circuits 11 to IN output alternating signals, these alternating signals are configured to form rectangular waves with the same phase.

That is, the signal output circuits 11 to IN are synchronized and output alternating signals that are synchronized with each other. Further, the output relays 31 to 3N are connected to resistors 31 1 to 3N, respectively, so that the alternating signals from the logic circuits 11 to IN are driven.
1. Capacitors 312 to 3N2 are connected as shown in the figure, and the alternating signal is smoothed by the reactance of the coil of each output relay 31 to 3N and the above-mentioned resistor and capacitor. On the other hand, the emitter sides of the transistors 21 to 2N are connected together and connected to the base of the transistor 4 to perform a logical sum.

Therefore, at least one of the transistors 21 to 2N
When an alternating signal is input to transistor W, an alternating signal is input to transistor W. That is, the logical sum of the currents flowing through the output relays 31 to 3N is applied to the base of the transistor 4. This transistor 4 is turned on (short-circuited) and turned off (opened) by a logical sum, so when there is one or more alternating currents, the same on-off operation is performed regardless of the number of alternating currents. Also, transistor 2
If one of 1 to 2N is turned on and has no brim, the transistor 4 is also turned on and has no brim. The alternating signal input to the base of transistor 4 is amplified by transistors 4 and 5. The signal is converted into an alternating current signal by a transformer 6, and then rectified by a rectifier circuit 7, and the fault detection relay 8 is driven by this rectified output. By the way, for example, if the logic circuit 11 fails, the logic circuit 1
1 sends out a high-level DC output that turns on transistor 21, or when transistor 21 fails and a DC output that allows transistor 21 to drive output relay 31 is constantly provided to output relay 31. , a bias current constantly flows through transistor 4,
Transistor 4 is turned on.

Therefore, no alternating current signal exists in the transistor 4, transistor 5, and transformer 6 portion, and no current flows through the failure detection vertical electric device 8, and the failure detection relay 8 is turned off, thereby making it possible to detect a failure. The same applies to the case where the logic circuits 12 to IN and the transistors 22 to 2N fail, and when the AC circuit from the transistor 4 to the transformer 6 fails and becomes a DC circuit, and these failures can be detected. According to the embodiment of the present invention described above, even if the number of output relays increases, the transistors 4, 5, the transformer 6,
Only one protection circuit consisting of the rectifier circuit 7, failure detection relay 8, etc. is required, and the output relay drive circuit can be configured with fewer parts and downsized.

Further, if the output relay is erroneously driven due to a failure or the like, the failure detection relay 8 is turned off, and this can be used to perform necessary processing and ensure fail-safety.
Therefore, it is very effective as a vehicle-mounted device that has strong demands for miniaturization. FIG. 2 is a circuit diagram showing another embodiment of the present invention. In the case of Figure 1, the signal output circuit 1 is in normal condition.
If there is a possibility that all of 1 to IN do not generate an alternating signal, it will be detected as a failure even if it is normal. If such an inconvenience occurs, a configuration as shown in FIG. 2 may be used. That is, as shown in FIG. 2, a dummy system that outputs a normal alternating signal consisting of a logic circuit IN, a transistor 2N, and a dummy resistor 3N may be added to the circuit shown in FIG. The relay 8 is turned off only in the event of a failure. [Effects of the Invention] As explained above, according to the present invention, even if the number of signal outputs increases or the characteristics of those signal outputs are unrelated to each other, it does not become complicated, and it can be made compact. A fail-safe signal output device can be provided.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the signal output device of the invention, and FIG. 2 is a circuit diagram showing another embodiment of the invention. 11~IN...Signal output means, 21~2N, 31~3
N...Succession element, 4, 5, 6, 7, 8...Failure detection means. Figure 2

Claims (1)

[Scope of Claims] 1. A binary signal is output depending on the presence or absence of an alternating signal that alternates between two different potentials, and the output potential without an alternating signal during normal operation is fixed to one of the two potentials. The signal output means includes a plurality of signal output means configured to generate alternating signals in synchronization with each other when outputting an alternating signal, and a plurality of signal output means provided corresponding to each of these signal output means to output the above-mentioned signal. A plurality of relay elements that respond to an alternating signal from the output means and an output signal fixed to the other of the two potentials, and a common element that responds to the fact that the logical sum of the outputs of the plurality of signal output means does not alternate. A fail-safe signal output device characterized in that it is provided with a failure detection means. 2. The failure detection means is driven by a means for taking in and amplifying the plurality of signal outputs in parallel, a means for extracting and rectifying only the alternating current signal included in the output of the amplification means, and the output thereof. 2. The fail-safe signal output device according to claim 1, comprising a failure detection relay. 3. The fail-safe signal output device according to item 1, wherein one of the plurality of signal output means outputs an alternating signal that continues during normal operation.