JPS603239A - Stereophonic demodulator - Google Patents

Stereophonic demodulator

Info

Publication number
JPS603239A
JPS603239A JP10935783A JP10935783A JPS603239A JP S603239 A JPS603239 A JP S603239A JP 10935783 A JP10935783 A JP 10935783A JP 10935783 A JP10935783 A JP 10935783A JP S603239 A JPS603239 A JP S603239A
Authority
JP
Japan
Prior art keywords
phase
signal
circuit
output
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10935783A
Other languages
Japanese (ja)
Other versions
JPH0451101B2 (en
Inventor
Michinori Naito
通範 内藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TRIO KENWOOD CORP
Trio KK
Kenwood KK
Original Assignee
TRIO KENWOOD CORP
Trio KK
Kenwood KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRIO KENWOOD CORP, Trio KK, Kenwood KK filed Critical TRIO KENWOOD CORP
Priority to JP10935783A priority Critical patent/JPS603239A/en
Publication of JPS603239A publication Critical patent/JPS603239A/en
Publication of JPH0451101B2 publication Critical patent/JPH0451101B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/44Arrangements characterised by circuits or components specially adapted for broadcast
    • H04H20/46Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95
    • H04H20/47Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/1646Circuits adapted for the reception of stereophonic signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/63Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for separation improvements or adjustments

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To improve the separation of a stereophonic signal by making a composite signal outputted from an FM demodulator and an output multiplied with a subcarrier signal almost coincident with the phase of a main signal in the composite signal. CONSTITUTION:The composite signal S1 inputted to an input terminal IN is supplied to synthesis circuits 3, 5 as a signal S10 via a phase lag circuit 10. A subcarrier signal in synchronization with a pilot signal is outputted from a subcarrier wave generator 1. This subcarrier wave signal is multiplied with the composite signal by a multiplier 2 and becomes a signal S2. The signal S2 and the signal S10 are synthesized by the synthesizing circuit 3. Further, the signal S2 is passed through a phase lead circuit 11 and a phase inverter 4 to form a signal S4 and the signals S10 and S4 are synthesized by the synthesizer circuit 5. In adjusting the transfer function of the phase lag circuit 10 and the phase lead circuit 11, a right channel output signal and a left channel signal are not mixed.

Description

【発明の詳細な説明】 本発明はFM受信機に使用されるステレオ復調器に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stereo demodulator used in an FM receiver.

(従来技術) 従来の所謂マトリック方式のステレオ復調器は、第1図
に示す如(FM復調されたコンポジット信号中のパイロ
ット信号からパイロット信号に同期した副搬送波信号を
発生させる副搬送波発生器1と、副搬送波発生器1で発
生させた副搬送信号と入力端子INに供給されたコンポ
ジット信号とを乗算してサブ信号で副搬送波をAM抑圧
搬送波変調したDSB信号(以下、単にDSB信号と記
す)を復調するための乗算器2と、コンポジット信号と
乗算器2の出力とを合成する合成回路3と、乗算器2の
出力を位相反転する位相反転器4と、コンポジット信号
と位相反転器4の出力とを合成する合成回路5と、合成
回路3.5の出力から所定周波数帯域の信号のみを抽出
するローパスフィルタ6.7とを備えて構成されていた
(Prior Art) A conventional stereo demodulator of a so-called matrix type is shown in FIG. , a DSB signal (hereinafter simply referred to as a DSB signal) in which the subcarrier is AM suppressed carrier modulated by the subcarrier by multiplying the subcarrier signal generated by the subcarrier generator 1 and the composite signal supplied to the input terminal IN. a multiplier 2 for demodulating the composite signal, a combining circuit 3 for combining the composite signal and the output of the multiplier 2, a phase inverter 4 for inverting the phase of the output of the multiplier 2, and a combination of the composite signal and the phase inverter 4. It was configured to include a synthesis circuit 5 for synthesizing the output from the synthesis circuit 3.5, and a low-pass filter 6.7 for extracting only signals in a predetermined frequency band from the output of the synthesis circuit 3.5.

なお、8および9はディエンファシス回路である。Note that 8 and 9 are de-emphasis circuits.

上記の如く構成された従来のステレオ復調器によるとき
は、左右各チャンネル用に2つのスイッチング回路を必
要とするスイッチング方式のステレオ復調器に対して、
スイッチング回路がサブ信号復調のためのスイッチング
回路1つですむ利点がある。しかし、メイン信号側ライ
ンにはスイッチング回路がなく、サブ信号側ラインには
スイッチング回路が存在するため、乗算器による位相遅
れにより、サブ信号の位相が遅れる。この結果、高域周
波数における分離度が第3図において実線に示す如く悪
化する欠点があった。
When using a conventional stereo demodulator configured as described above, compared to a switching type stereo demodulator that requires two switching circuits for each left and right channel,
There is an advantage that only one switching circuit is required for sub-signal demodulation. However, since there is no switching circuit on the main signal side line and a switching circuit exists on the sub signal side line, the phase of the sub signal is delayed due to the phase delay caused by the multiplier. As a result, there was a drawback that the degree of separation at high frequencies deteriorated as shown by the solid line in FIG.

また、中間周波増幅段における選択素子においてもDS
B信号の位相は1tyiらされて、上記と同様に分離度
を悪化させる問題があった。
In addition, the selection element in the intermediate frequency amplification stage also has a DS
The phase of the B signal is shifted by 1tyi, which causes the problem of deteriorating the degree of separation, similar to the above.

またさらに、位相反転器における位相遅れにより、右側
チャンネル音声信号における分離度が悪化する欠点もあ
った。
Furthermore, there is also the drawback that the degree of separation in the right channel audio signal deteriorates due to the phase delay in the phase inverter.

(発明の目的) 本発明は上記にがんが谷なされたもので、上記の欠点を
解消して、分離度を向上させたステレオ復調器を提供す
ることを目的とする。
(Objective of the Invention) The present invention has been made in view of the above problems, and an object of the present invention is to provide a stereo demodulator that eliminates the above-mentioned drawbacks and improves the degree of separation.

この目的は本発明によれば、第1の合成回路に供給され
るコンポジット信号中のメイン信号と乗η器の出力との
位相をほぼ一致させる位相補償手段を備えるか、または
前記位相補償手段と、第2の合成回路に供給されるコン
ポジット信号中のメイン信号と位相反転器の出力との位
相をほぼ一致させる他の位相補償手段とを備えることに
より達成される。
According to the present invention, this purpose is achieved by providing a phase compensation means for substantially matching the phases of the main signal in the composite signal supplied to the first synthesis circuit and the output of the η multiplier, or This is achieved by providing another phase compensation means for substantially matching the phases of the main signal in the composite signal supplied to the second combining circuit and the output of the phase inverter.

以下、本発明を実施例によって説明する。Hereinafter, the present invention will be explained by examples.

(発明の構成) 第2図は本発明の一実施例の構成を示すブロック図であ
る。
(Configuration of the Invention) FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention.

本発明の一実施例においては、第1図に示した従来のス
テレオ復調器にさらに、位相遅れ回路10および位相進
み回路11を設け、位相遅れ回路10を介して合成回路
3および5にコンポジット信号を供給し、位相進み回路
11を介して位相反転器4に乗算器2の出力を供給しで
ある。
In one embodiment of the present invention, the conventional stereo demodulator shown in FIG. is supplied, and the output of the multiplier 2 is supplied to the phase inverter 4 via the phase lead circuit 11.

(発明の作用) 以上の如く構成した本発明の一実施例の作用について説
明する。
(Operation of the Invention) The operation of the embodiment of the present invention configured as described above will be explained.

入力端子INに供給されるコンポジット信号SIは ωC 81=(L+11.)+(L−R)sir+ωct+p
sun 「t =−(1)で表わすことができる。(1
)式の第1項はメイン信号(M=L+几)を、第2項は
D8’B信号を、第3項はパイロット信号を表わしてお
り、ωCは副搬送波の角周波数、pはパイロット信号の
振幅、(L−R)はサブ信号Sである。
The composite signal SI supplied to the input terminal IN is ωC 81=(L+11.)+(L−R)sir+ωct+p
sun ``t = - (1). (1
) The first term in the equation represents the main signal (M=L+几), the second term represents the D8'B signal, and the third term represents the pilot signal, ωC is the angular frequency of the subcarrier, and p is the pilot signal. The amplitude of (LR) is the sub-signal S.

副搬送波発生器1からはパイロット信号に同期した角周
波数ωCの副搬送波信号が出力される。
The subcarrier generator 1 outputs a subcarrier signal having an angular frequency ωC synchronized with the pilot signal.

副搬送波発生器1から出力された副搬送波信号は乗算器
2に供給され、乗算器2においてコンポジット信号と乗
算される。
The subcarrier signal output from the subcarrier generator 1 is supplied to a multiplier 2, where it is multiplied by a composite signal.

以下、パイロット信号を省略して説明する。The following description will be made with the pilot signal omitted.

いま、乗算器2による位相遅れに注目して、位相特性に
関する乗算器2の伝達関数を近似的に1/(1+jω′
v1)トスルト乗算器2ノ出力S2ハSz= 〜」(2
Msicu。t + 8−8 cos 2 G)Ct 
) 93.(2)1+JωT1 となる。ここで乗算器2は利得2の増幅器を介して出力
するものとし、この増幅器の伝達関数も’/ (1+j
o+Tl)に含まれているものとする。
Now, focusing on the phase delay caused by multiplier 2, the transfer function of multiplier 2 regarding the phase characteristics can be approximately expressed as 1/(1+jω'
v1) Torsult multiplier 2 output S2 Sz = ~''(2
Msicu. t + 8-8 cos 2 G) Ct
) 93. (2) 1+JωT1. Here, multiplier 2 is assumed to output via an amplifier with a gain of 2, and the transfer function of this amplifier is also '/ (1+j
o+Tl).

一方、位相遅れ回路10の伝達関数を 1/(1+jωT2)とすれば、位相遅れ回路10の出
力810は 510= −(M+5sinG)(t) −(3)1+
」ωT2 となる。
On the other hand, if the transfer function of the phase delay circuit 10 is 1/(1+jωT2), the output 810 of the phase delay circuit 10 is 510=-(M+5sinG)(t)-(3)1+
”ωT2.

したがって合成回路3の出力S3は ■ S3= 1+jcoT1 (2M5f+ωct+S−8
QllIS 2ωc1)帯域成分のみを取り出される。
Therefore, the output S3 of the synthesis circuit 3 is ■ S3= 1+jcoT1 (2M5f+ωct+S-8
QllIS 2ωc1) Only band components are extracted.

ローパスフィルタ6の出力S6は となる。The output S6 of the low-pass filter 6 is becomes.

ここで位相遅れ回路10の伝達関数を、Tl−T2にな
るように設定すると、出力S6は となり、左側チャンネル出力信号に右側チャンネル出力
信号が混入しない。
Here, if the transfer function of the phase delay circuit 10 is set to be Tl-T2, the output S6 will be, and the right channel output signal will not mix with the left channel output signal.

また、位相反転器4の伝達関数を一1/(1+jωT3
)、位相進み回路の伝達関数を(1+」ωT4)とする
と、位相反転器4の出力S4は 十S −5cos 2 ωct ) −−−−、(力と
なる。
Also, the transfer function of the phase inverter 4 is -1/(1+jωT3
), and the transfer function of the phase lead circuit is (1+''ωT4), then the output S4 of the phase inverter 4 becomes 1S −5 cos 2 ωct ) −−−−, (force).

そこで合成回路5の出力S5は S5:S10+84 +S−8C1ys2ω。t)・旧・・(8)となり、ロ
ーパスフィルタフにより必要な周波数帯域成分のみが取
り出される。
Therefore, the output S5 of the synthesis circuit 5 is S5:S10+84+S-8C1ys2ω. t) Old...(8), and only the necessary frequency band components are extracted by the low-pass filter.

ローパスフィルタフの出力S7は ・・・・ (9) となる。The output S7 of the low-pass filter is ...(9) becomes.

ここで位相進み回路11の伝達関数を、T4=T3にな
るように設定すると、出力S7は となり、右側チャンネル出力信号に左側チャンネル出力
信号が混入しない。
Here, if the transfer function of the phase lead circuit 11 is set so that T4=T3, the output S7 will be as follows, and the left channel output signal will not be mixed into the right channel output signal.

そこで位相遅れ回路10、位相進み回路11を挿入した
ことにより、ステレオ復調器の分離度は第3図において
破線で示した如く、従来の場合と比較してきわめて向上
する。
Therefore, by inserting the phase delay circuit 10 and the phase advance circuit 11, the degree of separation of the stereo demodulator is greatly improved compared to the conventional case, as shown by the broken line in FIG.

さらに前記した如く、ステレオ復調器に供給されるコン
ポジット信号S1 は、FM受信機におけるステレオ復
調器の前段における周波数帯域特性の影響を受け、DA
B信号は位相が遅れているのが通常である。そこでこの
位相遅れをも合せて、位相遅れ回路10により補償する
ことができる。
Further, as mentioned above, the composite signal S1 supplied to the stereo demodulator is influenced by the frequency band characteristics at the stage before the stereo demodulator in the FM receiver, and
The B signal is normally delayed in phase. Therefore, this phase delay can also be compensated by the phase delay circuit 10.

つぎに位相遅れ回路10および位相進み回路11につい
て?!11明する。
Next, what about the phase lag circuit 10 and the phase lead circuit 11? ! 11 dawn.

第4図(alおよび(b)は位相遅れ回路10および位
相進み回路11の具体例を示す回路図である。
FIGS. 4A and 4B are circuit diagrams showing specific examples of the phase delay circuit 10 and the phase lead circuit 11.

位相遅れ回路10はp44図(a)に示す如く、演算増
幅器20、抵抗21,22.コンデンサ23から構成す
ることができる。演算増幅器20の利得を■とすれば、
伝達関数は となる。ここで几は抵抗21.22の抵抗値を、Cはコ
ンデンサ23の容量を示している。
The phase delay circuit 10 includes an operational amplifier 20, resistors 21, 22 . It can be composed of a capacitor 23. If the gain of the operational amplifier 20 is ■, then
The transfer function is. Here, 几 represents the resistance value of the resistors 21 and 22, and C represents the capacitance of the capacitor 23.

また位相進み回路11は第4図(1))に示す如く、演
算増幅器20、抵抗24,25、コンデンサ26から構
成することができる。この場合の伝達jωC1+1 1 となる。ここでR1は抵抗24,25の抵抗値を、C1
はコンデンサ26の容量である。
Further, the phase advance circuit 11 can be composed of an operational amplifier 20, resistors 24, 25, and a capacitor 26, as shown in FIG. 4(1). In this case, the transmission is jωC1+1 1 . Here, R1 is the resistance value of resistors 24 and 25, and C1
is the capacitance of the capacitor 26.

つぎに本発明の他の実施例について説明する。Next, other embodiments of the present invention will be described.

第5図および第6図はそれぞれ本発明の他の実施例の構
成を示すブロック図である。
FIGS. 5 and 6 are block diagrams showing the configurations of other embodiments of the present invention, respectively.

第5図に示した本発明の他の実施例においては、本発明
の一実施例における位相遅れ回路10に代って位相進み
回路12を設け、乗算器2の出力を位相進み回路12を
介して合成回路3および位相進み回路11に供給し、合
成回路3においてコンポジット信号と位相進み回路12
の出力とを合成するように構成しである。
In another embodiment of the present invention shown in FIG. The composite signal is supplied to the combining circuit 3 and the phase lead circuit 11, and the composite signal and the phase lead circuit 12 are combined in the combining circuit 3.
It is configured to combine the output of

第6図に示した本発明の他の実施例においては、本発明
の一実施例における位相進み回路11に代って位相進み
回路13を設け、乗算器2の出力を位相進み回路13を
介して合成回路3に供給し、合成回路3において位相遅
れ回路10の出力と位相進み回路13の出力を合成する
ように構成しである。
In another embodiment of the present invention shown in FIG. The configuration is such that the output of the phase delay circuit 10 and the output of the phase lead circuit 13 are combined in the synthesis circuit 3.

第5図に示した本発明の他の実施例においては、乗算器
2による位相遅れおよびステレオ復調器の前段における
DAB信号の位相遅れは、位相進み回路12による位相
進みで補償されることになり、分離度が改善されること
は本発明の一実施例における作用からも明きらかであろ
う。
In another embodiment of the present invention shown in FIG. It will be clear from the effects of one embodiment of the present invention that the degree of separation is improved.

第6図に示した本発明の他の実施例においては位相反転
器4による位相遅れは、位相進み回路13による位相進
みで補償されることになり、分離度が改善されることは
本発明の一実施例における作用からも明らかであろう。
In another embodiment of the present invention shown in FIG. 6, the phase delay caused by the phase inverter 4 is compensated for by the phase advance caused by the phase lead circuit 13, and the degree of separation is improved. This will be clear from the operation in one embodiment.

以上説明した本発明の一実施例および他の実施例におい
ては位相反転器4による位相遅れをも補償する場合を例
示しているが、ステレオ復調器以前の回路によるDSB
信号の位相遅れが、位相反転器4による位相遅れよりも
大きく、ステレオ復調器以前の回路によるDSB信号の
位相遅れおよび乗算器2による位相遅れを補償するのみ
でも、分離度改善効果がある。したがってこの場合には
位相進み回路11.13を省略してもよい。
In the embodiment and other embodiments of the present invention described above, a case is exemplified in which the phase delay caused by the phase inverter 4 is also compensated, but the DSB due to the circuit before the stereo demodulator is
The phase delay of the signal is larger than the phase delay caused by the phase inverter 4, and even just compensating for the phase delay of the DSB signal caused by the circuit before the stereo demodulator and the phase delay caused by the multiplier 2 can have an effect of improving the degree of separation. Therefore, in this case, the phase lead circuits 11 and 13 may be omitted.

(発明の効果) 以上説明した如く本発明によれば、乗算器の出力とコン
ポジット信号とを合成する合成回路の両人力の位相をほ
ぼ一致させる第1の位相補償手段を、または第1の位相
補償手段と位相反転器の位相遅れを補償する第2の位相
補償手段とを、備えたことにより、ステレオ復調出力の
分離度は改善される。
(Effects of the Invention) As explained above, according to the present invention, the first phase compensating means or the first phase By providing the compensation means and the second phase compensation means for compensating for the phase delay of the phase inverter, the degree of separation of the stereo demodulated output is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のステレオ復調器の構成を示すブロック図
。 第2図は本発明の一実施例の構成を示すブロック図。 第3図は本発明の一実施例の作用説明に供する特性図。 第4図(a)および(b)は位相遅れ回路および位相進
み回路の一例を示す回路図。 第5図および第6図はそれぞれ本発明の他の実施例の構
成を示すブロック図。 1・・副搬送波発生器、2・乗算器、3および5・・・
合成回路、10・・・位相遅れ回路、11.12および
13・・位相進み回路。 特許出願人 トリオ株式会社 代理人 弁理士 砂子信夫
FIG. 1 is a block diagram showing the configuration of a conventional stereo demodulator. FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 3 is a characteristic diagram for explaining the operation of an embodiment of the present invention. FIGS. 4(a) and 4(b) are circuit diagrams showing an example of a phase delay circuit and a phase lead circuit. FIG. 5 and FIG. 6 are block diagrams showing the configuration of other embodiments of the present invention, respectively. 1. Subcarrier generator, 2. Multiplier, 3 and 5...
Synthesis circuit, 10... Phase delay circuit, 11.12 and 13... Phase lead circuit. Patent applicant Trio Co., Ltd. Agent Patent attorney Nobuo Sunako

Claims (1)

【特許請求の範囲】 (11FM復調器から出力されたコンポジット信号中の
パイロット信号に同期した副搬送波信号と前記コンポジ
ット信号とを乗算する乗算器と、乗算器の出力を位相反
転する位相反転器と、前記コンポジット信号と前記乗算
器の出力とを合成する第1の合成回路と、前記コンポジ
ット信号と前記位相反転器の出力とを合成する第2の合
成回路とを備えてなるステレオ復調器において、第1の
合成回路に供給されるコンポジット信号中のメイン信号
と前記乗算器の出力との位相をほぼ一致させる位相補償
手段を備えたことを特徴とするステレオ復調器。 (2)位相補償手段は第1および第2の合成回路へ供給
されるコンポジット信号の位相を遅延させる位相遅れ回
路であることを特徴とする特許請求の範囲第1項記載の
ステレオ復調器。 (3)位相補償手段は第1の合成回路へ供給する乗算器
出力の位相を進める位相進め回路であることを特徴とす
る特許請求の範囲第1項記載のステレオ復調器。 (4) FM復調器から出力されたコンポジット信号中
のパイロット信号に同期した副搬送波信号と前記コンポ
ジット信号とを乗算する乗算器と、乗算器の出力を位相
反転する位相反転器と、前記コンポジット信号と前記乗
算器の出力とを合成する第1の合成回路と、前記コンポ
ジット信号と前記位相反転器の出力とを合成する第2の
合成回路とを備えてなるステレオ復調器において、第1
の合成回路に供給されるコンポジット信号中のメイン信
号と前記乗算器の出力との位相をほぼ一致させる第1の
位相補償手段と、第2の合成回路に供給されるコンポジ
ット信号中のメイン信号と位相反転器の出力との位相を
ほぼ一致させる第2の位相補償手段とを備えたことを特
徴とするステレオ復調器。 (5)第1の位相補償手段は第1および第2の合成回路
へ供給されるコンポジット信号の位相を遅延させる位相
遅れ回路であることを特徴とする特許請求の範囲第4項
記載のステレオ復調器。 (6)第1の位相補償手段は第1の合成回路へ供給する
乗算器出力の位相を進める位相進め回路であることを特
徴とする特許請求の範囲第4項記載のステレオ復調器。 (7)第2の位相補償手段は位相反転器へ供給する乗算
器出力の位相を進める位相進め回路であることを特徴と
する特許請求の範囲第4項記載のステレオ復調器。 (8)第2の位相補償手段は第1の合成回路へ供給する
乗算器出力の位相を進める位相進め回路であることを特
徴とする特許請求の範囲第4項記載のステレオ復調器。
[Claims] (a multiplier that multiplies the composite signal by a subcarrier signal synchronized with a pilot signal in a composite signal output from an 11FM demodulator; and a phase inverter that inverts the phase of the output of the multiplier. , a stereo demodulator comprising a first combining circuit that combines the composite signal and the output of the multiplier, and a second combining circuit that combines the composite signal and the output of the phase inverter, A stereo demodulator characterized by comprising phase compensation means for substantially matching the phases of the main signal in the composite signal supplied to the first synthesis circuit and the output of the multiplier. (2) The phase compensation means comprises: The stereo demodulator according to claim 1, characterized in that the stereo demodulator is a phase delay circuit that delays the phase of the composite signal supplied to the first and second combining circuits. The stereo demodulator according to claim 1, characterized in that the stereo demodulator is a phase advance circuit that advances the phase of the multiplier output supplied to the synthesis circuit of claim 1. (4) In the composite signal output from the FM demodulator. a multiplier that multiplies the composite signal by a subcarrier signal synchronized with the pilot signal of A stereo demodulator comprising a synthesis circuit and a second synthesis circuit that synthesizes the composite signal and the output of the phase inverter.
a first phase compensation means for substantially matching the phase of a main signal in a composite signal supplied to a synthesis circuit with the output of the multiplier; and a main signal in a composite signal supplied to a second synthesis circuit. A stereo demodulator comprising second phase compensation means for substantially matching the phase with the output of the phase inverter. (5) Stereo demodulation according to claim 4, wherein the first phase compensation means is a phase delay circuit that delays the phase of the composite signal supplied to the first and second combining circuits. vessel. (6) The stereo demodulator according to claim 4, wherein the first phase compensation means is a phase advance circuit that advances the phase of the multiplier output supplied to the first synthesis circuit. (7) The stereo demodulator according to claim 4, wherein the second phase compensation means is a phase advance circuit that advances the phase of the multiplier output supplied to the phase inverter. (8) The stereo demodulator according to claim 4, wherein the second phase compensation means is a phase advance circuit that advances the phase of the multiplier output supplied to the first synthesis circuit.
JP10935783A 1983-06-20 1983-06-20 Stereophonic demodulator Granted JPS603239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10935783A JPS603239A (en) 1983-06-20 1983-06-20 Stereophonic demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10935783A JPS603239A (en) 1983-06-20 1983-06-20 Stereophonic demodulator

Publications (2)

Publication Number Publication Date
JPS603239A true JPS603239A (en) 1985-01-09
JPH0451101B2 JPH0451101B2 (en) 1992-08-18

Family

ID=14508172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10935783A Granted JPS603239A (en) 1983-06-20 1983-06-20 Stereophonic demodulator

Country Status (1)

Country Link
JP (1) JPS603239A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5010101A (en) * 1973-05-25 1975-02-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5010101A (en) * 1973-05-25 1975-02-01

Also Published As

Publication number Publication date
JPH0451101B2 (en) 1992-08-18

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