JPS6031183U - load control device - Google Patents

load control device

Info

Publication number
JPS6031183U
JPS6031183U JP12294583U JP12294583U JPS6031183U JP S6031183 U JPS6031183 U JP S6031183U JP 12294583 U JP12294583 U JP 12294583U JP 12294583 U JP12294583 U JP 12294583U JP S6031183 U JPS6031183 U JP S6031183U
Authority
JP
Japan
Prior art keywords
power supply
transistor
circuit
collector
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12294583U
Other languages
Japanese (ja)
Inventor
阿部 勇吉
Original Assignee
東芝ホームテクノ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝ホームテクノ株式会社 filed Critical 東芝ホームテクノ株式会社
Priority to JP12294583U priority Critical patent/JPS6031183U/en
Publication of JPS6031183U publication Critical patent/JPS6031183U/en
Pending legal-status Critical Current

Links

Landscapes

  • Power Conversion In General (AREA)
  • Thyristor Switches And Gates (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

−第1図は従来例を示す回路図、第2図はこの考案の一
実施例を示す回路図、第3図は第2図における各部の波
形図、第4図はこの考案の他の実施例を示す回路図であ
る。 21・・・交流電源、22・・・双方向性3端子サイリ
ス゛り、23・・・負荷、25・・・全波整流回路、2
8・・・抵抗分圧回路、29・・・直流電源、31・・
・第1のトランジスタ、32・・・パルストランス、3
3・・・第2のトランジスタ、36・・・積分回路、3
7・・・コンデンサ。
- Fig. 1 is a circuit diagram showing a conventional example, Fig. 2 is a circuit diagram showing an embodiment of this invention, Fig. 3 is a waveform diagram of each part in Fig. 2, and Fig. 4 is another implementation of this invention. FIG. 3 is a circuit diagram showing an example. 21... AC power supply, 22... Bidirectional 3-terminal thyristor, 23... Load, 25... Full wave rectifier circuit, 2
8... Resistance voltage divider circuit, 29... DC power supply, 31...
・First transistor, 32...Pulse transformer, 3
3... Second transistor, 36... Integrating circuit, 3
7... Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 交流電源と、この交流電源にゲート極付サイリスタを介
して接続される負荷と、上記交流電源に接続される全波
整流回路と、この全波整流回路の出力端間に接続される
抵抗分圧回路と、直流電源と、この直流電源にコレクタ
・エミッタが接続されるとともに上記抵抗分圧回路の分
圧点にベースが接続される第1のトランジスタと、この
第1のトランジスタに並列に接続される積分回路と、上
記直流電源にコレクタ・エミッタが上記サイリスタのゲ
ートをトリガするパルストランスの1次巻線を介して接
続されるとともに上記積分回路の出力端子にベースが接
続される第2のトランジスタと、この第2のトランジス
タのコレクタと上記第1のトランジスタのベースとの間
に接続された正帰還用コンデンサとを具備してなること
を特徴とする負荷制御装置。
An AC power supply, a load connected to this AC power supply via a gated thyristor, a full-wave rectifier circuit connected to the AC power supply, and a resistive voltage divider connected between the output terminals of this full-wave rectification circuit. A circuit, a DC power supply, a first transistor whose collector and emitter are connected to the DC power supply and whose base is connected to the voltage division point of the resistor voltage divider circuit, and a first transistor connected in parallel to the first transistor. a second transistor whose collector and emitter are connected to the DC power supply via the primary winding of a pulse transformer that triggers the gate of the thyristor, and whose base is connected to the output terminal of the integration circuit. and a positive feedback capacitor connected between the collector of the second transistor and the base of the first transistor.
JP12294583U 1983-08-08 1983-08-08 load control device Pending JPS6031183U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12294583U JPS6031183U (en) 1983-08-08 1983-08-08 load control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12294583U JPS6031183U (en) 1983-08-08 1983-08-08 load control device

Publications (1)

Publication Number Publication Date
JPS6031183U true JPS6031183U (en) 1985-03-02

Family

ID=30280826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12294583U Pending JPS6031183U (en) 1983-08-08 1983-08-08 load control device

Country Status (1)

Country Link
JP (1) JPS6031183U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131259A (en) * 1975-05-10 1976-11-15 Omron Tateisi Electronics Co Zero cross trigger circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131259A (en) * 1975-05-10 1976-11-15 Omron Tateisi Electronics Co Zero cross trigger circuit

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