JPS6030959B2 - electronic musical instruments - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for generating frequencies related to the sound generation frequency in channels provided corresponding to the number of sounds produced by time-division control in an electronic musical instrument that has a limited number of sounds produced simultaneously. .

Conventionally, as an electronic musical instrument using a digital method, a US patent vessel. 3515792 “Digital Organ” and U.S. Patent No. 3809786 "Computer Organ"
There is.

In the first method, one cycle of the required musical sound waveform is sampled, quantized, stored in ROM (memory for use only for lectures), and then replayed using one or more clocks corresponding to the keyboard. Multiply or divide by the envelope shape that has been proposed and stored in the ROM. On the other hand, in the second method, each sample point calculates each amplitude value from the stored string of high frequency coefficients Cn and the selected frequency number R using a discrete free-form algorithm. More specifically, the calculation is performed at fixed time intervals regardless of the waveform period, and the waveform sample point q is calculated by a pitch interval adder from the frequency number R corresponding to the key.
R (q = 1, 2, 3...) is calculated, and from this W harmonics are read out by a harmonic section adder, and stored harmonic coefficients representing the characteristics of the musical waveform are calculated. C
Multiplied by n, CnSin(mnqR/W), (n=1
, 2, 3,...W) are calculated. These calculations are performed in real time, so the musical sound waveform is obtained in real time. However, the above two methods have the following drawbacks.

That is, in the first method, the tone waveforms are stored in the ROM, so it is not easy to change the stored contents, and in order to obtain a large number of tone waveforms, it is necessary to store each tone waveform in a ROM. Requires a lot of unique storage. The second method has advantages over the first method, such as being able to synthesize arbitrary musical waveforms, but because the calculations are performed in real time, this computer organ requires a very high clock frequency. I need. For example, the sound wave frequency used in computer organs is up to 2.09 C7, while the sound frequency is 3.
To generate up to 2 high frequencies, it would be 4.29 Hz for a single channel, and for a polyphonic synthesis system using a single calculation channel and time-sharing into 12 tones, it would be 51.43 Hz.
This is a very high frequency, such as the MHZ clock frequency. Therefore, it is difficult and economically unwise to attempt to integrate this system. For this latter method, various methods of synthesizing musical sound waveforms have been proposed, but in general, analog processing is often used in combination, resulting in frequency-related errors, and using a D-A converter, etc., resulting in a high cost. The burden becomes heavier.

The present invention is a new invention that improves the latter method,
The purpose is to provide a digital electronic musical instrument that electronically synthesizes multiple vocal tones, has a simple configuration, and has less frequency error.

In order to achieve the above object, there is provided a key code register that stores key press data for the number of channels that can produce sounds, a note frequency data memory that is read out by time-sharing key press data according to the number of channels from the key code register, and the note A group of note frequency data registers that latches and stores data from the frequency data memory using time-division pulses according to the number of channels from a time-division control signal generator, and each octave data from the key code register is used to generate the time-division control signal. an octave data register group that latches and stores time-division pulses from the note frequency data register, a programmable counter that inputs the output of each note frequency data register and generates a frequency corresponding to the output, and a programmable counter that inputs the frequency and generates the frequency corresponding to the output of the note frequency data register. It consists of a PLL circuit that outputs a double frequency, a frequency divider row that inputs the N times frequency, and a decoder that inputs the output of the octave data register. The present invention is characterized by comprising a frequency generator group that selects an output corresponding to data, and a musical waveform generator group that receives the outputs of the frequency generators and generates a musical tone signal. The present invention will be described in detail below with reference to examples.

FIG. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention.

In the figure, the key code register 1 is, for example, the
It has a table-like configuration, and although it is not shown in the figure, it includes operations for storing key press information generated from a separately provided key assigner circuit in address positions W, ~Wk provided corresponding to the channels, and in this way. Obtained note data q~b4
The octave data is ~b on line 2, and the presence or absence of the assignment is on line 9. A read operation is performed by specifying an address corresponding to a time division control signal from. The note data on the first table line 〆 is converted into an address signal by the address decoder 2.

This address signal is sent out on line 3, and the corresponding note frequency data from note frequency data memory 5 is sent out on line 4. Note frequency data memory 5
contains binary data Q,, Q2, etc. corresponding to the number of frequency divisions.
... are stored as Dc to Dc# corresponding to 12 notes as shown in Table 2 below. Table 2: By the way, there is a line on line 5.

A time division signal corresponding to the above addressing is generated.
That is, when specifying the address of W, use the /to frequency data register (#1) 6-1 and octave data register (#1) 7 -, and when specifying the address of W2, use the note frequency data register (#1) 6-1. 2) Similarly, write W to 6-2 and octave data register (#2) 7-2.
To specify the address of note frequency data register (#k) 6-k and octave data register (#k
) A signal is sent out for 7 days each.

With this signal, the octave data on line 2 and the note frequency data on line 4 corresponding to the contents of address W are transferred to octave data register (#1) 7.
-1, which is stored in the note frequency data register (#1) 6-1. Address W2,...Wk
The octave data on line 2 and the note frequency data on line 4 corresponding to are 7-2, 6-2, respectively.
..., 71k, 61k' are stored. The data from these note frequency data register (#1) 6-1 and octave data register (#1) 7-1 is input to the frequency generator (#1) 8-1, and Data from 8-2 goes to 8-2, data from 61k, 71k goes to 8-
input to k. Frequency generator (#1) 8-1, (#2
) 8-2, ...... (#k) The outputs of 8-k are musical instrument waveform generators (#1) 9-1, (#2) 9-2, respectively.
(#k) Input to 9-k.

The musical sound waveform generator #) 9-1 (#2>9-2...(
#k) 9-k is composed of a timbre filter or a memory that stores musical waveforms. Frequency generator 8-1, 8-
2, . . . 8-k needs to be configured so that the note frequency is sent in the case of a timbre filter, and (note frequency) x (sampling number) is sent out in the case of a memory. In order to explain detailed examples below, the numerical values shown in Tables 3 and 4 below are assumed.

Table 3 Table 4 Oscillation frequency fm of main oscillator 4 = 1059.5th HZ
Then, in the fm/D column, the values obtained when this frequency is divided by each value of Dc to Dc# are written.

It can be seen that the scale frequencies C#7 to C8 are generated to such an extent that there is no problem in use. Figure 2a shows the frequency generator 8
FIG. 3 is a detailed diagram of a case where a note frequency is generated from the .

As shown in the figure, the note frequency data register 6 and the octave data register 7 are latch circuits consisting of D-type flip-flops, and each receives the time-sharing signal on line 5 from the time-sharing control signal generator 3 at its T terminal. Input the note frequency data Q, ~Q from the note frequency data memory 5 into the D terminal of the note frequency data register 6, and select one of the frequencies C#7 to C8 corresponding to the latched data Q, ~Q9. is generated by programmable counter 8a and appears on line 6. On the other hand, the key code data 0 to 0 of the key code register 1 is input to the ○ terminal of the octave data register 7. Octave data decoder 8
b can be shown in the configuration shown in b in the figure according to the values in Table 3. One of the frequencies C#7 to C8 generated on line 6 as the output of the programmable counter 8a mentioned above is divided by the 1/2 frequency divider array 8C, and the frequency is stored in the octave data register during each output. Those corresponding to the stored octave data b5, b6, 0 are selected by the AND gate array 8d via the octave data decoder 8b. 8e to which the output is input is an OR circuit. FIG. 3a is a detailed diagram of the frequency generator 8' to which a circuit for generating a frequency N times the note frequency is added. For N times the note frequency, the tone waveform generator 9 divides one period of the tone waveform by 1/
This is effective in the case of a memory that stores digital sample values divided into N parts. That is, if the aforementioned digital sample value is taken at N times the note frequency and subjected to D-A conversion, the period of the resulting musical waveform becomes the note frequency. To obtain a frequency N times the note frequency, since it is an NX fort plate, fm is N
Either double it or 1/N each of Dc to D#.

Since fm=1059.5 trillion days2, even if N is set to about 64 digital sample values, fm error MHZ will result, which is an unrealistic value. Dc ~ Dc ground various types are 1/N, etc.
Since the decomposition of the scale frequency C#7 to C8 falls short, a frequency N times the scale frequency C#7 to C8 cannot be obtained with high accuracy.

PLL (phase locked loop) explained below
A circuit is used to obtain this N times the note frequency. The outline of the circuit is the same as that shown in FIG.

The difference is that the octave data decoder 8b is placed in the position shown by the broken line in FIG.
, 8i and a frequency divider of 8j.

That is, the PLL circuit consists of a phase locked loop consisting of a phase detector 8f, a low pass filter 8g, a voltage controlled oscillator 8h and a counter 8i.

Frequency divider 8i is provided because the PLL circuit requires a symmetrical square wave signal input. The counter 8i is an (N+1)-adic counter in consideration of the frequency divider 8j. If the program counter 8a is configured so that the frequency divider 8i is unnecessary, an N-ary counter may be used. In this way, a frequency N times the note frequency is generated at 18. On the other hand, if the note frequency data and main oscillator frequency are selected appropriately, the programmable counter 8 can be used instead of the counter 8i.
It is also possible to put a. Figure 3b shows the lock-up time up to 4.
FIG. 8 is a detailed diagram of a frequency generator 8'' with an added circuit for

When the input frequency changes, the path PLL circuit requires a certain amount of time to follow and lock up. When the input frequency change is large, for example, C# (2216.
When changing from Z) to B (3953.4HZ), etc.
This lock-up time is an audible problem, as it gives the impression of a rapid glide effect to the performer, and it is desirable to minimize this change.

Therefore, it is desirable to lock the frequency on the line 16 at a frequency of about 3.2 KHZ, which is close to G (3134.7 HZ), even when not being assigned. This uses the assignment presence/absence signal generated on line 19 from the key code register to register the note frequency data register 6'.
Controls parallel AND gates within

The gates for signals Q, ~Q are directly connected to Q', ~Q'.
The data to be applied to the D terminal of the D type flip-flop is switched by applying the signal to the gate for the 9 signal through an inverting circuit. That is, according to Table 3, when the signal on the line 19 is "0" with no assignment, Q', to Q'3 are input to the programmable counter 8a, and at the same time the signal on the line 19 is inputted to the programmable counter 8a.
The above signal is branched and stored in the D terminal of the D-type flip-flop 8k, and the 12 time-sharing signal from the time-sharing control signal generator 3 closes the gate 81 to block the output of the OR circuit 8e. If the values of Q', ~Q9 are approximately 331 in decimal notation, then fm/331±3. trillion Hz, which is the desired frequency mentioned above.

331 on the IG Hayabusa display means Q',,Q'2,Q'
4, Q'7, and Q'9 may be connected and fixed as appropriate so that they become "1" and the others become "0". FIG. 4 shows an example circuit of the vibrato addition method.

The vibrato is the output Q' of the note frequency data memory 5,
This is achieved by changing Q'9. Since it is desirable that the vibrato has a nearly constant depth over the entire tone range, it is desirable that the amount of change be divided into about three stages using no data. If the amount of change is held constant, the smaller the value of D in Table 4, the deeper the vibrato. 1
For example, if the amount of change is ±10, the change will be about 35 cents in Dpu, and about ±67 cents in Dc.

From this, if the change is f(v), Dc#~D
o# is 4f(v), DB~Dc is red v), DG#~D
By producing a change in a(v), c can achieve a vibrato level that does not cause any problems in terms of intellect. FIG. 4 is constructed according to the principles described above. That is, the up/down counter 13 counts with the clock pulse from the vibrato clock oscillator 12 and generates the output at Q'', ~Q'3.If the change in Q'', ~Q'3 is f(v), the gate 16 is f(v), gate 17 is 2(v), gate 1
8 corresponds to the amount of change in 4f(v). In other words, when Dc#~Do#, the gate 18, and when DE~Dc, the gates 16 and 17 pass through the OR circuit, and DG#~
When the signal is Dc, the lines y, o, y, . ,evening,
A signal "1" occurs at 2. The outputs of these gates 16 and 17 are outputted through an adder 18' and the output of gate 18 through gates 19 and 20. switch S
W determines the pattern of vibrato change.
That is, if the output of the up-down control pulse UD of the up-down counter 13 is set to the output end S1 of the 1'2 frequency division d, a triangular wave change is generated, and if it is set to S2, which is the output of UD, a sawtooth wave change is generated. . If you want to add vibrato to a specific keyboard, install the OR gate circuit 21 at the position shown in the figure, and use "1" for the key to which you want to add vibrato, based on the keyboard-specific data of the address recorder 2. All you have to do is generate a signal. The depth of the vibrato can be adjusted by changing the weighting when the output signals of the gate 20 are added by the adder 15. As explained above, according to the present invention, note frequency data and octave data corresponding to key presses are input into a frequency generator via respective registers, and frequencies related to musical tone frequencies are obtained for each channel. It has the advantage that frequency errors are less likely to occur.

Furthermore, since the structure is simple and most of the parts can be processed by digital circuits, it is possible to emphasize the advantage that it is possible to realize an electronic musical instrument that is easy to integrate and is inexpensive.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a detailed diagram of the frequency generator of the main part of the embodiment, and FIGS. 3 a and b are explanatory diagrams of other embodiments of the present invention. FIG. 4 is an explanatory diagram of still another embodiment, in which 1 is a key code register, 2 is an address decoder, 3 is a time division control signal generator, 4 is a main oscillator, 5 is a note frequency data memory, 6,6',6
, ~k are note frequency data registers, 7, 71 ~ k are octave data registers, 8, 8', 8'', 8, ~k
is a frequency generator, 9, 9, ~k is a musical sound waveform generator, 10
indicates a sound system. Figure 2 Ship diagram Snake Figure 4

Claims (1)

[Scope of Claims] 1. A key code register that stores key press data for the number of channels that can produce sound, a note frequency data memory that is read out by time-sharing key press data according to the number of channels from the key code register, and the note. A group of note frequency data registers that latches and stores data from the frequency data memory with time-division pulses according to the number of channels from a time-division control signal generator, and each octave data from the key code register is used to generate the time-division control signal. A group of octave data registers that latch and store the time-division pulses from the instrument, a programmable counter that inputs the output of each note frequency data register and generates a corresponding frequency, and a programmable counter that inputs the frequency and generates a frequency corresponding to the frequency It consists of a PLL circuit that outputs a frequency, a frequency divider array that inputs the frequency multiplied by N, and a decoder that inputs the output of the octave data register.The output of the decoder converts each output terminal of the frequency divider array into octave data. An electronic musical instrument comprising: a group of frequency generators that select corresponding outputs; and a group of musical waveform generators that receive outputs from the frequency generators and generate musical tone signals. 2. A key code register that stores key press data for the number of channels that can produce sound, a note frequency data memory that is read out by time-sharing key press data according to the number of channels from the key code register, and data from the note frequency data memory. A group of note frequency data registers that latch and store each octave data from the key code register using time-division pulses according to the number of channels from the time-division control signal generator, and time-division pulses from the time-division control signal generator. a group of octave data registers that are latched and stored, a programmable counter that inputs the output of each note frequency data register and generates a frequency corresponding to this, and a PLL circuit that inputs the frequency and outputs a frequency N times the frequency. and a frequency divider array into which the frequency multiplied by N is input, and a decoder into which the output of the octave data register is input, and an output corresponding to the octave data is selected from each output end of the frequency divider array by the output of the decoder. A lock-up of a PLL circuit inserted between the programmable counter and the frequency divider array, comprising: a group of frequency generators having a frequency generator of 1 to 2; In order to minimize the time, a signal indicating the presence or absence of an assignment is generated from the key code register. An electronic musical instrument, characterized in that it can send data to the programmable counter. 3. A key code register that stores key press data for the number of channels that can produce sound, a note frequency data memory that is read out by time-sharing key press data according to the number of channels from the key code register, and data from the note frequency data memory. A group of note frequency data registers that latch and store each octave data from the key code register using time-division pulses according to the number of channels from the time-division control signal generator, and time-division pulses from the time-division control signal generator. a group of octave data registers that are latched and stored, a programmable counter that inputs the output of each note frequency data register and generates a frequency corresponding to this, and a PLL circuit that inputs the frequency and outputs a frequency N times the frequency. and a decoder to which the output of the octave data register is input, and an output corresponding to the octave data from each output terminal of the frequency divider array is selected by the output of the decoder. a group of frequency generators, and a group of musical sound waveform generators that receive outputs from the respective frequency generators and generate musical tone signals,
Furthermore, the output of the up-down counter that receives the output from the vibrato clock oscillator and counts it is expressed as f(v).
By shifting this output to the left, we further obtain 2f(
v), 4f(v), divides the scale frequency into a plurality of scale frequencies from the output from the note frequency data memory, and generates the outputs f(v), 2f(v), 4f of the up-down counter.
An electronic musical instrument comprising a vibrato generation circuit that adds or subtracts one or more of (v) and sends note frequency data subjected to vibrato in this manner to a programmable counter of each frequency generator.