JPS6030647U - frequency modulation circuit - Google Patents
frequency modulation circuitInfo
- Publication number
- JPS6030647U JPS6030647U JP11987683U JP11987683U JPS6030647U JP S6030647 U JPS6030647 U JP S6030647U JP 11987683 U JP11987683 U JP 11987683U JP 11987683 U JP11987683 U JP 11987683U JP S6030647 U JPS6030647 U JP S6030647U
- Authority
- JP
- Japan
- Prior art keywords
- transmission
- controlled oscillator
- resonant circuit
- voltage controlled
- signal during
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Transceivers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の周波数変調回路、第2図は本考案の実施
例の周波数変調回路を示すものである。
Qlは発振用のトランジスタ、Q2は変調用のトランジ
スタ、Llは同調ライン、L2は結合ライン、L3はチ
ョークコイル、R1−R11は抵抗、01〜CIOはコ
ンデンサ、Dlはダイオード、D2は可変容量ダイオー
ド、SWは切換スイッチ、T1は発振出力端子、T2は
制御電圧入力端子、T3は変調入力端子である。FIG. 1 shows a conventional frequency modulation circuit, and FIG. 2 shows a frequency modulation circuit according to an embodiment of the present invention. Ql is an oscillation transistor, Q2 is a modulation transistor, Ll is a tuning line, L2 is a coupling line, L3 is a choke coil, R1-R11 are resistors, 01 to CIO are capacitors, Dl is a diode, and D2 is a variable capacitance diode. , SW is a changeover switch, T1 is an oscillation output terminal, T2 is a control voltage input terminal, and T3 is a modulation input terminal.
Claims (1)
により、送信時は搬送波周波数信号を出力し、受信時は
局部発振周波数信号を出力する周波数切換手段を設け、
前記電圧制御発振器の発振−用トランジスタと前記共振
回路との接続点に、送信時に前記搬送波周波数信号を変
調する変調入力信号を増幅する緩衝増幅器の出力端子を
接続し、該緩衝増幅器のバイアス回路に前記周波数切換
手段と連動して送信時にバイアス電圧を供給し、受信時
にバイアス電圧の供給を停止する手段とを設けたことを
特徴とする周波数変調回路。A frequency switching means is provided in the resonant circuit of the voltage controlled oscillator to output a carrier frequency signal during transmission and a local oscillation frequency signal during reception according to a switching signal between transmission and reception,
An output terminal of a buffer amplifier for amplifying a modulation input signal that modulates the carrier frequency signal during transmission is connected to a connection point between the oscillation transistor of the voltage controlled oscillator and the resonant circuit, and a bias circuit of the buffer amplifier is connected to the connection point between the oscillation transistor of the voltage controlled oscillator and the resonant circuit. A frequency modulation circuit comprising means for supplying a bias voltage at the time of transmission and stopping supply of the bias voltage at the time of reception in conjunction with the frequency switching means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11987683U JPS6030647U (en) | 1983-08-02 | 1983-08-02 | frequency modulation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11987683U JPS6030647U (en) | 1983-08-02 | 1983-08-02 | frequency modulation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6030647U true JPS6030647U (en) | 1985-03-01 |
JPS6347093Y2 JPS6347093Y2 (en) | 1988-12-06 |
Family
ID=30274944
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11987683U Granted JPS6030647U (en) | 1983-08-02 | 1983-08-02 | frequency modulation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6030647U (en) |
-
1983
- 1983-08-02 JP JP11987683U patent/JPS6030647U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6347093Y2 (en) | 1988-12-06 |
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