JPS6030480B2 - How to display video signal level - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for displaying a video signal level in a television.

Accordingly, the method of displaying the video signal level in a television is configured to display the average value of the video signal level.

According to the video signal level displayed by this method,
In many cases, it is not clear how the video signal and this level correspond. SUMMARY OF THE INVENTION In order to solve the conventional drawbacks, it is an object of the present invention to enable the display of a video signal level on a television to clearly correspond to the video signal.

The video signal level display method of the present invention involves combining a pulse signal with a portion of the video signal corresponding to an arbitrarily set level (a portion of the video signal at the display level), and displaying the resulting video signal. An image is displayed, thereby making it possible to easily identify a video signal at an arbitrarily set level on the image.

The following description will be made with reference to a block diagram showing an embodiment of the present invention shown in FIG. 1 and a waveform chart showing the operation of FIG. 1 shown in FIG.

In FIG. 1, a horizontal synchronizing signal shown in FIG. 2 a is input to terminal 1, and a video signal 2 shown in FIG. 2 c is input to terminal 2.
a is input.

The horizontal synchronizing signal is input to the flip-flop 3, which repeats inversion at the falling edge of the horizontal synchronizing signal and outputs the pulse signal 3a shown in FIG. 2b. Pulse signal 3a is sent to gate 4, which is a two-input NAND gate.
is supplied to the first input of the . The video signal 2a at the terminal 2 is supplied to the first input terminal of the comparator 5, and the second
A reference voltage Vr, which is set to an arbitrary level determined by a variable resistor VR connected between the power supplies Vcc and -Vcc, is supplied to the input terminal of the . It is at the same level as before.

The video signal 2a and the reference voltage Vr are compared in voltage by a comparator 5, and if the video signal 2a has a level exceeding the reference voltage Vr, a pulse signal 5a shown in FIG. 2d is outputted from the converter 5. The pulse signal 5a is fed to the second input of the gate 4. Gate 4 outputs pulse signal 4a shown in FIG. 2e in accordance with pulse signals 3a and 5a, and supplies this to adder circuit 6. The video signal 2a is also input to the adder circuit 6, and the pulse signal 4a
and the video signal 2a, and outputs the video signal 6a shown in FIG. 2f to the terminal 7.

As is clear from the video signal 6a shown in FIG. 2f, if the lower end of each waveform shown in the figure is taken as the black level,
, the level of the portion exceeding the reference voltage Vr every other period of the horizontal synchronization signal becomes a black level signal.

Therefore, when an image is formed on a video monitor using this video signal 6a via the terminal 7, this image is an image in which the portion of the video signal 2a exceeding the reference voltage Vr is plunged in, for example, an odd or even field. In the displayed image, black scanning lines are interlaced and displayed as horizontal striped areas. Therefore, it is clear that the portion of the video signal 2a at a level higher than the reference voltage Vr can be clearly identified from such an image. Note that if the video signal 2a is arbitrarily clamped to the threshold level of the gate 4, the comparator 5 can be made unnecessary.

Furthermore, since the output of the flip-flop 3 only needs to be in the period of the horizontal synchronizing signal, the signal supplied to the terminal 1 is not limited to the above-mentioned horizontal synchronizing signal period.

In addition, FIG. 1 is a video signal 2a below the reference voltage Vr.
It is also possible to easily change the display so that the portion is displayed as a horizontally striped image area.

That is, in this case, the comparator 5 may be configured to extract the portion of the video signal 2a that is lower than the reference voltage Vr. This extracts the video signal portion between the ground potential and the reference voltage Vr, but it goes without saying that the ground potential may be set to any other reference voltage Vr'. For this purpose, for example, another comparator is provided to compare the reference voltage Vr' and the video signal 2a, the exclusive OR of the pulse signal of this comparator and the aforementioned pulse signal 5a is determined, and this result is used as an AND gate. Enter 4. Furthermore, although gate 4 has been described as operating at a logic level,
It may also be an analog gate operating at an analog level. Furthermore, although the addition circuit 61 has been described as operating at an analog level, it can also be used as a logical addition circuit by digitizing the video signal.

As explained above, according to the present invention, since the portion of the video signal in the arbitrarily set level range is clearly displayed in the horizontal striped image area, it is possible to clearly correlate this image area and the video signal. I can do it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a video signal level display circuit according to the present invention, and FIG. 2 is a waveform diagram illustrating the operation of FIG. 1. 1, 2, 7... terminal, 3... flip-flop, 4...
Gate, 5... comparator, 6... addition circuit. Figure 1 Figure 2

Claims (1)

[Claims] 1 Corresponding to the video signal portion at the above arbitrarily set voltage level generated at an arbitrary horizontal synchronizing signal cycle from a signal whose phase is inverted at an arbitrary horizontal synchronizing signal cycle and a video signal at an arbitrarily set voltage level. A video signal level display characterized in that the video signal level is obtained, the signal is superimposed on the video signal, and when displaying this image, the video signal portion at the arbitrarily set voltage level is displayed in a horizontal stripe pattern. Method.