JPS6029959A - Data block identifying circuit - Google Patents

Abstract

PURPOSE:To improve both the using efficiency and the stop position accuracy of a tape by recording the start and end point identifying signals of low frequencies of different pulse numbers at the front and back of a data block on the same track as the digital data. CONSTITUTION:A start point identifying signal 2 of 250msec and about 55 pulses and an end point identifying signal 3 of 100msec and about 22 pulses are recorded at the front and back of a data block 1. An MMB17 is driven by the output of a noise cutting comparator 16, i.e., the signals 2 and 3. At the same time, the number of pulses of signals 2 and 3 are counted by a counter 18. The count number N of the counter 18 is latched by a latch 19 when the final pulse is supplied to a monostable multivibrator 17. A CPU21 reads the contents of the latch 19 and discriminates the start or end point of the block 1 from the number N to control the drive and stop of a cassette tape.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data block identification circuit for recording digital data using a general audio cassette tape. The present invention relates to a data block identification circuit with high accuracy and high tape usage efficiency.

Conventional data block identification circuits include a method for detecting no recording, and a method for placing an identification signal on a separate track. However, with the former method, noise and crosstalk can cause malfunctions, and since the non-recorded section must be long, the tape usage efficiency will drop significantly if the number of data blocks is increased. In addition, in the latter method, the track on which the identification signal is placed cannot be used for data recording, which also results in poor tape usage efficiency.

The present invention solves the above-mentioned drawbacks of data block identification circuits.
The purpose of this invention is to provide a flock identification circuit that is resistant to noise and crosstalk, has high stop position accuracy, and is efficient in tape usage.

The following aspects provide a detailed description of the invention. FIG. 1 shows the format of data recorded on a general audio cassette tape in one embodiment of the present invention. In Figure 1, 1 is a data block, and 2501 before and after it.
isec, starting point identification signals 2 and 1 consisting of approximately 55 pulses
00m5ec, an end point identification signal 3 consisting of approximately 22 pulses is recorded. Further, on both sides of these identification signals 2.3, non-recording sections 4.5 are provided for about 1 second, taking into consideration the time lag until the tape running mechanism (not shown) stops. FIG. 2 shows a data block identification circuit according to an embodiment of the present invention, where 11 is a head that inputs all signals from the tape, 12 is an equalizer amplifier that flattens the frequency characteristics, and 13 is an auto gain control to prevent data from being dropped. 14 is a capacitor for DC cut, 15 is a low pass filter that passes only signals of 6KH2 or less, 16 is a comparator for noise cut,
17 is a triggerable mono multivibrator (hereinafter referred to as MMB) 1 driven by the comparator output 16a.
8 is a counter that counts comparator output 16ai;
19 is a latch that stores all the contents of the counter 18; 20 is a flip-flop (hereinafter referred to as FF) that inputs the carry of the counter 18; 217% is a computer (hereinafter referred to as CPU) that controls the tape running stop according to the output from each section. CPU).

Next, the operation of the apparatus after the comparator 16 in FIG. 2 will be explained with reference to chart 70 in FIG. 6. The output from the comparator 16, that is, the identification signal 2,
3 drives MMB17, and at the same time counter 1
8, the number of pulses of the identification signal 2.3 is counted. Identification signal from comparator 162. When the last pulse of 5 is input to the MMB 17, the counter 18, latch 19, and CPU 21 are triggered, and the count number of the counter 18 is taken into the latch 19. Also, Karan's evening 18
When the count number exceeds 64, F' F 20 is set. When 0PU21 has this tri-force T, first FF2
Determine the state of 0. If it is set, it is determined that it is noise, the counter 18 and FF 20i are reset, and a trigger wait is started. If FF20 is not set, 0PU
21 reads the contents of the latch 19 and performs three different operations depending on the count number N.

In other words, if 1J = 1 to 19 and N = 61 to 64, it is determined to be noise and the same operation as when FF20 was set is performed, and if N = 20 to 25 and tape running mechanism (not shown) or fast forward. , or when N = 50 to 60 and the tape running mechanism is rewinding, and the pre-input number n of jump data blocks is equal to the number of jump data blocks, the tape running mechanism is turned off once. Stop it and put it into play mode. If the number n of data blocks jumped in is not equal to the number n of data blocks jumped in, the counter 18 and FF 20Q are reset, and the trigger waits. Even if N=20 to 25 or N=50 to 60, in cases other than the above, the counter 18 and FF 20 are reset and a trigger wait occurs.

Next, selection of the frequency of the identification signal and the boundary frequency of the low-pass filter will be explained using FIG. Fourth
The figure shows the frequency components when digital data is recorded and written using the Bi-7" AIDS method. If you pay attention to this, the digital data signal has a baud rate of about fO/4.
It can be seen that it is composed of the above. Therefore, the frequency ff6152 of the identification signals 2 and 3, that is, the baud rate in the embodiment is 7000 bit/m, so the frequency is approximately 219H.
Set it to 2.

In addition, considering that the tape running speed during fast forwarding and rewinding of the tape feeding mechanism of this embodiment is 5 to 25 times faster than during playback, the boundary frequency of the low pass filter 15 is set to 6KH.
I made it z.

As described above, according to the present invention, a low-frequency start point identification signal and an end point identification signal having different numbers of pulses are recorded before and after a data block on the same track as digital data, and are detected separately. This improves tape usage efficiency and stop position accuracy.

In addition, noise is reduced by a low-pass filter and a comparator, and since the identification signal and noise are distinguished by the number of pulse counts, there are benefits such as extremely reducing malfunctions due to noise.

[Brief explanation of the drawing]

FIG. 1 is a data format recorded on a general audio cassette tape according to an embodiment of the present invention, FIG. 2 is a data block identification circuit according to an embodiment of the present invention, and FIG. 3 is an operation 11 of the present invention for explanation. Flowchart of 4th
Is the diagram digital data using Bai's fave method? FIG. 3 is a diagram illustrating the selection of the frequency of an identification signal and the frequency class of the boundary of a low-pass filter using general frequency components when recording and reproducing. 1...Data block, 2...Starting point identification signal 3...
・End point identification signal, 15...Low pass filter 16...
・Comparator, 18... Counter 19... Latch, 21... Computer and above Figure 1 Figure 3

Claims (1)

[Claims] A low-pass device for detecting a data block consisting of digital data recorded on an audio cassette tape, for detecting a start point identification signal and an end point identification signal consisting of low frequency signals recorded before and after the data block and each having a different number of pulses. A filter and a comparator, a counter and a latch for detecting either the start point or end point identification signal, and running and stopping of the cassette tape by determining the start point or end point of the data block based on the contents of the latch. A computer for controlling the data block identification circuit and a complete data block identification circuit.