JPS60263464A - Reverse-conductivity gate turn-off thyristor device - Google Patents

Reverse-conductivity gate turn-off thyristor device

Info

Publication number
JPS60263464A
JPS60263464A JP12036184A JP12036184A JPS60263464A JP S60263464 A JPS60263464 A JP S60263464A JP 12036184 A JP12036184 A JP 12036184A JP 12036184 A JP12036184 A JP 12036184A JP S60263464 A JPS60263464 A JP S60263464A
Authority
JP
Japan
Prior art keywords
region
rcd
layer
drain region
gto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12036184A
Other languages
Japanese (ja)
Inventor
Takashi Yotsudo
孝 四戸
Masayuki Asaka
浅香 正行
Katsuhiko Takigami
滝上 克彦
Hiromichi Ohashi
弘通 大橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP12036184A priority Critical patent/JPS60263464A/en
Priority to DE19853521079 priority patent/DE3521079A1/en
Publication of JPS60263464A publication Critical patent/JPS60263464A/en
Priority to US07/063,752 priority patent/US4791470A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7404Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
    • H01L29/7412Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode
    • H01L29/7416Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode the device being an antiparallel diode, e.g. RCT

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)

Abstract

PURPOSE:To prevent erroneous ignition without reducing the area occupied by a GTO region and RCD region by a method wherein a drain region is provided in an isolating region for the expulsion of excessive holes. CONSTITUTION:A drain region 22 belongs to the same P type layer as an RCD anode layer 13' and is shaped when an n<+> layer 23 is formed by selective diffusion. The drain 22 region is set at the same potential as the anode layer 13' due to an anode electrode 19. To stop the p-n-p-n structure created at the lower portion of the n<+> type layer 23 from latchup, the surface of the n<+> type layer 23 is covered by an insulating film 21. It follows therefore that holes out of the excessive carriers forced out of an RCD region (b) into an isolating region (c) are collected by a cathode electrode 16 through the drain region 22, which effectively contributes to the prevention of erroneous ignition. The drain region 22 occupies an area not larger then 20% of the RCD region, and the current present in the drain region 22 is so small as to be less than 1% of the RCD current. This means that the drain region 22 virtually functions only to eliminate excessive holes.

Description

【発明の詳細な説明】 (発明の技術分野) 本発明は、ゲートターンオフサイリスタ(GTO)と逆
導通ダイオード(RCD)を同一半導体ウェハ(ニ一体
形成してなる逆導通GTO装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a reverse conduction GTO device in which a gate turn-off thyristor (GTO) and a reverse conduction diode (RCD) are integrally formed on the same semiconductor wafer.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

逆導通GTO装置は、GTOとこれに流れる電流と逆向
きの電流を流すRCDを一体形成したもので、その−例
は、第3図に示づようなものである。GTO部aは、p
+型の第1エミッタ層11、n型の第1ベース層12、
p型の第2ベース層13、n+型の第2エミッタ層14
の4層構造からなる。第2エミッタ層14は複数に分割
されている。RCD部すは、GTO部aの第2ベース層
13と共通のp型層からなるアノード層13′″、第1
ベース層12ど共通のn型層12−1n+型力ソード層
15からなる。18は第1エミッタ層11とカソード層
15に共通に設けられたアノード電極、16は分割され
た各第2エミッタ層14に設けられたカソード電極、1
7はグー1〜電極であり、19はRCDのアノード電極
である。アノード電極19とカソード電極16どは電気
的に接続され、等電位におかれている。G T O部a
とRCD部すの間には分離領1戟Cがあり、ここに第2
7\−ス層13とアノード層13′″を実質的に分離す
るだめに溝20が形成されている。即ちこの溝20に」
:つて、GTOのグー1〜電lf!17とカソード電極
16の間にロバイアスを印加する場合に、これがRC[
)のアノード層13−を介して短絡しないようになって
いる。
A reverse conduction GTO device is one in which a GTO and an RCD that conducts a current in the opposite direction to the current flowing therein are integrally formed, and an example thereof is shown in FIG. GTO part a is p
+ type first emitter layer 11, n type first base layer 12,
P-type second base layer 13, n+ type second emitter layer 14
It consists of a four-layer structure. The second emitter layer 14 is divided into a plurality of parts. The RCD section includes an anode layer 13'' made of a p-type layer common to the second base layer 13 of the GTO section a, and a first
The base layer 12 is composed of an n-type layer 12-1 and an n+-type power sword layer 15, which are common to the base layer 12. 18 is an anode electrode provided commonly to the first emitter layer 11 and the cathode layer 15; 16 is a cathode electrode provided to each divided second emitter layer 14;
7 is the goo 1~electrode, and 19 is the anode electrode of the RCD. The anode electrode 19 and the cathode electrode 16 are electrically connected and placed at equal potential. GTO part a
There is a separate area 1C between the RCD section and the RCD section, where the second
A groove 20 is formed to substantially separate the base layer 13 and the anode layer 13''.
:GTO Goo 1~Electron lf! 17 and the cathode electrode 16, this causes RC[
) to prevent short-circuiting through the anode layer 13-.

第4図は、RCDに順方向電流IDが流れた後GTOに
正電圧VAが印加された詩の電圧、電流波形である。G
TOがオフ状態で図示のようなダイオード電流1oが流
れた場合1時刻t1玖後は再びGTOに正電圧が印加さ
れて実線で示すように電圧VAが回復して、引続きGT
Oがオフ状態を保つことが要求される。ころが、RCD
のダイオード電流IDの減少率が大きい破線のような場
合、時刻t1以後、GTOは阻止能力を失い、誤点弧し
てしまうことがあった。これはRCDの過剰キャリアが
GTOのトリガ電流として働くためである。
FIG. 4 shows voltage and current waveforms when a positive voltage VA is applied to the GTO after a forward current ID flows through the RCD. G
When the diode current 1o as shown in the figure flows with TO in the OFF state, after 1 time t1, positive voltage is applied to GTO again, voltage VA recovers as shown by the solid line, and GT continues to operate.
It is required that O remains off. Koroga, RCD
When the rate of decrease in the diode current ID is large as indicated by the broken line, the GTO loses its blocking ability after time t1 and may cause erroneous ignition. This is because excess carriers in the RCD act as a trigger current for the GTO.

即ち、ダイオード電流Inが流れている期間は、1 □
7L 1.:L RCD (7)ア/−1−”1813
−#15.ツー115へ、電子はカソード層15からア
ノード層13′へそれぞれ流れる。そして第4図の時a
’l j +になると、GTOのアノード・カソード間
電圧は時刻t1以前とは逆になり、アノードが正、カソ
ードが負になる。このどき、RCD部すに存在する過剰
電子はRCDのカソード層15がら、過剰正孔はアノー
ド層13′からそれぞれ排出される。
That is, the period during which the diode current In is flowing is 1 □
7L 1. :L RCD (7) A/-1-”1813
-#15. Electrons flow from the cathode layer 15 to the anode layer 13' to 115, respectively. And time a in Figure 4
When 'l j + is reached, the voltage between the anode and cathode of the GTO becomes opposite to that before time t1, and the anode becomes positive and the cathode becomes negative. At this time, excess electrons existing in the RCD section are discharged from the cathode layer 15 of the RCD, and excess holes are discharged from the anode layer 13'.

しかし、分離領域Cに形成された溝20句近およびGT
O部aまではみ出した過剰キャリアはRCD部すまで戻
らず、過剰電子は第1エミッタ層11を通過してアノー
ド電極18から抜は出し、それに見合った正孔の注入を
促し、過剰正孔は第2ベース層13を通過して分離領域
Cに近いゲート電極17を通り、通常GTOのdV、/
dt耐量の向上と順方向耐圧を高めるために素子外部で
ゲート・カソード間に接続される抵抗RaK(図示せず
)を通りカソード電極14へと排出される。このRah
を通って流れる電流による電圧降下が第2ベース層13
と第2エミッタ層14からなる接合のビルトインポテン
シャルに相当する最小ゲートトリガ電圧を超えると、正
孔は第2ベース層13から第2エミッタ層14を通って
カソード電極16へ広は出るようになり、それに見合っ
た電子が第2エミッタ層14から第2ベース層13に注
入されるようになる。このような動作によりGTOが誤
点弧する。この誤点弧は、ダイオード電流IDの減少率
d Ir> /d tが大きくなる程、RCD 811
bど分離領域Cに残留する過剰キャリア、特に電子にく
らべて移動度の小さい正孔の残留量が増加する為に生じ
易くなる。
However, near the groove 20 formed in the separation region C and the GT
The excess carriers that have protruded to the O section a do not return until the RCD section, and the excess electrons pass through the first emitter layer 11 and are extracted from the anode electrode 18, prompting the injection of holes commensurate with the electrons. Passing through the second base layer 13 and passing through the gate electrode 17 near the isolation region C, the
In order to improve the dt withstand capability and the forward breakdown voltage, it is discharged to the cathode electrode 14 through a resistor RaK (not shown) connected between the gate and the cathode outside the device. This Rah
The voltage drop due to the current flowing through the second base layer 13
When the minimum gate trigger voltage corresponding to the built-in potential of the junction consisting of , corresponding electrons are injected from the second emitter layer 14 to the second base layer 13. Such an operation causes the GTO to fire incorrectly. This false ignition occurs as the rate of decrease dIr>/dt of the diode current ID increases.
This is likely to occur because the amount of excess carriers remaining in the separation region C, particularly holes, which have a lower mobility than electrons, increases.

このような問題を回避するため、従来は分離領域Cの幅
を広く取り、RCD部すの過剰キャリアの影響がGTO
部aに及ばないようにすることが行われている。しかし
、分@領域Cの幅を大きくとることは、ウェハの面積を
同じとすると070部とRCD部の実質面積を減少させ
てしまうという難点があった。
In order to avoid such problems, in the past, the width of the isolation region C was made wide, so that the influence of excess carriers in the RCD section was reduced to
Measures are being taken to ensure that this does not extend to part a. However, increasing the width of the region C has the disadvantage that, assuming the same wafer area, the actual area of the 070 part and the RCD part decreases.

〔発明の目的〕[Purpose of the invention]

本弁明は上記の点に鑑み、070部とRCD部の実質面
積を減少させることなく、確実に誤点弧を防止できるよ
うにした逆導通GTO装置を提供5− することを目的とする。
In view of the above points, it is an object of the present invention to provide a reverse conduction GTO device that can reliably prevent erroneous ignition without reducing the substantial areas of the 070 section and the RCD section.

〔発明の概要〕[Summary of the invention]

本発明は、070部とRCD部の間の分離領域内に、こ
の領域にRCD部からはみ出した過剰正孔を070部の
ベース層を通すことなくカソード電極に排出するドレイ
ン領域を設けたことを特徴とする。このトレイン領域は
、RCD部のp型アノード層と同じp型層により形成さ
れ、p型アノード層と等電位に保たれる。またこのドレ
イン領域は070部への正孔のはみ出しを小さくする上
でなるべく070部に近い位置に設けること、およびそ
の面積はRCDの面積との比率とRCDとの距離を勘案
してRCD通電時にこの部分に流れる電流が充分小さく
なるように選ぶことが必要である。
The present invention provides a drain region in the separation region between the 070 part and the RCD part to drain excess holes protruding from the RCD part to the cathode electrode without passing through the base layer of the 070 part. Features. This train region is formed of the same p-type layer as the p-type anode layer of the RCD section, and is kept at the same potential as the p-type anode layer. In addition, this drain region should be provided as close to the 070 part as possible in order to reduce the protrusion of holes to the 070 part, and its area should be determined by considering the ratio to the area of the RCD and the distance from the RCD when the RCD is energized. It is necessary to select such that the current flowing through this portion is sufficiently small.

(発明の効果) 本発明によれば、過剰正孔を排出するドレイン領域を分
離領域内に設けることによって、RCDのダイオード電
流の減少率diD/dtが大きい場合にも確実にGTO
の誤点弧を防止することが6− できる。またドレイン領域を設けた結果、回路上要求さ
れるdIo/dtで誤点弧しないようにするためには、
分@領域の幅を従来より小さくすることができ、ウェハ
面積が同じならばGTO部とRCD部の実質面積を大き
くすることができる。
(Effects of the Invention) According to the present invention, by providing the drain region for discharging excess holes in the isolation region, GTO can be reliably maintained even when the reduction rate diD/dt of the RCD diode current is large.
6- It is possible to prevent erroneous ignition. Also, as a result of providing the drain region, in order to prevent erroneous firing at the dIo/dt required by the circuit,
The width of the region can be made smaller than before, and if the wafer area is the same, the actual area of the GTO section and the RCD section can be increased.

〔発明の実施例〕[Embodiments of the invention]

第1図は、本発明の一実施例の逆導通GTO装置を示す
。第3図と対応する部分には第3図と同じ符号を付しで
ある。この実施例が従来のものと異なるのは、分蘭領h
ic内にドレイン領域22を設けている点である。ドレ
イン領域22は、RCDのアノード層13′とおなしp
型層からなり、n++層23を選択拡散することにより
形成されている。ドレイン領域22はアノード電極19
によってアノード層13′と等電位に設定される。
FIG. 1 shows a reverse conduction GTO device according to an embodiment of the present invention. Parts corresponding to those in FIG. 3 are given the same reference numerals as in FIG. 3. The difference between this embodiment and the conventional one is that
The point is that a drain region 22 is provided within the IC. The drain region 22 is similar to the anode layer 13' of the RCD.
It consists of a type layer and is formed by selectively diffusing the n++ layer 23. The drain region 22 is the anode electrode 19
It is set to have the same potential as the anode layer 13'.

n++層23の下はpnpn構造となるため、この部分
がラッチアップするのを防ぐ意味でn++層23の表面
は絶縁膜21で覆っている。
Since the underside of the n++ layer 23 has a pnpn structure, the surface of the n++ layer 23 is covered with an insulating film 21 to prevent latch-up in this portion.

’ ash□、□、ア。。。1o、1工よ。’ ash□, □, a. . . 1o, 1st grade.

り層11は、表面不純物濃度1.0X1018 /CI
l+3.拡散深さ50μm、第1ベース層12は、不純
物濃度6.5X1013/cm3.厚み250μmであ
り、第2ベース層13は、表面不純物濃度lXl018
10n3.拡散深さ50μmとなるように拡散形成され
、第2エミッタ層14は、不純物濃度1019/cII
I3以上、拡散深さ10tlTrLとなるように拡散形
成されている。RCD部のカソード層15は、表面不純
物濃度2.OXl 01!I/arr3.拡散深さ70
μmであり、アノード1113′はGTO部の第2ベー
ス層13と同時に拡散形成され、またドレイン領域22
を1qるためのn++層23はGTO部の第2エミッタ
層14と同時に拡散形成される。
The layer 11 has a surface impurity concentration of 1.0×1018/CI
l+3. The first base layer 12 has a diffusion depth of 50 μm and an impurity concentration of 6.5×10 13 /cm 3 . The thickness of the second base layer 13 is 250 μm, and the surface impurity concentration lXl018
10n3. The second emitter layer 14 is formed by diffusion to have a diffusion depth of 50 μm, and has an impurity concentration of 1019/cII.
I3 or more, the diffusion depth is 10tlTrL. The cathode layer 15 in the RCD section has a surface impurity concentration of 2. OXl 01! I/arr3. Diffusion depth 70
μm, the anode 1113' is formed by diffusion at the same time as the second base layer 13 of the GTO section, and the drain region 22
The n++ layer 23 for increasing 1q is formed by diffusion at the same time as the second emitter layer 14 of the GTO section.

分離領域Cの幅は本実施例の場合、d=500μ瓦とし
、n++層23の幅はde−200μ瓦としている。
In this embodiment, the width of the isolation region C is d=500μ, and the width of the n++ layer 23 is de-200μ.

本実施例によれば、RCD811bから分離領域Cには
み出した過剰キャリアのうち正孔はドレイン領域22を
介してカソード電極16に排出され、誤点弧が効果的に
防止される。トレイン領域22の面積はRCD面積の2
0%以下であり、このときドレイン領域22に流れる電
流はRCD電流の1%にも満たない小さい値であり、ト
レイン領域22が実質的に過剰キャリア排出のためにの
み機能している。ドレイン領域を設けない従来の構造で
本実施例と同程度の誤点弧防止機能を持たせるためには
、分離領域Cの幅として1.211I#Iが必要であり
、本実施例では分離領域Cの幅が従来構造に比べて1/
2以下で済むことになる。従って従来と同じ大きさのウ
ェハを用いた場合、GTO部とRCD部の実質的な面積
を大きくすることができる。
According to this embodiment, holes among the excess carriers protruding from the RCD 811b into the separation region C are discharged to the cathode electrode 16 via the drain region 22, and erroneous firing is effectively prevented. The area of the train region 22 is 2 of the RCD area.
0% or less, and at this time, the current flowing through the drain region 22 is a small value less than 1% of the RCD current, and the train region 22 substantially functions only to discharge excess carriers. In order to have the same level of false ignition prevention function as this embodiment in a conventional structure without a drain region, the width of the isolation region C must be 1.211I#I, and in this embodiment, the isolation region The width of C is 1/1 compared to the conventional structure.
2 or less will suffice. Therefore, when a wafer of the same size as the conventional one is used, the substantial area of the GTO section and the RCD section can be increased.

第2図は本発明の他の実施例の構造である。第1図の実
施例と異なる点は、ドレイン領域22を形成するために
n++層23の代わりに溝24を形成していることであ
る。25はトレイン電極であり、カソード電極16に接
続している。これによっても、第1図の実施例と同様の
効果が得られる。
FIG. 2 shows the structure of another embodiment of the present invention. The difference from the embodiment shown in FIG. 1 is that a groove 24 is formed instead of the n++ layer 23 to form the drain region 22. 25 is a train electrode, which is connected to the cathode electrode 16. This also provides the same effect as the embodiment shown in FIG.

本発明は更に種々変形実施することができる。The present invention can be further modified in various ways.

9− 例えば、分離領域にライフタイムキラーをドープする技
術を併用すれば、より大きいdTo/dtまで安全に動
作する逆導通GTOが得られる。また分離領域の溝20
の代わりにn+型型数散層利用することもできるし、更
にこの溝20あるいはドレイン領域22を形成するため
のn++層23や溝24の部分に絶縁膜を用いてもよい
9- For example, if combined with the technique of doping the isolation region with a lifetime killer, a reverse conduction GTO that operates safely up to a larger dTo/dt can be obtained. Also, the groove 20 in the separation region
Instead, an n+ type scattering layer may be used, and an insulating film may be used for the n++ layer 23 and groove 24 for forming the groove 20 or the drain region 22.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の逆導通GTOの構造を示す
図、第2図は他の実施例の逆導通GTOの構造を示す図
、第3図は従来の逆導通GTOの構造を示す図、第4図
は逆導通GTOの動作を説明するための図である。 11・・・第1エミッタ層、12・・・第1ベース層、
13・・・第2ベース層、14・・・第2エミッタ層、
15・・・RODカソード層、13′・・・RCDアノ
ード層、16・・・カソード電極、17・・・ゲート電
極、18・・・アノード電極、19・・・RCDアノー
ド電極、20・・・溝、21・・・絶縁膜、22・・・
ドレイン領域、23・・・n+型層、24・・・溝、2
5・・・トレイン電極、10− a・・・GTO部、b・・・RCD部、C・・・分離領
域。 −11−
FIG. 1 is a diagram showing the structure of a reverse conducting GTO according to an embodiment of the present invention, FIG. 2 is a diagram showing the structure of a reverse conducting GTO according to another embodiment, and FIG. 3 is a diagram showing the structure of a conventional reverse conducting GTO. The figure shown in FIG. 4 is a diagram for explaining the operation of the reverse conduction GTO. 11... First emitter layer, 12... First base layer,
13... Second base layer, 14... Second emitter layer,
15... ROD cathode layer, 13'... RCD anode layer, 16... cathode electrode, 17... gate electrode, 18... anode electrode, 19... RCD anode electrode, 20... Groove, 21... Insulating film, 22...
Drain region, 23... n+ type layer, 24... groove, 2
5... Train electrode, 10- a... GTO section, b... RCD section, C... Separation region. -11-

Claims (1)

【特許請求の範囲】[Claims] ゲートターンオフサイリスタと逆導通ダイオードを同一
半導体ウェハに一体形成してなる逆導通ゲートターンオ
フサイリスタ装置において、ゲートターンオフサイリス
タと逆導通ダイオードの分離領域内に、逆導通ダイオー
ドのアノード層と同電位に保たれ、逆導通ダイオードの
過剰正孔をゲートターンオフサイリスタのベース層を通
さずカソード電極に排出するドレイン領域を設けたこと
を特徴とする逆導通ゲートターンオフサイリスタ装置。
In a reverse-conducting gate turn-off thyristor device in which a gate turn-off thyristor and a reverse-conducting diode are integrally formed on the same semiconductor wafer, the gate turn-off thyristor and the reverse-conducting diode are kept at the same potential in the separation region of the anode layer of the reverse-conducting diode. A reverse conduction gate turn-off thyristor device comprising a drain region for discharging excess holes of a reverse conduction diode to a cathode electrode without passing through the base layer of the gate turn-off thyristor.
JP12036184A 1984-06-12 1984-06-12 Reverse-conductivity gate turn-off thyristor device Pending JPS60263464A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP12036184A JPS60263464A (en) 1984-06-12 1984-06-12 Reverse-conductivity gate turn-off thyristor device
DE19853521079 DE3521079A1 (en) 1984-06-12 1985-06-12 REVERSE DIRECT FULL CONTROL GATE THYRISTOR ARRANGEMENT
US07/063,752 US4791470A (en) 1984-06-12 1987-06-22 Reverse conducting gate turn-off thyristor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12036184A JPS60263464A (en) 1984-06-12 1984-06-12 Reverse-conductivity gate turn-off thyristor device

Publications (1)

Publication Number Publication Date
JPS60263464A true JPS60263464A (en) 1985-12-26

Family

ID=14784292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12036184A Pending JPS60263464A (en) 1984-06-12 1984-06-12 Reverse-conductivity gate turn-off thyristor device

Country Status (1)

Country Link
JP (1) JPS60263464A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113809166A (en) * 2021-08-10 2021-12-17 西安理工大学 Having n+Zone-adjusting dual-mode GCT and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113809166A (en) * 2021-08-10 2021-12-17 西安理工大学 Having n+Zone-adjusting dual-mode GCT and preparation method thereof
CN113809166B (en) * 2021-08-10 2024-05-14 西安理工大学 Having n+Dual mode GCT of adjustment region and preparation method thereof

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