JPS60261285A - Pcm codec - Google Patents

Abstract

PURPOSE:To improve the reliability and the maintainability of a digital exchange by using a test signal generated from a test signal generator to test the connection between subscribers having PCM codecs for voice as constituting elements. CONSTITUTION:When a calling subscriber 8A dials, the test signal is generated from a test signal generating circuit 15 of a transmission-side PCM codec 6A and is outputted through a switch part 14. This test signal is sent to a reception- side codec 6B corresponding to a called subscriber 8B through a call switch circuit 4 and is applied to an input terminal 24 of the transmission-side codec 6A. This test signal is switched to a test signal collating circuit 16 by a switch 17, and the circuit 16 compares the test signal transmitted from the circuit with the received test signal, and the collation result is reported to a controller from a terminal 50-3. If the result is correct, the switch 14 of the codec 6A outputs the output of a buffer register 13 to a terminal 23, and the input of a terminal 24 is supplied to an input buffer register 18.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an audio PCM codec, more specifically,
This invention relates to a PCM signal encoder and decoder used in subscriber circuits of digital exchanges.

[Background of the invention]

In electronic exchanges, after the caller dials.

A function is required to test whether a correct switch connection has been made. In conventional digital exchanges, the above test is performed by installing test equipment on a common bus that connects subscriber circuits and switching networks, and using that test equipment to perform connection tests between subscribers. A method of performing a connection test is known.

However, since the above method uses a test device in place of the subscriber circuit, there is no way to check whether the calling and called subscriber circuits are connected correctly until the telephones begin talking to each other. When there is a fault in the line, the detection and recovery of the fault is delayed, which significantly impairs the reliability and maintainability of the exchange.

Further, a failure of the test equipment itself may render the entire exchange inoperable, and since the test equipment is used as a test equipment for all subscriber circuits, its configuration is complex, expensive, and requires space.

[Purpose of the invention]

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide means for implementing interconnection testing between originating and terminating subscribers in a digital exchange without using dedicated test equipment.

[Summary of the invention]

In order to achieve the above object, the present invention includes a connection test circuit in an audio PCM codec, which is one of the components of a subscriber circuit.

In other words, the PCM input/output function of the test signal in the test equipment overlaps with the function of the PCM codec;
Since the CM codec itself is more versatile than the other components of the subscriber circuit, such as the subscriber line interface circuit and the PCM highway interface circuit, by configuring the test circuit integrally with the PCM codec,
Since the connection test can be performed accurately and no special test equipment is required, the switching equipment can be made smaller and more economical.

[Embodiments of the invention]

FIG. 1 is a diagram showing the configuration of an embodiment of a digital exchange using a voice PCM codec according to the present invention. In the figure, a digital exchange 1 includes a plurality of subscriber circuits 2 provided corresponding to each telephone set, a PCM highway 3 to which the plurality of subscriber circuits are connected, and one or more stages connected to the highway. Communication path switch 41. It is constituted by a control device 50. Further, the subscriber circuit 2 includes a subscriber line interface circuit 5, an audio PCM codec (6A, 6B), and a PCM highway interface circuit 7. Since these configurations and operations are conventionally well known, detailed explanation thereof will be omitted.

For example, a call between telephones 8A and 8B is made by subscriber circuit 2, PC
M Highway 3. The interconnection test is carried out by connecting the call switch 4 as shown by the double arrow and setting up the line, but the interconnection test is carried out after the calling subscriber's telephone material is off-hook and the line is set up.

Before a calling signal (ring sound) is sent to the called subscriber's telephone set 8B, it is checked whether the line indicated by the double arrow line is correct. And if the test result circuit is connected correctly,
A ringing tone (bell tone) and a ringing signal are sent to the called party and the calling party, respectively.

In the present invention, a test signal for the purpose of the above-mentioned connection test is generated in the PCM codec 6A of the calling party's subscriber circuit, and the test signal is returned by the PCM codec 6B of the called party's subscriber circuit. 6 At A, the upstream signal was turned back (this can be done by comparing the I signal with the transmitted Tess I signal).
A CM codec is configured. The diagonal arrows in FIG. 1 indicate the generation S of the test signal and the return R2 verification M.

FIG. 2 shows a speech P/P according to the present invention that enables the above test.
FIG. 2 is a block diagram of an embodiment of a CM codec.

First, the flow of audio signals will be explained. On the transmitting side, an audio analog signal is input from an analog input terminal 22, an A/D converter 11 converts the analog signal into a PCM signal, and a transmitting filter 12 (filtering only the audio band)
(The order of A/I) converter 11 and transmitting filter 12 may be reversed), output PCM buffer register 13 that temporarily stores the above PCM signal for timing adjustment, and generates a signal for connection test. Test signal generation circuit 1
5 and the PCM signal from the PCM output terminal 23 via the transmission side switch section 14 for switching the PCM signal from the PCM input cover register 3.
It is output as a signal to the PCM bus. On the receiving side,
The PCM signal from the called subscriber side is sent to the PGM input terminal 24.
The test signal inputted from P and supplied to the test signal matching circuit 16 and the input PCM buffer register 18
A receiving side switch section 17 for switching between the CM signal and the CM signal, an input PC for temporarily storing the PCM signal for timing adjustment, an M buffer register 18, a receiving side filter 19 for filtering only the audio band, and the PC, M signal. The audio signal is output as an audio analog signal from an analog output terminal 25 via a D/A converter 19 that converts the audio signal into an analog signal.

Although not shown in the drawings to simplify the explanation, there is usually a straight line P between the filter 12 and the buffer register.
A converter that converts the CM signal into a PCM signal suitable for transmission (for example, the so-called A law and μ law, etc.) is arranged, and an inverse conversion that performs the inverse conversion of the above conversion is arranged between the filter 19 and the D/A converter. These A/D converters 11.
The filter 12 and the converter are called a PCM coder, and the filter 19. The inverse converter and D/A converter are called a PCM decoder.

Next, a connection test of the converter in the above embodiment will be explained.

Assuming that subscriber 8A is the caller, when the caller's dial completes the connection of the call circuit switch circuit (4 in FIG. A control signal is applied, and from this a signal is applied to the test signal generation circuit 15 to generate a test signal. The test signal passes through the switch section 14,
The signal is output from the output terminal 23 to the PCM highway at a predetermined timing. The test signal is returned via the call switch circuit 4 to the receiving codec 6B corresponding to the called party 8B (details will be described later) to the transmitting codec 6.
A is applied to input terminal 24 of A.

At this time, the switch 17JK is designed to switch the received signal to the test signal verification circuit 16, and the input terminal 24
A test signal from the input terminal is applied to the verification circuit 16. Verification circuit 1
6 compares and checks the test signal transmitted from the test signal generation circuit 15 and the received test signal while adjusting the timing with the signal from the timing generation circuit. The verification result is notified to the control device through terminal 50-3. If the verification result is correct, the switch 14 of the calling side PCM codec 6A outputs the output of the output buffer register 13 to the output terminal, and adds the input signal of the input terminal to the input buffer register 18. If the verification result is incorrect, the control circuit reconnects the switch circuit using a commonly known method.

Next, a case will be described in which the PCM codec returns a test signal on the called side.

A PCM signal, which is a test signal, is input from the input terminal 24, passes through the receiving switch 17, and is stored in the input buffer register 18. The PCM signal stored in the input PCM buffer register 18 is converted to the output PCM signal by the timing pulse from the timing pulse generation circuit 21.
/<Stored in tufa register 13. The PCM signal stored in the output PCM buffer register 13 is sent to the PCM signal via the transmission side switch section 14 having the above function.
It is output from the CM output terminal 23.

Furthermore, a signal train of test signals for the purpose of connection testing will be explained. Line failures appear as phenomena such as line disconnection, bit shift, dropping to ping 1, and bit dropout. Continuous signal strings such as all par 0''' and all "1" are not suitable as signal strings for detecting line breaks and bit deviations, but signal strings that change to 0''1111 IN are appropriate, and are suitable for detecting bit drops and bit deviations. As the signal string for detecting I/drop, two types of signal strings obtained by inverting rl Oj+/l I IN of a specific bit are suitable.

As a signal sequence that satisfies the above conditions, an alternating signal sequence that provides the simplest configuration of the device will be described below. The alternating signal string is a signal string in which rr Orare 1. IN is repeated alternately like "0101." or '1010...''.

Generation of an alternating signal sequence is expressed by equation (1).

Xi = x - (i = 2 - n) (1) Here, XS is the initial value, and n is the number of bits.

Further, the matching result of the alternating signal string is expressed by equation (2).

2,=tefJ [Yes] 7 votes ding ten ΣZk tO (i=1...n) ...(2) Here, ■ represents exclusive OR, '1o=Xtr70
=0, and when Zi=O, the verification result is correct.

Now, if y,=x5 (i==1...n), then Zn
=O, and if there is a bit that satisfies 'I i ''X i , Zn=1.

FIG. y shows the configuration of an embodiment of a test signal generation path for generating an alternating signal train. The generation circuit is composed of a toggle type flip-flop 31 with a preset. Flip
An initial value xi33 is preset in the flop 31 by a preset pulse 34. The flip-flop 31 is a toggle type flip-flop whose output is inverted by a clock input 32, and its output X−X3
5 becomes x(=mama(i=2...n)...(3) due to the feed lock pulse 32.

This is the same as equation (1).

Figure y shows a Nast signal matching circuit for matching alternating signal sequences. The verification circuit is composed of a flip-flop 41 with preset and a holding flip-flop 43 with exclusive NClR42° reset. The flip-flop 41 has an initial value - Mago 46 preset.
It is preset by pulse 47. Flip-flop 41 receives input signal y, 44 as a receiving clock.
It is stored by pulse 45. Therefore, the output signal W of the exclusive N0R42 is w,=(y1■y+-+)(i=1...n)'1o=X
+...(4)

Further, the flip-flop 43 is set to II Opg in advance by a reset pulse 48.

The flip-flop 43 is a holding type flip-flop that holds "1" regardless of the input when the output becomes rt 1 , , and its output Zi 49 is Z, :wl , +
(Q+-++Q+-2+・=+Qo)(i=1・・
・n) Z o ” O...(5) From equation (4), Z, = (y, ■y; -+) + ΣZk (i = 1... n)... (6) This is the same as equation (2).

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to easily and economically test the connection between subscriber circuits that include a voice PCM codec as one of the components, thereby improving the reliability and maintainability of digital exchanges. Effective for improvement.

[Brief explanation of the drawing]

Fig. 1 is a diagram of a connection test method between subscriber circuits using the PCM codec according to the present invention, Fig. 2 is a λ block diagram of an embodiment of the audio PCM codec according to the present invention, and Fig. 3 is the above-mentioned diagram. FIG. 4 is a circuit diagram of an embodiment of the test signal matching circuit used in the embodiment shown in FIG. 4 above. 1 Digital exchange, 2...Subscriber circuit, 3...P
CM highway, 4... Call path switch, 5... Subscriber line interface circuit, 6.6A, 6B... PCM codec for voice, 7... PCM highway interface circuit, 8, 8A, 8B.・Telephone, 9
A, 9B, 9C, IOA, IOB, IOC... Line between subscriber circuits, 11... A/D converter, 12...
Transmission side filter, 13... Output PCM buffer register, 14... Transmission side switch section, 15... Test signal generation circuit, 16... Test signal verification circuit, 17.
...Receiving side switch section, 18...Manual PCM buffer register, 19...Receiving side filter, 20...D
/A converter, 21...timing pulse generation circuit,
22... Analog input terminal, 23... PCM output terminal, 24... PCM input terminal, 25... Analog output terminal, 31... Preset toggle type flip-flop, 32... Transmission side Clock pulse, 33...
・Initial value, 34...Preset pulse, 35...
Test signal output, 41...Flip-flop with preset, 42...Exclusive N0R143.
・Retention type flip-flop with reset, 44...
Test signal input, 45...Receiving side clock pulse,
46...Initial value, 47...Preset pulse, 4
8...Reset pulse, 49...Verification result, 50
... Bacterial control 2 Figure ■ 3 Figure 1 Figure 4 Continuation of Figure 1 Page ■ Inventor: Yamakido - Husband 0 Inventor: Hiroshi Kuwabara ■ Inventor: Takuyo Kokubunji City, Higashi Koigakubo 1-28 Hata Hitachi, Ltd. Hitachi, Ltd. Central Research Laboratory 1-28 Higashi-Koigakubo, Nakokubunji City, Hitachi, Ltd. Central Research Laboratory, Hitachi, Ltd.

Claims (1)

[Claims] 1. A PCM coder, a PCM decoder, a test signal generation circuit, an output terminal, an input terminal, a signal identical to the test signal of the test signal generation circuit, and a received signal from the input terminal. an output circuit that adjusts the timing of the output signal of the PCM coder, the output of the test signal generation circuit, and the received signal from the input terminal and selectively outputs it to the output terminal; 1. A PCM codec comprising an input circuit that adjusts the timing of a received signal and selectively distributes it to any of the collation circuit, the PCM decoder, and the output circuit. 2. The PCM codec according to item 1, wherein the test signal is an alternating signal of rr OHat ], H. 3. In the PCM codec described in item 1 or 2, the output circuit has an output that inputs the output of the PCM coder and the output of the input circuit)<the output of the Zufa register, the output of the output buffer register, and the test signal generation circuit. a switch for outputting one of the input terminals, and a switch for applying the received signal from the input terminal to one of the test signal collation circuit and the output buffer or the input buffer register for outputting to the PCM decoder. A PCM codec that is characterized by: