JPS6024729A - Detecting circuit of vibration-proof type josephson down-edge - Google Patents

Abstract

PURPOSE:To detect the down-edge of a current flowing to the primary winding of a transformer by varying the state of a resistance coupling type OR circuit constituted of a resistance and a Josephson device when said current is reduced to zero. CONSTITUTION:When the current of an input signal flowing through the primary winding of the transformer 101 increases from zero toward a direction as indicated with an arrow 121, the Josephson device 103 in the detecting circuit of a vibration-proof type Josephson down-edge is switched to a resistance state at the time point when a branch current flowing through the Josephson device 103 in the secondary current induced in the direction as indicated with an arrow 122 in the secondary winding reaches a threshold level, and the current of the secondary winding of the transformer 101 is attenuated. Subsequently, said device is switched to a resistance zero state when the input signal current is reduced to zero from a prescribed value or the maximum value, its state is held and the resistance coupling type OR circuit 102 is switched. Also, a resistance 104 operates as a damping resistance in case the Josephson device 103 is switched to the resistance state and attenuates the current of the secondary winding, and operates to eliminate the vibration at current attenuation, the attenuation time is shortened, and the circuit is operated at a high speed.

Description

[Detailed Description of the Invention] The present invention is a logic circuit using a Josephson device, and sometimes various logic circuits using inductance coupling as a latch circuit path for detecting a fall in input current, and switching by current injection. Various logic circuits have been proposed. However, a logic circuit using a Josephson device has the disadvantage that it is difficult to construct an inverting circuit because it is a current-controlled circuit that uses current to control circuit switches and voltages. . Therefore, the latch circuit that detects the falling edge of the input current and stores the result (hereinafter referred to as the down edge detection circuit) is used in the master-slave logic circuit or the signal detection circuit (S, 1'14°) of the Josephson memory device. As a down edge detection circuit that detects the fall 9 of a signal current and switches it, there are a circuit that combines a current injection type Doji interferometer with a current injection type Doji interferometer that utilizes the threshold time characteristics of a two-junction Doji interferometer, and a non- A configuration in which two stages of quantum interferometers having an elementary threshold fil are connected is known. However, these conventional down edge detection circuits are either magnetically coupled frontal interferometers that switch due to inductance viscosity, or
Since a current injection quantum interferometer is used as a latch circuit, the load seen from the input terminal becomes inductance, making high-speed operation difficult. In order to ensure that the latch circuit can obtain sufficient signal amplitude gain, it is not possible to reduce the inductance of the quantum interferometer, so the area of the inductance part on the mask pattern is large, and the circuit is integrated. The drawback was that it was difficult.

On the other hand, as a Josephson circuit capable of high-speed operation and high integration, a resistance-coupled circuit is known, in which the circuit fc is configured with a resistor and a resistor. A resistor-coupled OR circuit consisting of a resistor and a Josephson device connected via a son device, and a resistor connected in parallel to the secondary winding, and the current flows to the primary winding. The circuit is obtained when the current decreases to zero.

The present invention will be described in more detail below with reference to all the drawings.

FIG. 2igX shows a down edge detection circuit using a conventionally known electron beam quantum interferometer, which is used in the sense bus of the Josephson Iaffl device.

The circuit shown in Figure ffJ1 is difficult to operate at high speed because it is directly connected to the other terminal of the Josephson device 11° and requires a Josephson device 11°. Connected in series between the two windings of the device ψ stage 101 and the input terminal of the torism-resistance combination theory sum circuit 102! 1. Josephson device 103 and transformer means 101 in a two-turn ethical sum circuit (J, 5one, T,
Yoshida and H, Abe.

Appl, Phys, Lett, Vol. 40
, A8. pp, 741-744.1982) and the well-known JAW8 Ranbuwa circuit, and the terminal 107,
It receives bias and current from lO8, and is connected to terminal 109.
The output signal is sent to 110. josephson device 1
03 is a 2-hour current induced in the secondary winding in the direction of arrow 122 when the current of the input signal flowing through the 4-hole of f-succession means increases from zero in the direction of arrow 121. When the branch current flowing through the Josephson device 103 in the transformer means 1 reaches a threshold value, it switches to the resistive state and
It acts as a non-circular resistor that reduces the current in the secondary winding of 01 and then switches the input signal current between the specified value and the maximum value. Here, the resistor 104 acts as a damping resistor when the aforementioned Josephson device 103 switches to the resistive state and attenuates the current in the secondary winding, and shortens the attenuation time by eliminating vibrations when the current is reduced. Make the circuit operate at high speed. That is, the resistor 104 mainly acts as a damping resistor for the inductance of the secondary winding of the transformer means 101, and also acts as a damping resistor for the inductance of the secondary winding of the transformer means 101, and also acts as a damping resistor for the inductance of the secondary winding of the transformer means 101. In this embodiment of the resistance-coupled OR circuit 102□r-, the same elements as those in FIG. 2 are designated by the same numbers and have the same functions. In the first embodiment, a three-junction CJL OR circuit 201t-, which is composed of three Josephson devices 202-204 and resistors 205-208, is used as a resistance-coupled logic OR circuit.

The down edge construction operation in the first embodiment is performed as follows. First, before input 1g is added, R
CJL-OR circuit 201 connects terminal 107 to terminal 10.
A bias current is energized in the direction of 8. bias'
The current value is set in consideration of the magnitude of the input signal current and the value of the valley element of the down edge detection circuit. Next, terminal 10
5. When the current of the human power signal applied to 106 increases in the direction of arrow 121, a secondary current is generated in the secondary winding of transformer Hio, i in the direction of arrow 122. This secondary power RCJ L logic circuit also does not switch. on the other hand,
Since the critical current value of the Josephson device 103 is set to a value smaller than the maximum value of the branch current of the secondary current flowing through the Josephson device 103, the Josephson device 103 resists during the rise of the secondary current. state and allow the two-day current to decay to zero with a time constant approximately defined by the inductance of the secondary winding of the transformer means 101, the equivalent valley in the resistance state of the Josephson device 103, and the damping resistor 104. . Transformer means 10102
After the storm current has been reduced to almost zero, when the human power signal R is completely reduced, the secondary winding of the transformer means 101 is indicated by the arrow 122.
A two-tonne current is generated in the direction opposite to the direction indicated by . This secondary current applies to the Josephson device 103 in the previous and attack cycles, causing the Josephson device 1031 to reset to a zero resistance state.

The two currents at this time are the Josephson device 203, which is the switching gate of the OR circuit 201.
204 flows in the same direction as the bias current.

The critical current of the Josephson device 203 and 204 is determined by RCJL from the sum of the bias current and the maximum value of the secondary current.
In the OR circuit 201, the input signal current is switched to the resistance state by the Mamashita Sefson device 202, and the output terminal 109,
An output signal appears at iio.

After the Josephson devices 202-204 switch, the transformer means 1010 secondary current is attenuated to zero by the circuit branch of resistor 205 and damping resistor 104. Here, the output signal can be taken out from terminals 107 and 108 depending on the case.

It should be noted that the reset of this down edge detection circuit is similarly performed by a known means, that is, means for reducing the bias current to zero, in a circuit using a Josephson device. On the other hand, the magnetic flux that is initially trapped in the closed loop formed by the secondary winding of the number means 102 and the Josephson devices 103, 202, and 203 performs an initial reset operation that switches the OR circuit 201 once. (by doing). This initial reset operation is the same as described above even if the digital device 202 switches first at the time of the pseudo input signal (or, conversely, when the human input signal current rises).
A wire-like result is obtained. Josephson device 202°
: If X1 switches first, the transformer means 1011.
-1;.

The secondary current in the direction of arrow 122 of the 2' winding attenuates to zero with a time constant determined by the damping resistor 104 and the parallel circuit of the Josephson device 103 and resistor 205.Subsequently, When the input signal current falls, the Josephson device 202 returns from the resistive state to the superconducting state,
The same behavior as described above is obtained.

The sum circuit 301 includes two Josephson devices 302.
303, a resistor 304, and a third bias terminal 305. The operation of the second embodiment of the down edge detection circuit using the JAWS OR circuit 301 is performed in exactly the same manner as the first embodiment. That is, at the time of the rise of the five-man power worker current, the second winding of the transformer means 101 is induced in the second winding of the transformer means 101.
The induced secondary current switches to the Josephson device 303t-resistance state when the sum of the direction of arrow 122 and the reverse current reaches the threshold of the Josephson device 303. The son device 302 switches to the resistive state and sends an output signal to the terminal i09.110. By combining four operations and circuit reset circuits, a track burying circuit, a transformer, and a transformer means, the direction of the secondary current induced on the secondary side at the rise of the signal current of the primary winding is controlled by a resistor. For the bias of the coupled logic OR circuit, make a secondary current flow in the opposite direction to the rising edge of the signal current on the secondary winding side, and add this opposite secondary current to the bias current of the resistor coupled logic OR circuit. and switching a resistor-coupled OR circuit to detect the down edge of the signal current, and for the equivalent y quantity when the Josephson device is in the resistive state and the inductance of the secondary winding of the transformer means. A damping resistor is connected in parallel to the secondary winding of the transformer means to reduce the unavoidable narrow oscillations when the current in the secondary winding decreases, thereby speeding up the current decay and increasing the resistance profile. It is characterized by using a formal OR circuit to achieve high-speed circuit operation and ?i6 implementation.

Therefore, the present invention is applicable to the ordinary CJL@chaos circuit and JAl
DCL brass circuits other than OR circuits (T.

ft., Gheewala and A., Mukherj.
ee;”Josephsondirect couple
ed logic (DCL), “Ihi) M1979
Tech, Dig-, I) p, 482 (1979)
) and 46-Similarly to the second embodiment, the objectives of high-speed operation and high integration of the present invention are achieved.

[Brief explanation of the drawing]

゛・: Fig. 1 shows an example of a conventionally known down edge detection circuit using a current injection quantum interferometer, and Fig. 4 shows a second embodiment of the edge protruding circuit. It is something that In the figure, 11.12.17・
...Josephson device, 13, f4...Inductance, 15...Quantum cyclone, 16...Transformer, 1
8.19...Resistor, 21,22...Signal input terminal,
23.24...Bias terminal and output terminal, lOl...
・Transformer means, 102...Resistor-coupled OR circuit, 1
03...Joseph Sondeno for nonlinear resistance (chair, 10
4... Damping resistor, 105.106... Signal input terminal, 107.108... Bias terminal, 109,
llO...Output terminal, 121...Direction of current in the primary winding of the transformer means, 122...Direction of current in the secondary winding of the transformer means, 201...L CJI, logical sum circuit, 2
02.203.204...Constituting an OR circuit--
Cefson device, 205.206.207, Josephson device that flies a 7g kite, 304...Resistor that grounds both OR circuits, 305...Third bias terminal. 72 Figure 2 (72 Figure/θ8 Year 3 Figure/θ? 111g3 30/ μ

Claims (1)

[Claims] The primary winding, the 2nd winding, and the fc were threatening each other.
M is connected to the transformer M, through a Josephson device fitted in series with the secondary winding, ', -j
・・・