JPS60242774A - Deflection distortion correcting circuit of cathode-ray tube display device - Google Patents

Deflection distortion correcting circuit of cathode-ray tube display device

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Publication number
JPS60242774A
JPS60242774A JP9984484A JP9984484A JPS60242774A JP S60242774 A JPS60242774 A JP S60242774A JP 9984484 A JP9984484 A JP 9984484A JP 9984484 A JP9984484 A JP 9984484A JP S60242774 A JPS60242774 A JP S60242774A
Authority
JP
Japan
Prior art keywords
voltage
waveform
ray tube
circuit
vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9984484A
Other languages
Japanese (ja)
Inventor
Masahiro Sugano
菅野 昌博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9984484A priority Critical patent/JPS60242774A/en
Publication of JPS60242774A publication Critical patent/JPS60242774A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To correct sufficiently right and left pin cushion distortion at the entire range of a cathode ray tube raster even when a vertical blanking time is short by applying a waveform having steep rising to the vertical blanking part of an output of a sawtooth wave generating circuit, that is, a waveform of a vertical deflection output circuit to correct a voltage waveform modulating a horizontal deflection circuit. CONSTITUTION:The output voltage of a vertical deflection output circuit 8 is steep at the rise of a part where a vertical blanking period is started. The input voltage wave of a phase inverting circuit 4 is corrected by adding a proper amount of the steep part. Thus, even if the vertical blanking time in a CRT sweep is short, the pin cushion distortion at upper and lower parts of the cathode ray tube screen raster is corrected sufficiently.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明はディスプレイモニタ装置等に用いられるブラ
ウン管表示装置(以下CRTと略記する)の左右糸巻き
ひずみ補正回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a left-right pincushion distortion correction circuit for a cathode ray tube display device (hereinafter abbreviated as CRT) used in a display monitor device or the like.

〔従来技術〕[Prior art]

ディスプレイモニタ装置で使用されるブラウン管は螢光
面が電子ビームの偏向点を中心とした球面ではなく、ブ
ラウン管の周辺はど偏向点からの距離が大きくなってい
るので、偏向した場合、そのラスタ(raster)に
は糸巻き状のひずみを生ずる。これらのひずみは上下糸
巻きひずみ、左右糸巻きひずみと呼ばれている。
The fluorescent surface of cathode ray tubes used in display monitor devices is not a spherical surface centered on the deflection point of the electron beam, but the distance from the deflection point to the periphery of the cathode ray tube is large, so when the electron beam is deflected, the raster ( (raster) produces pincushion-like distortion. These strains are called vertical pincushion strain and left/right pincushion strain.

第1図は左右糸巻きひずみを補正するだめの従来の回路
を示すブロック図であって、図において、(11は垂直
のこぎ夛波発生回路。(2)と(3)は電圧分割用抵抗
、(4)は位相反転回路、(5)は乗算回路、(6)は
位相反転回路、(7)は水平偏向回路である。
FIG. 1 is a block diagram showing a conventional circuit for correcting left-right pincushion distortion. (4) is a phase inversion circuit, (5) is a multiplication circuit, (6) is a phase inversion circuit, and (7) is a horizontal deflection circuit.

また第2図は第1図の各部の電圧の波形を示すもので、
囚は垂直のこぎ9波発生回路(11の出力電圧、(B)
は位相反転回路(4)の入力電圧、(C)は位相反転回
路(4)の出力電圧、(D)は乗昇回M (s+の出力
電圧、■)は位相反転回路(6)の出力電圧である。第
2図(Fl。
Also, Figure 2 shows the voltage waveforms at each part in Figure 1.
The prisoner is a vertical saw 9 wave generation circuit (11 output voltages, (B)
is the input voltage of the phase inversion circuit (4), (C) is the output voltage of the phase inversion circuit (4), (D) is the output voltage of the multiplication circuit M (s+), and ■ is the output of the phase inversion circuit (6). It is voltage. Figure 2 (Fl.

(Gl 、 (I()の波形については後節で説明する
The waveform of (Gl, (I()) will be explained in a later section.

CRTに垂直方向の掃引金与えるだめの電圧は垂直のこ
ぎシ波発生回路(1)Kよって第2図囚のような電圧が
発生されるが、これを電圧分割抵抗(2)。
The voltage that is applied to the CRT in the vertical direction is generated by the vertical sawtooth wave generator circuit (1), as shown in Figure 2, which is divided by the voltage dividing resistor (2).

(3)によ、!lll第2図(B)に示すような適当な
振幅11にの電圧にし、位相反転回路(4)によってこ
の波形を反転して第2図(9に示す波形の電圧を発生す
る。時間をtとし、電圧値をyとし、説明を簡単にする
ため第2図(B)、 TC)において1=0の点でy=
Qとすれば、第2図(B)の波形はyB=−at で表
わされ、第2図(C)の波形はy=atで表わされ、乗
算回路(5)において、B、yo= −a2 t2・・
・(1]のパラボラ波形電圧を得る。第2図(6)に示
す電圧は式+11の形の電圧が乗算回路(5)中の増幅
器により位相が反転され、かつ直流レベルが変化して出
力されたものを表し、これを位相反転回路(6)で第2
図(6)に示す形に反転して、この′電圧で水平偏向回
路(7)の出力を振幅変調する。この振幅変調の結果、
CRTの垂直掃引の開始点(すなわちブラウン管面のラ
スタの上端)では水平偏向電圧が最も小さく中心部分に
うつるに従って水平偏向電圧が大きくなり中心で最大と
なって中心から下方にうつるに従って小さくなシ、CR
Tの垂直掃引の終点(すなわちブラウン管面のラスタの
下端)で最小となるのでCRT画面上に現われる左右の
糸巻きひずみを補正することができる。
(3) Yo! The voltage is set to an appropriate amplitude 11 as shown in FIG. 2 (B), and this waveform is inverted by the phase inversion circuit (4) to generate a voltage with the waveform shown in FIG. 2 (9). , and the voltage value is y. To simplify the explanation, y = 0 at the point 1 = 0 in Figure 2 (B), TC).
If Q, the waveform in FIG. 2(B) is expressed as yB=-at, and the waveform in FIG. 2(C) is expressed as y=at, and in the multiplier circuit (5), B, yo = -a2 t2...
・Obtain the parabolic waveform voltage in (1).The voltage shown in Figure 2 (6) is the voltage in the form of equation +11, whose phase is inverted by the amplifier in the multiplier circuit (5), and the DC level is changed before being output. The phase inversion circuit (6)
The voltage is inverted to the form shown in FIG. 6, and the output of the horizontal deflection circuit (7) is amplitude-modulated using this voltage. As a result of this amplitude modulation,
At the starting point of the CRT's vertical sweep (i.e., at the top of the raster on the cathode ray tube surface), the horizontal deflection voltage is smallest, increasing as it moves toward the center, reaching its maximum at the center, and decreasing as it moves downward from the center. CR
Since the minimum value is reached at the end point of the vertical sweep of T (ie, the bottom end of the raster on the cathode ray tube surface), it is possible to correct the left and right pincushion distortion that appears on the CRT screen.

然し、従来の回路には次のような欠点があった。However, the conventional circuit has the following drawbacks.

すなわち、第1図■に示す垂直のこぎ)波は理想的な波
形であって、掃引の終点から次の周期の掃引の始点まで
の間の時間が0になっているが、実際に垂直のこぎり波
発生回路111から出力される波形は第2図Fに示すよ
うに、1つの掃引の終点t□から次の掃引の開始点t2
までには所定の時間を必要としこの間の直線をy = 
bt で表すと、t0〜t2の部分に対応する乗算回路
(5)の出力は−b2 t2の形のパラボラ波形電圧と
なり、これが式(1)で示すパラボラ波形電圧の両側に
生じるだめ、乗算回路(5)から出力されるパラボラ′
電圧波形は第2図(G)に示す波形になる。
In other words, the vertical saw wave shown in Figure 1 (■) is an ideal waveform, and the time from the end point of the sweep to the start point of the next cycle's sweep is 0, but it is actually a vertical saw wave. As shown in FIG. 2F, the waveform output from the wave generation circuit 111 changes from the end point t□ of one sweep to the start point t2 of the next sweep.
It takes a certain amount of time to
Expressed as bt, the output of the multiplier circuit (5) corresponding to the portion from t0 to t2 becomes a parabolic waveform voltage of the form -b2 t2, and this occurs on both sides of the parabolic waveform voltage shown in equation (1), so the multiplier circuit (5) Parabola′ output from (5)
The voltage waveform becomes the waveform shown in FIG. 2(G).

CRT掃引の垂直ブランキング時間が長くて、第2図(
6)に示す波形のうち−a2t2の形のパラボラ波形電
圧の部分だけが利用される場合は問題ないが、第2図面
に示すように、垂直ブランキング時間が短い場合は、第
2図面にτで示す時間の間(すなわちブラウン管面ラス
タの上、下端部分)は糸巻きひずみを補正することがで
きない。
The vertical blanking time of the CRT sweep is long, as shown in Figure 2 (
There is no problem if only the -a2t2 type parabolic waveform voltage part of the waveform shown in 6) is used, but if the vertical blanking time is short as shown in the second drawing, τ The pincushion distortion cannot be corrected during the time indicated by (that is, the upper and lower end portions of the cathode ray tube surface raster).

〔発明の概要〕[Summary of the invention]

この発明は上記のような従来のものの欠点を除去するた
めになされたもので、この発明では、のこぎシ波発生回
路の出力の垂直帰線部に立上シの急な波形、すなわち、
垂直偏向出力回路の波形を加えることによって水平偏向
回路を変調する電圧波形を補正した。
This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and in this invention, the vertical retrace part of the output of the sawtooth wave generation circuit has a sharp rising waveform, that is,
The voltage waveform modulating the horizontal deflection circuit was corrected by adding the waveform of the vertical deflection output circuit.

〔発明の実施例〕[Embodiments of the invention]

以下この発明の実施例を図面について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第3図はこの発明の一実施例を示すブロック図で、第1
図と同一符号は同−又は相当部分を示し、(8)は垂直
偏向出力回路、(9)は結合コンデンサ、uOは結合抵
抗である。第4図は第3図の各部の電圧波形を示す波形
図であって、第4図(4)は垂直偏向出力回路(8)の
出力電圧波形、第4図(B)は垂直のこぎシ波発生回路
(1)の出力波形、第4図(C)は位相反転回路(4)
の入力波形、第4図0は位相反転回路(6)の出力波形
を示す。
FIG. 3 is a block diagram showing one embodiment of the present invention.
The same reference numerals as in the figure indicate the same or equivalent parts, (8) is a vertical deflection output circuit, (9) is a coupling capacitor, and uO is a coupling resistor. FIG. 4 is a waveform diagram showing the voltage waveform of each part in FIG. 3, where FIG. 4 (4) is the output voltage waveform of the vertical deflection output circuit (8), and FIG. The output waveform of the wave generation circuit (1), Figure 4 (C) is the phase inversion circuit (4)
FIG. 40 shows the output waveform of the phase inversion circuit (6).

垂直偏向出力回路18)の出力電圧は第4図(2)に示
すとおル垂直帰線期間のはじまる部分の立上りが急峻で
ある。この急峻な部分を第4図(B)に示す波形に適当
な量だけ加えて位相反転回路(4)の入力電圧波形を第
4図(C)に示すとおりに補正する。第4図(C1に示
す波形は第2図(B)に示す理想的波形に近く、第2図
(F’)に示す波形(第4図(B)の波形に相当する)
よりもt□〜t2の間の時間が充分に短縮されているの
で、CRT掃引において垂直ブランキング時間が短い場
合においても、ブラウン管面ラスタの上、下端部分にお
ける糸巻きひずみを充分に補正することができる。
As shown in FIG. 4(2), the output voltage of the vertical deflection output circuit 18) has a steep rise at the beginning of the vertical retrace period. By adding an appropriate amount of this steep portion to the waveform shown in FIG. 4(B), the input voltage waveform of the phase inversion circuit (4) is corrected as shown in FIG. 4(C). Figure 4 (The waveform shown in C1 is close to the ideal waveform shown in Figure 2 (B), and the waveform shown in Figure 2 (F') (corresponds to the waveform in Figure 4 (B))
Since the time between t□ and t2 is sufficiently shortened, even when the vertical blanking time is short in CRT sweep, pincushion distortion at the upper and lower end portions of the cathode ray tube surface raster can be sufficiently corrected. can.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、垂直ブランキング時間
が短い場合においても、左右糸巻きひずみをブラウン管
うスクの全範囲において充分に補正することができる。
As described above, according to the present invention, even when the vertical blanking time is short, left-right pincushion distortion can be sufficiently corrected over the entire range of the cathode ray tube.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の1川路を示すブロック図、第2図は第1
図の各部の電圧波形を示す波形図、第3図はこの発明の
一実施例を示すブロック図、第4図は第3図の各部の電
圧波形を示す波形図である。 (1)・・・垂直のこぎり波発生回路、(4)・・・位
相反転回路、(5)・・・乗算回路、(7)・・・水平
偏向回路、(8)・・・垂直偏向出力回路。 尚、各図中同一符号は同−又は相当部分を示す。 代理人大岩増雄 門ヒ・ −1)−・ 一1I4−垂直グラ/キング時間 露n
Figure 1 is a block diagram showing the conventional 1-river route, and Figure 2 is a block diagram showing the 1st river route.
FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. 4 is a waveform diagram showing voltage waveforms at various parts in FIG. 3. (1) Vertical sawtooth generation circuit, (4) Phase inversion circuit, (5) Multiplier circuit, (7) Horizontal deflection circuit, (8) Vertical deflection output circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Oiwa Masuomon Hi・-1)-・11I4-Vertical graph/King time dew n

Claims (1)

【特許請求の範囲】 ブラウン管表示装置の垂直偏向に用いる垂直のこぎ少波
電圧とこの電圧の波形を反転した波形の電圧とを乗算し
て時間に対しパラボラ状に変化するパラボラ波形電圧を
発生させ、このパラボラ波形電圧によシ上記ブラウン管
表示装置の水平偏向に用いる水平偏向電圧を変調して上
記ブラウン管表示装置の表示面における左右糸巻きひず
みを補正するブラウン管表示装置の偏向ひずみ補正回路
において、 上記ブラウン管表示装置の垂直偏向出力回路の出力電圧
を所定の割合で上記垂直のこぎ勺波電圧に加算して垂直
のこぎシ波電圧の立上シ波形を改善し、この波形を改善
した垂直のこぎシ波電圧から上記パラボラ波形電圧を発
生することを特徴とするブラウン管表示装置の偏向ひず
み補正回路。
[Claims] A parabolic waveform voltage that changes parabolically with respect to time is generated by multiplying a vertical saw short wave voltage used for vertical deflection of a cathode ray tube display device by a voltage with a waveform obtained by inverting the waveform of this voltage. , in a deflection distortion correction circuit for a cathode ray tube display device, which modulates a horizontal deflection voltage used for horizontal deflection of the cathode ray tube display device using the parabolic waveform voltage to correct left-right pincushion distortion on the display surface of the cathode ray tube display device, The output voltage of the vertical deflection output circuit of the display device is added to the vertical sawtooth voltage at a predetermined ratio to improve the rising waveform of the vertical sawtooth voltage. A deflection distortion correction circuit for a cathode ray tube display device, characterized in that the parabolic waveform voltage is generated from a wave voltage.
JP9984484A 1984-05-16 1984-05-16 Deflection distortion correcting circuit of cathode-ray tube display device Pending JPS60242774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9984484A JPS60242774A (en) 1984-05-16 1984-05-16 Deflection distortion correcting circuit of cathode-ray tube display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9984484A JPS60242774A (en) 1984-05-16 1984-05-16 Deflection distortion correcting circuit of cathode-ray tube display device

Publications (1)

Publication Number Publication Date
JPS60242774A true JPS60242774A (en) 1985-12-02

Family

ID=14258109

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9984484A Pending JPS60242774A (en) 1984-05-16 1984-05-16 Deflection distortion correcting circuit of cathode-ray tube display device

Country Status (1)

Country Link
JP (1) JPS60242774A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0662674U (en) * 1992-03-27 1994-09-02 日本ビクター株式会社 Horizontal deflection amplitude modulation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0662674U (en) * 1992-03-27 1994-09-02 日本ビクター株式会社 Horizontal deflection amplitude modulation circuit

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