JPS6024140U - Overcurrent limit circuit - Google Patents
Overcurrent limit circuitInfo
- Publication number
- JPS6024140U JPS6024140U JP11268983U JP11268983U JPS6024140U JP S6024140 U JPS6024140 U JP S6024140U JP 11268983 U JP11268983 U JP 11268983U JP 11268983 U JP11268983 U JP 11268983U JP S6024140 U JPS6024140 U JP S6024140U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- resistor
- terminal
- potential
- current limiting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１． ２． ３及び４図は従来の過電流制限回路を示
した回路図、第５図は本考案の一実施例を示した回路図
、第６図は本考案の他の実施例を示した回路図である。
１：負荷、１０．１１：端子（−次端子）、１２．１３
：端子（二次端子）、１４：トランジスタ（スイッチン
グ素子）、１５：フォトカブラ、１６：オペアンプ、Ｒ
１０：電流制限抵抗、Ｒ２０：第２抵抗、Ｒ３０：第３
抵抗、Ｒ４：第４抵抗、ＰＤ：発光ダイオード、ＰＴ：
フ第１・トランジスタ、Ｒ１２：ハイアス抵抗。
第３図
第５図1st. 2. Figures 3 and 4 are circuit diagrams showing conventional overcurrent limiting circuits, Figure 5 is a circuit diagram showing one embodiment of the present invention, and Figure 6 is a circuit diagram showing another embodiment of the present invention. be. 1: Load, 10.11: Terminal (-next terminal), 12.13
: Terminal (secondary terminal), 14: Transistor (switching element), 15: Photocoupler, 16: Operational amplifier, R
10: Current limiting resistor, R20: Second resistor, R30: Third
Resistor, R4: Fourth resistor, PD: Light emitting diode, PT:
F1 transistor, R12: High-ass resistor. Figure 3 Figure 5
Claims (1)
端子を備えた４端子回路網を形成し、前記−次端子の一
方に電流制限抵抗の一端を接続すると共に該電流制限抵
抗と並列に制御端子を有するスイッチング素子の電路電
極を接続し、前記電流制限抵抗の他端をブリッジ回路の
一辺の第３抵抗を介して前記二次端子の一方−１接続す
ると共にブリッジ回路の他の一辺の第２および第４抵抗
の直列回路を介して前記二次端子の他方に接続し、更に
前記−次端子と二次端子の他方を接続し、前記ブリッジ
回路の第２抵抗と第４抵抗との接続点の電位が前記第３
抵抗と負荷の接続点となる前記二次端子の一方の電位を
上回ったときに前記スイッチング素子の制御端子に不導
通バイアスを印加し、下回ったときに導通バイアスを印
加する回路を設けたことを特徴とする過電流制限回路。A four-terminal circuit network is formed that includes a primary terminal to which a power supply is input and a secondary terminal to which a load is connected, and one end of a current limiting resistor is connected to one of the negative terminals, and the circuit is connected in parallel with the current limiting resistor. A circuit electrode of a switching element having a control terminal is connected to the current limiting resistor, and the other end of the current limiting resistor is connected to one of the secondary terminals via a third resistor on one side of the bridge circuit. is connected to the other of the secondary terminals through a series circuit of second and fourth resistors, and further connects the second terminal to the other of the secondary terminals, and connects the second resistor and fourth resistor of the bridge circuit. The potential of the connection point is the third
A circuit is provided that applies a non-conducting bias to the control terminal of the switching element when the potential exceeds the potential of one of the secondary terminals that is a connection point between the resistor and the load, and applies a conductive bias when the potential falls below the potential. Features an overcurrent limiting circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11268983U JPS6024140U (en) | 1983-07-20 | 1983-07-20 | Overcurrent limit circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11268983U JPS6024140U (en) | 1983-07-20 | 1983-07-20 | Overcurrent limit circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6024140U true JPS6024140U (en) | 1985-02-19 |
| JPH034126Y2 JPH034126Y2 (en) | 1991-02-01 |
Family
ID=30261150
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11268983U Granted JPS6024140U (en) | 1983-07-20 | 1983-07-20 | Overcurrent limit circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6024140U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63130004U (en) * | 1987-02-18 | 1988-08-25 |
-
1983
- 1983-07-20 JP JP11268983U patent/JPS6024140U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63130004U (en) * | 1987-02-18 | 1988-08-25 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH034126Y2 (en) | 1991-02-01 |
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