JPS60229456A - Voice storage system - Google Patents

Abstract

PURPOSE:To obtain a voice storage system with high economic effect without losing the identification of a talker by applying coding and storage to a message in high-bit rate at the first part of the message and in a low-bit rate with respect to the part exceeding a prescribed recording time. CONSTITUTION:A central controller (CC)5 transmits a control signal to a reproducing signal selector 71 via a selector control circuit 7 and an output of a high-bit rate read circuit is connected to a data line 105. When a reproducing bus from a magnetic disc device (DKU)3 to a line 101 is set, the CC5 resets a timer 78 and transmits a reproduction start signal to the DKU3. The voice information stored in the DKU3 is reproduced into a 64kb/s PCM signal by a high-bit rate read circuit and outputted to the line 101 via a line interface device (IFU)1. When a time T1 is elapsed after the start of reproduction, the selector control circuit 77 transmits a control signal to the selector 71 by the start from the timer 78, the connection of the selector is switched to a low-bit rate read circuit 75.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a voice storage method in a one-voice storage system that provides message delivery services, etc., and in particular to variable encoding rule storage triggered by the recording time of a voice message. Regarding the applicable law.

[Background of the invention]

With the recent realization of large-capacity storage devices, the development of voice storage systems that encode voice information into digital signals and store them in storage devices to provide storage-type services such as message board services and circular communications has been actively conducted. ing.

Conventional voice storage systems use 64kb with high speaker identification.
/s PCM, 32kb/s ADPCM
The following waveform encoding rules are adopted. However, since these encoding rules require a relatively high bit rate, due to storage capacity limitations, the system requires service users to regulate the recording time or storage time, resulting in poor serviceability. .

FIG. 1 shows an example of the configuration of a conventional audio storage device. This device consists of a line interface device 1, a high bit rate encoding rule channel device 2, which writes and reads 64kVSPCM audio signals to and from a storage device. @Ki disk device 3. Common line signaling device4. Central control unit5. It is composed of a main storage device 6.

When a line 101K storage call occurs, the central controller 5 connects the common signal line 107. Common line signal device 4° control path 10
Call information sent via 6 and magnetic disk device 3
The storage start address obtained from the directory is stored in the call management table on the main memory, and a storage path setting signal is sent to the devices 1, 2.3 via the control bus 106.

Once the storage path is set up, 64kb/s on line 101
The PCM audio signal is transmitted through the line interface device 1° data line 102. Channel device 2. The data is stored in the magnetic disk device 3 via the data@103.

When the central control unit 5 receives the storage completion signal from the common signal line 107, it stores the data length of the stored voice data in the call management table and releases the storage path.

When an IC reproduction request call occurs on the common signal line 107, the central controller i5 searches the call management table for the start address and data length of the stored signal to be reproduced, notifies the magnetic disk device 3, and sends the information to the device 1.2. A playback path setting signal is sent to the playback path setting signal. Once the playback path is set, channel device 2
reads the accumulated audio information from the storage start address of the magnetic disk device ff13 as much as the data required, and stores it as 64kb/
It is output to the line 101 via the line interface device 1 as an sPCM audio signal.

As is clear from the above operational overview, conventional audio storage systems centrally encode and store audio information at a high bit rate, so they have a high speaker identification ratio but require a wide storage area, and are not only economical. On the other hand, the high bit rate channel device 2 shown in Fig. 1 is a conventional example of a system that focuses on economic efficiency.
There is an audio storage system that is replaced with a low bit rate channel device that applies a coding rule of 10 kb/s or less, such as COR or LSP. The operation sequence of the second embodiment is the same as that of the first embodiment, so a description thereof will be omitted. PARCOR
and LSP are based on the principle of extracting and encoding voice characteristic parameters, and although the amount of voice information is compressed, speaker identification is inferior, so it is not possible to use the characteristics of the real voice that original telephone communication has. There was a problem because it was difficult to confirm the other party.

[Purpose of the invention]

An object of the present invention is to provide a highly economical and serviceable audio storage system that takes advantage of the high speaker identifiability, which is a feature of high bit rate coding rules, and the low storage cost, which is a feature of low bit rate coding rules. It is in.

[Summary of the invention]

In the present invention, the first part of the message is encoded at a high bit rate, and the part exceeding the predetermined recording time is encoded and stored at a low pit rate.This method is highly economical without impairing speaker identification. A feature is that a voice storage system can be realized.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIGS. 2 and 3.

FIG. 2 shows an example of the configuration of a voice storage device to which the invention is applied. In the figures, the same elements as in FIG. 1 are given the same numbers. This storage device is a line interface device (hereinafter referred to as IF).
(abbreviated as U) 1° magnetic disk unit (hereinafter abbreviated as DKU) 3° common line signal device (hereinafter abbreviated as C8E) 4.
Central control unit (hereinafter abbreviated as CC)5. Main memory device (hereinafter abbreviated as MM) 6 and variable code rule channel device (hereinafter referred to as MM)
VDCH)7.

FIG. 3 is a block diagram showing an example of the configuration of a variable code rule channel device (VDCH). This channel device is 64k
A high bit rate write circuit 72 that writes b/s P CM signals to DKU31C, a low bit rate write circuit 73 that converts 64 kb/s PCM signals to 4.8 kb/s L S P signals and writes them to DKU3; High bit rate readout circuit 74 for reading out the sP CM signal. 4 accumulated in DKU3
, 8kb/sL S P signal readout 64kVsPC
Low bit rate readout circuit 75 for converting to M signal. Accumulated signal selector 76, reproduced signal selector 71. It is composed of a selector control circuit 77 and a timer 78.

An overview of the operation of this voice storage device will be explained below, taking a time-specified message delivery service as an example. Common signal port 1107. C
3E4. When the voice storage request is notified to the CC5 via the control bus 106, the CC5 receives the call information consisting of the calling subscriber number, the called subscriber number, and the message delivery time sent from the common signal port 1107, and the directory information of the DKU3. The combined storage start address is stored in the call management table on the MM6. Furthermore, the CC 5 performs the following initial setting of the storage path based on the originating subscriber number and the storage start address.

First, in response to a line selection signal from the CC 5, the IFUI connects the data line 102 to the line #101 through which audio information to be stored is sent. Next, the accumulation signal selector 76 in FIG.
5 to control bus 106. A selection signal sent via the control line 108 and the selector control circuit 77 connects the output of the high bit rate write circuit 72 to the data line 103K. Next, a storage start address is given to DKU3 from CC, and a storage bus from line 101 to DKU3 is set.

The accumulation start signal sent from the common signal line 107 is
C3E4. When the CC5 is notified via the control bus 106, the CC5 resets the timer 78, sends a storage start signal to the DKU 3, and puts the audio storage device into the recording state. Data line 10 from line 101 via IFUI
The 64 kb/s PCM audio signal that has reached 2 is divided into blocks by the high bit rate write circuit 72, passes through the storage signal selector 76 and the data line 103, and is stored in order from the storage start address of the DKU 3. When the timer value reaches the encoding rule switching time T11C, the timer 78 issues a request to the selector control circuit 77 to generate a selector control signal.

In response to a request from timer 78 , circuit 77 selects the low bit rate write circuit 73 side input of storage signal selector 76 and sends out a control signal to connect to data line 103 . Therefore, data IIJ 102
The 64kb/s P CM audio signal inputted to K is sent to circuit 7.
3 converts it into a 4.8 kb/sL S P audio signal, converts it into a program and sends it to DKU3 via selector 76 and data line 103.
is multiplied by 8'. When CC5 is notified of the accumulation completion signal from common signal port #j107, CC5 outputs IFUI, V
It sends a storage path release signal to the DCH7 and DKU3, and receives the data length of the storage data from the DKU3 and stores it in the call management light.

The CC5 monitors the call management table at regular time intervals, and if there is a stored call that has reached the message delivery time, it determines the line to which the reproduced voice signal will be sent based on the called subscriber number, and
The storage area of the stored call to be reproduced is specified to the DKU 3 by the storage start address and data length. At this time, the CC 5 sends a control signal to the reproduction signal selector 71 via the selector control circuit 77 and connects the output of the high bit rate reading circuit 74 to the data line 105 . Line 101 from DKU3
When the playback bus to K is set, the CC5 resets the timer 78 and sends a playback start signal to the DKU3. The audio information stored in the DKU3 is reproduced into a 64kb/s PCM signal by a high bit rate readout circuit and then output as an I
It is output on line 101K via FUI. When time T1 has elapsed after the start of playback, the selector control circuit 77 sends a control signal to the selector 71 upon activation from the timer 78, and switches the connection of the selector to the low bit rate reading circuit 75 side. Therefore, the audio information encoded with the 4.8 kb/sL S P signal and stored is 64 kb in the circuit 75.
/s P Converts to CM signal, selector 71゜IFU
It passes through I and is output to line 101.

In this embodiment, the encoding rule switching time TI has been described as being fixed to the system, but convenience can be further improved by making a contract with the user in advance or specifying it for each service by the user.

〔Effect of the invention〕

According to the present invention, the first part of a voice message is encoded at a high bit rate, and the part that exceeds a predetermined recording time is encoded and stored at a low bit rate, thereby reducing storage costs without impairing speaker identifiability. This has the effect of reducing recording time and storage time, and improving serviceability due to busy schedules.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a conventional audio storage device.
FIG. 2 is a block diagram showing an example of the configuration of an audio storage device to which the present invention is applied, and FIG. 3 is a block diagram showing the configuration of a variable coding rule channel device. 1...Line interface device 2...High bit rate coding rule channel device 3...
Magnetic disk device 4... common ls signal device, 5... central control unit 6
...Main storage device 7...Variable encoding rule channel device 72...High bit rate writing circuit 73...Low bit rate enrichment circuit 74...High bit rate indulgence circuit 75...Low Bit rate readout circuit 78・
...Timer. Figure 1 Figure 2 Figure 3 Month

Claims (1)

[Claims] In an audio storage device having a storage device for storing digitized audio signals, means for writing and reading out audio information encoded at a first speed into the storage device; means for writing and reading encoded audio information into the storage device; means for transcoding audio information encoded at a first rate to a second rate; and audio information encoded at the second rate. and a timer means for measuring the recording time of the audio information, and when the timer value reaches a predetermined value, the encoding speed of the audio information is changed from the first speed to the second speed. An audio storage method characterized by switching and storing.