JPS60228954A - Electric field effect type semiconductor sensor - Google Patents

Electric field effect type semiconductor sensor

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Publication number
JPS60228954A
JPS60228954A JP59085886A JP8588684A JPS60228954A JP S60228954 A JPS60228954 A JP S60228954A JP 59085886 A JP59085886 A JP 59085886A JP 8588684 A JP8588684 A JP 8588684A JP S60228954 A JPS60228954 A JP S60228954A
Authority
JP
Japan
Prior art keywords
layer
field
semiconductor sensor
region
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59085886A
Other languages
Japanese (ja)
Inventor
Katsunori Nishiguchi
勝規 西口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP59085886A priority Critical patent/JPS60228954A/en
Publication of JPS60228954A publication Critical patent/JPS60228954A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS

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  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Molecular Biology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

PURPOSE:To attain to reduce cost by mass production, by utilizing technique such that each element formed to the surface of a silicon substrate is separated electrically. CONSTITUTION:A source diffusion region 2 and a drain diffusion region 3 are formed in the region surrounded by an oxide layer 11 having a thickness sufficient to be separated electrically. The transmission of information is performed from said region by the conductive substance layer 9 for connecting a lead contacting metal layer 6 and a chemically responsive insulating layer 8 but, because not only the region other than said region but also the upper part thereof are perfectly protected by a protective layer 10, a sensor is made extremely stable as the operative characteristic of a transistor itself. As the conductive layer 9, Al or polysiloxane, to which conductivity is imparted by the injection of an ion, is used. As the protective layer 10, a monolayer structure comprising Si3N4 or Al2O3 formable at low temp. by plasma CVD or a polyimide resin or a multilayer struction by the combination of monolayer structures is considered. As the insulating layer 8, Si3N4 or Al2O3 is used.

Description

【発明の詳細な説明】 (1)技術分野 本発明は化学的物質の濃度測定に用いる電界効果型半導
体センサ)で関する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field The present invention relates to a field-effect semiconductor sensor used for measuring the concentration of chemical substances.

(2)背景技術 ゲート絶縁型電界効果トランジスタ(MISFET)の
構造を利用して、電解液中のイオン活量や他の化学的物
質の濃度などを測定する半導体センサは従来から知られ
ている。これらは、Ion 5ensitiveFie
ld Effect Transistor (ISF
ET)、Chemical FET(CHEMFET)
と呼ばれ、特公昭54−24817などにこれ等に関す
る記載がある。
(2) Background Art Semiconductor sensors have been known that utilize the structure of a gate-insulated field effect transistor (MISFET) to measure the ion activity and the concentration of other chemical substances in an electrolyte. These are the Ion 5intensiveFie
ld Effect Transistor (ISF
ET), Chemical FET (CHEMFET)
This is called the Japanese Patent Publication No. 54-24817, and there are descriptions regarding them.

第6図、第7図にI 5FETのゲート部分の基本構造
を示す。例えばp−のシリコン基板(1)の表面にソー
ス(2)、ドレイン(3)の各拡散領域をチャンネル領
域(4)をはさんで離間して形成し、この基板表面を5
iOs+ のようを材料の絶縁層(5)で被覆してあり
、ソース、ドレインのリード・コンタクト用の金属層(
6)が設けである。そして、第6図では各々1000λ
程度の薄い被測定雰囲気不透過性膜(7)と、化学選択
性膜(8)が形成され、第7図では任意の厚さの導電性
物質層(9)と、薄い化学選択性膜が形成されである。
6 and 7 show the basic structure of the gate portion of the I5FET. For example, source (2) and drain (3) diffusion regions are formed on the surface of a p- silicon substrate (1) with a channel region (4) in between, and the substrate surface is
iOs+ is coated with an insulating layer (5) of material, and a metal layer (5) for source and drain lead contacts.
6) is a provision. In Fig. 6, each 1000λ
A thin membrane (7) impermeable to the atmosphere to be measured and a chemically selective membrane (8) are formed, and in FIG. It is formed.

このセンサは、実使用時には被測定雰囲気、例えば血液
などの溶液に直接浸漬する。このため化学選択性膜の部
分は直接溶液に接触し、リード線そのコンタクト金属な
どは絶対に溶液に接触しないように絶縁保護しなくては
ならない。従来、最も一般的な方法はエポキシ樹脂やシ
リコン樹脂により溶液不透過性を持たせる方法であった
が、これらの樹脂では長時間使用に耐えられず膨潤する
During actual use, this sensor is directly immersed in an atmosphere to be measured, for example, a solution such as blood. For this reason, the part of the chemically selective membrane comes into direct contact with the solution, and the lead wires and contact metals must be insulated and protected so that they never come into contact with the solution. Conventionally, the most common method has been to use epoxy resin or silicone resin to provide impermeability to solutions, but these resins cannot withstand long-term use and swell.

故にこの方法では充分な安定性、再現性が得られない。Therefore, this method does not provide sufficient stability and reproducibility.

このためセンサチップ自体に耐雰囲気性を持たせる方法
が提案されている。その方法は大別して次の2つである
For this reason, a method has been proposed in which the sensor chip itself is made resistant to atmosphere. There are two main ways to do this:

(■)シリコンウェファをエツチングにより3次元的に
加工し、センサチップの表面だけでなく、側面裏面を含
めた大部分を被測定雰囲気不透過性の絶縁膜で覆う。(
例えば特開昭55−24603 )(n)基板にシリコ
ンを用いず絶縁性のサファイア基板を用い、その上に必
要最小限のシリコン層を形成してセンサを構成し、かつ
、その大部分を雰囲気不透過性の絶縁膜で覆う。、4(
例えば特開昭57−191589ン これらの方法によるセンサは実用に耐え得る安定性、再
現性があるが、両方ともその製造工程に非常に高度な技
術を必要とし、かつその工程は複雑であり、一般のシリ
コンIC製造プロ七スにはない技術を用いるため、歩留
よく大量生産することは現状ではほとんど不可能である
(■) A silicon wafer is processed three-dimensionally by etching, and not only the front surface of the sensor chip but also most of the side surface and back surface are covered with an insulating film that is impermeable to the atmosphere to be measured. (
For example, JP-A-55-24603) (n) A sensor is constructed by using an insulating sapphire substrate without using silicon as the substrate, and forming a minimum necessary silicon layer on it, and most of it is placed in an atmosphere. Cover with an impermeable insulating film. , 4(
For example, sensors using these methods as disclosed in Japanese Patent Application Laid-Open No. 57-191589 have stability and reproducibility that can withstand practical use, but both require very advanced technology in their manufacturing process, and the process is complicated. Because it uses technology not found in general silicon IC manufacturing processes, it is currently almost impossible to mass-produce it with a high yield.

(3)発明の目的 本発明は長時間にわたり安定に精度よく測定が行なえ、
かつ、歩留よく大量に生産することができる超小形の電
界効果型半導体センサを提案することを目的とする。
(3) Purpose of the invention The present invention enables stable and accurate measurement over a long period of time.
Another purpose of the present invention is to propose an ultra-small field-effect semiconductor sensor that can be mass-produced with high yield.

(4)発明の構成 本発明による電界効果型半導体センサは実用に耐え得る
安定性、再現性を獲得するために、現在一般に用いられ
ているシリコンICi造プロセスにない特殊な技術を用
いることなく、シリコンウェファの表面加工技術のみで
製造できることを最大の特徴とする。
(4) Structure of the Invention In order to obtain stability and reproducibility that can withstand practical use, the field effect semiconductor sensor according to the present invention does not use any special technology that is not present in the currently commonly used silicon IC manufacturing process. The main feature is that it can be manufactured using only silicon wafer surface processing technology.

先に述べた様に、このセンサは実使用時には被測定雰囲
気、例えば血液などの液体に直接浸漬させるためにセン
サチップ自体が耐雰囲気性を具えておく必要がある。一
般のシリコンIC製造プロ若干の困難は伴うが保護する
ことができる。しかしながら、シリコンウェファを切断
してチップ状に加工し、センサチップとして完成したと
き、切断面即ちチップ側面は半導体であるシリコン単結
晶基板が露出した状態となるため被測定雰囲気による影
響を非常に受けやすい構造となる。このため従来技術で
は、8次元加工を施し、センサチップの表面だけでなく
裏面及び側面を保護する方法か、基板自体をシリコンで
はなく、絶縁性のサファイアとする方法により、裏面及
び側面からは被測定雰囲気の影響を受けない構造として
いる。
As mentioned above, since this sensor is directly immersed in the atmosphere to be measured, for example, a liquid such as blood, during actual use, the sensor chip itself needs to be resistant to the atmosphere. It is possible to protect the general silicon IC manufacturing process, although it involves some difficulties. However, when a silicon wafer is cut into chips and completed as a sensor chip, the cut surface, that is, the side surface of the chip, exposes the silicon single crystal substrate, which is a semiconductor, and is therefore extremely susceptible to the influence of the atmosphere being measured. It has an easy structure. For this reason, conventional technology protects not only the front surface but also the back and side surfaces of the sensor chip by performing eight-dimensional processing, or the substrate itself is made of insulating sapphire instead of silicon. The structure is unaffected by the measurement atmosphere.

本発明ではシリコンIC及びLSI製造プロ七スにおい
て用いられている・シリコン基板表面に形成された各素
子を電気的に分離する技術(以下、素子分離技術と称す
る)を利用して、センサの基礎構造であるゲート絶縁型
電界効果トランジスタ部を裏面及び側面から電気的に分
離することにより、センサチップの裏面及び側面が被測
定雰囲気によつて影響を受けたとしても、それがトラン
ジスタ部には及ばないのでトランジスタとしては安定に
動作し、ひいてはセンサとして安定に動作することが可
能となる。また、このときゲート部構造は第6図に示す
ような絶縁層だけで構成されたものではなく、第7図に
示すような導電性層を含む構成の方が望ましい。これは
特願昭59−59946号において、提案されているよ
うに、化学感応部とトランジスタ部の位置を物理的に離
すことができるからである。化学感応部がトランジスタ
部に連続した上部にあると、化学感応部は直接被測定雰
囲気に浸漬するため素子分離技術によりセンサチツプ側
面からの影響は除外しているにもかかわらず、その分離
しであるトランジスタ部自体が被測定雰囲気により影響
を受けてしまう危険性が高いが、化学感応部とトランジ
スタ部が離れているとトランジスタ部の保護が容易とな
り、特性の長期安定化が望める。
The present invention utilizes technology for electrically isolating each element formed on the surface of a silicon substrate (hereinafter referred to as element isolation technology), which is used in silicon IC and LSI manufacturing processes, to create a basic sensor. By electrically separating the gate insulated field effect transistor section from the back and side surfaces of the sensor chip, even if the back and side surfaces of the sensor chip are affected by the atmosphere being measured, the effect will not affect the transistor section. Therefore, it is possible to operate stably as a transistor and, in turn, to operate stably as a sensor. Further, at this time, it is preferable that the gate structure not only consist of an insulating layer as shown in FIG. 6, but also include a conductive layer as shown in FIG. This is because, as proposed in Japanese Patent Application No. 59-59946, the positions of the chemically sensitive portion and the transistor portion can be physically separated. If the chemically sensitive part is located above the transistor part, the chemically sensitive part is directly immersed in the atmosphere to be measured, so even though element isolation technology eliminates the influence from the side of the sensor chip, the chemically sensitive part is separated. Although there is a high risk that the transistor part itself will be affected by the atmosphere to be measured, if the chemically sensitive part and the transistor part are separated, it becomes easier to protect the transistor part, and long-term stability of the characteristics can be expected.

また素子分離技術としては、次に示す様な方法があり、
これらを単独に用いてもよいし、これらを組み合せて、
より一層の効果を挙げることも考えられる。
In addition, there are the following methods for element isolation technology:
These may be used alone or in combination,
It is also conceivable that it will be even more effective.

(1)選択酸化法(LOGO5: Local 0xi
dation ofSilicon )・・・ 各素子
領域の間に厚い酸化膜を形成して、各素子を絶縁物であ
る酸化膜で分離する。
(1) Selective oxidation method (LOGO5: Local 0xi
(dation of Silicon)... A thick oxide film is formed between each element region, and each element is isolated by the oxide film, which is an insulator.

(II) pn接合法・・・pn接合により絶縁する。(II) Pn junction method: Insulate by pn junction.

(m) a 板エツチング法・・・エツチングにより各
素子領域の間に溝を形成し、素子領域を構造的に分離す
る。
(m) a Plate etching method: grooves are formed between each element region by etching to structurally separate the element regions.

OV)選択エピタキシャル成長法・・・最初に素子領域
として用いない領域にのみ選択的に酸化膜等の絶縁層を
形成しておき、次に素子領域に分離された状態で単結晶
シリコンをエピタキシャル成長させる。
OV) Selective epitaxial growth method: First, an insulating layer such as an oxide film is selectively formed only in regions not used as element regions, and then single crystal silicon is epitaxially grown in a state separated into the element regions.

(V)絶縁物分離法・・・基板エツチング法と同様の溝
を形成し、その部分をSi3N4などの絶縁物を埋込む
か、最初に絶縁物薄膜を形成した後にポリシリコン等を
埋込む。
(V) Insulator isolation method: A groove similar to the substrate etching method is formed, and the groove is filled with an insulator such as Si3N4, or an insulator thin film is first formed and then polysilicon or the like is filled.

(5)発明の実施例 1 以下、本発明を実施例の図面にもとすいて説明する。(5) Example 1 of the invention Hereinafter, the present invention will be explained with reference to drawings of embodiments.

最も有効な素子分離法の組合せの1つとして、センサチ
ップの側面からの影響を選択酸化法で防ぎ、裏面からの
影響をpn 接合で防ぐ方法が考えられるが、ここでは
簡単のために選択酸化法のみを用いて素子分離を行なっ
た電界効果型半導体センサについて述べる。第1図は本
発明の一実施例たる電界効果型半導体センサの構造を示
す平面図で、第2図は第1図の1点鎖線a −a’にお
ける断面図、同じく第3図はb −b’、第4図はc 
−c’、第5図はd −d’における断面図である。
One of the most effective combinations of element isolation methods is to use selective oxidation to prevent the effects from the side surfaces of the sensor chip, and to prevent effects from the back side using a pn junction, but here we use selective oxidation for simplicity. This paper describes a field-effect semiconductor sensor in which elements are separated using only the method. FIG. 1 is a plan view showing the structure of a field-effect semiconductor sensor according to an embodiment of the present invention, FIG. 2 is a sectional view taken along the dashed line a-a' in FIG. 1, and FIG. b', Figure 4 is c
-c', FIG. 5 is a cross-sectional view at d-d'.

本実施例のセンサチップの大きさは1.Qmx5.Qm
xである。第1図に示す様に、トランジスタ部はチップ
上の一方の端に集中的に形成されており、化学感応層(
8)は他方の端に形成され、平面的に約8悲離れた構成
となっている。この実施例の最大の特徴はトランジスタ
部を素子分離用酸化層αDによりセンサチップ周辺部か
ら電気的に分離していることである。
The size of the sensor chip in this example is 1. Qmx5. Qm
It is x. As shown in Figure 1, the transistor section is formed intensively at one end of the chip, and the chemically sensitive layer (
8) is formed at the other end, and is spaced apart by about 8 centimeters in plan view. The most important feature of this embodiment is that the transistor section is electrically isolated from the periphery of the sensor chip by an oxide layer αD for element isolation.

即ち、電気的に分離するのに充分な厚さを持つ酸化層σ
Dに囲まれた領域内にソース拡散領域(2)、ドレイン
拡散領域(3)が形成されている。この領域からはリー
ドコンタクト用金属層(6)と化学感応用絶縁層(8)
との接続のための導電性物質層(9)により情報の伝達
は行なわれるが、これ以外は上部も保護層叫により完全
に保護されているのでトランジスタ自体の動作特性とし
ては非常に安定したものとなる。
That is, an oxide layer σ with sufficient thickness to provide electrical isolation.
A source diffusion region (2) and a drain diffusion region (3) are formed in the region surrounded by D. From this area, there is a metal layer for lead contact (6) and an insulating layer for chemical sensitivity (8).
Information is transmitted through the conductive material layer (9) for connection with the transistor, but other than this, the upper part is also completely protected by the protective layer, so the operating characteristics of the transistor itself are very stable. becomes.

上記導電性層(9)としては、Al またはイオン注入
により導電性を持たせたポリシリコンを用いる。
As the conductive layer (9), Al or polysilicon made conductive by ion implantation is used.

また保護層αOとしては、プラズマCVDなど低温で形
成可能な5isN4y klsosm SiOxNy+
 AI!0xNy、 PSG(Phospho−5il
icate PgOs Sing )+ Pb0−AA
’gOa・Sing (Lead−Alumino−5
ilicate ) # PbO・BgOs・Sing
 (Lead−Boro−5ilicate ) + 
PbO−Al!gos・BgOa・5iOs+ (Le
ad−Alumino−Boro−3ilicate)
もしくはポリイミド系樹脂の単層構造またはこれらの組
み合せによる多層構造が考えられ、膜厚としては1μm
以上が望ましい。
In addition, as the protective layer αO, 5isN4y klsosm SiOxNy+, which can be formed at low temperatures such as by plasma CVD, is used.
AI! 0xNy, PSG (Phospho-5il
icate PgOs Sing )+ Pb0-AA
'gOa・Sing (Lead-Alumino-5
ilinate ) # PbO・BgOs・Sing
(Lead-Boro-5ilinate) +
PbO-Al! gos・BgOa・5iOs+ (Le
ad-Alumino-Boro-3ilicate)
Alternatively, a single layer structure of polyimide resin or a multilayer structure made of a combination of these can be considered, and the film thickness is 1 μm.
The above is desirable.

化学感応層(8)も第7図では簡単のために単層で示し
であるが、実際には膜と膜の密着性などの問題から化学
感応膜を最外層とした多層構造とすることも多い。
The chemically sensitive layer (8) is also shown as a single layer in Figure 7 for simplicity, but in reality it may have a multilayer structure with the chemically sensitive film as the outermost layer due to problems such as adhesion between films. many.

この感応膜の種類として考えられるものを[]内に示す
その測定対象物と共に列挙すると、5iaN*+A1g
Oay Tag’s (H+イオン〕、各種NAS (
Na sO−AlgOa−5ing合成)ガラス〔K+
イオンNa+ イオン〕パリノマイシン固定膜〔K+イ
オン〕、各種クラウンエーテル固定膜〔K+イオン、八
g+ イオン、TI+イオンetc )ウレアーゼ固定
膜〔尿素〕、リパーゼ固定膜〔中性脂質〕、ベニシリナ
ーゼ固定膜〔ペニシリン〕坑アルブミン抗体固定膜〔ア
ルブミン〕、ア七チルコリンエステラーゼ固定膜(アセ
チルコリン〕などがある。
Possible types of this sensitive film are listed together with the measurement target shown in brackets: 5iaN*+A1g
Oay Tag's (H+ ion), various NAS (
Na sO-AlgOa-5ing synthesis) glass [K+
ion Na+ ion] palinomycin fixed membrane [K+ ion], various crown ether fixed membranes [K+ ion, 8g+ ion, TI+ ion, etc.] urease fixed membrane [urea], lipase fixed membrane [neutral lipid], benicillinase fixed membrane [penicillin] ] Anti-albumin antibody fixed membrane [albumin], a7tylcholinesterase fixed membrane (acetylcholine), etc.

(6)発明の効果 本発明は、実用に耐え得る安定性・再現性、信頼性を具
えた電界効果型半導体センサを製造するのに従来技術に
よるような一般のシリコンIC及びLSI製造プロ七ス
にない特殊な技術、例えばシリコンウェファの3次元加
工技術やSO3(Si−1icon on 5apph
ire )技術などを必要とせず表面加工技術のみで製
造できることを最大の特徴としている。このため血液な
どの半導体デバイスとしては劣悪な環境下で用いる特殊
なデバイスでありながら、一般のシリコンICと同様に
確立された信頼性の高いプロ七スのみを用いて製造でき
るので歩留よく大量に生産することが可能となり、低コ
スト化が実現される。
(6) Effects of the Invention The present invention utilizes a general silicon IC and LSI manufacturing process that uses conventional technology to manufacture field-effect semiconductor sensors with stability, reproducibility, and reliability that can withstand practical use. Special technologies not found in Japan, such as three-dimensional processing technology for silicon wafers and SO3 (Si-1icon on 5apph)
The biggest feature is that it can be manufactured using only surface processing technology without requiring any other technology. For this reason, although it is a special device that is used in a harsh environment as a semiconductor device such as blood, it can be manufactured in large quantities with high yield because it can be manufactured using only the established and highly reliable PROS, just like general silicon ICs. This makes it possible to produce at a lower cost, resulting in lower costs.

またセンサの特性の安定化のために素子分離技術を導入
したが、素子分離技術自体は、元来シリコンウェファ上
に形成されるデバイスの集積度を高めるために開発され
た技術なので、先の実施例のような単機能センサだけで
はなく、多機能化を実現する際に大きな利点となる。即
ち、複数個の化学感応層を同一センサ・チップ上に形成
した場合に各々に対応するゲート絶縁型電界効果トラン
ジスタを集中的に形成しても、これらのトランジスタ間
も周辺部から分離するのと同様に絶縁分離してふ・けば
各々の測定値が干渉し合うことは少なくともトランジス
タ部においては起こり得ない。
In addition, element isolation technology was introduced to stabilize sensor characteristics, but element isolation technology itself was originally developed to increase the degree of integration of devices formed on silicon wafers, so it is difficult to implement it earlier. This is a great advantage in realizing multi-functionality rather than just a single-function sensor as in the example. In other words, when multiple chemically sensitive layers are formed on the same sensor chip, even if gate insulated field effect transistors corresponding to each layer are formed in a concentrated manner, it is difficult to separate these transistors from the periphery. Similarly, if the components are insulated and separated, the respective measured values will not interfere with each other, at least in the transistor section.

さらにセンサの特性を補償したり、多機能化センサとし
た場合の多項目の測定結果を分析したりするような電気
回路を同一チップ上に集積化することにも充分に対応可
能である。
Furthermore, it is fully applicable to integrating on the same chip electric circuits for compensating sensor characteristics and analyzing measurement results of multiple items in the case of a multi-functional sensor.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例たる選択酸化法によりゲー
ト絶縁型電界効果トランジスタ部を周辺部構造から電気
的に分離した電界効果型半導体センサの構造を示す平面
図である。 第2図は、第1図の1点鎖線a −a’における断面図
で、同じく第8図はb −b’における断面図、第4図
はc −c’における断面図、第5図はd −d’にお
ける断面図である。 第6図、第7図は、従来のシリコンを基板として用いた
電界効果型半導体センサのゲート部分の基本構成断面図
で、第6図は薄い絶縁層のみの多層構造を示す図、第7
図は導電体層を含む多層構造の場合を示す図である。 16 シリコン単結晶基板 2、 ソース拡散領域 3、 ドレイン拡散領域 生 チャンネル部 5、 絶縁層(その1) 6、 リードコンタクト用金属層 7、 絶縁層(その2)。 8、化学感応用絶縁層 9、 金属等の導電性物質層 10、保護層 11、素子分離用酸化層 肯6図 W7図
FIG. 1 is a plan view showing the structure of a field effect semiconductor sensor in which a gate insulated field effect transistor section is electrically isolated from a peripheral structure by a selective oxidation method according to an embodiment of the present invention. FIG. 2 is a sectional view taken along dashed line a-a' in FIG. 1, FIG. 8 is a sectional view taken along b-b', FIG. 4 is a sectional view taken along c-c', and FIG. It is a sectional view taken along d-d'. 6 and 7 are cross-sectional views of the basic configuration of the gate portion of a conventional field-effect semiconductor sensor using silicon as a substrate.
The figure shows a case of a multilayer structure including a conductor layer. 16 Single crystal silicon substrate 2, source diffusion region 3, drain diffusion region raw channel section 5, insulating layer (part 1) 6, metal layer for lead contact 7, insulating layer (part 2). 8. Insulating layer for chemical sensitivity 9, layer of conductive material such as metal 10, protective layer 11, oxide layer for element isolation (Fig. 6, W7)

Claims (5)

【特許請求の範囲】[Claims] (1)ゲート絶縁型電界効果トランジスタのゲート部上
に特定の被測定物質にのみ選択的に感応する層を設けた
電界効果型半導体センサにおいて、基礎構造たるトラン
ジスタ部が被測定物質を含む雰囲気に直接さらされる周
辺部構造と被測定物質に感応する層を除いて、素子分離
技術により電気的に分離されていることを特徴とする電
界効果型半導体センサ。
(1) In a field-effect semiconductor sensor in which a layer selectively sensitive only to a specific substance to be measured is provided on the gate part of a gate-insulated field-effect transistor, the transistor part, which is the basic structure, is exposed to an atmosphere containing the substance to be measured. A field-effect semiconductor sensor characterized in that the peripheral structure that is directly exposed and the layer that is sensitive to the substance to be measured are electrically isolated using element isolation technology.
(2)シリコン単結晶基板上に形成されていることを特
徴とする特許請求の範囲第1項記載の電界効果型半導体
センサ。
(2) The field-effect semiconductor sensor according to claim 1, which is formed on a silicon single crystal substrate.
(3)上記素子分離技術が選択酸化法pn 接合法、基
板エツチング法、選択エピタキシャル成長法、及び酸化
物以外の絶縁物分離法の中の1種であるか、もしくはこ
れらの組合せであることを特徴とする特許請求の範囲第
1項及び第2項記載の電界効果型半導体センサ。
(3) The device isolation technique is one of a selective oxidation method, a pn junction method, a substrate etching method, a selective epitaxial growth method, and an insulator isolation method other than oxide, or a combination thereof. A field-effect semiconductor sensor according to claims 1 and 2.
(4)上記ゲート絶縁型電界効果トランジスタを複数個
設け、かつ個々の感応層の組成を変化させ、複数個の物
質に対する選択特性を具えたことを特徴とする特許請求
の範囲第1項、第2項及び第3項記載の電界効果型半導
体センサ。
(4) A plurality of the gate insulated field effect transistors are provided, and the composition of each sensitive layer is changed to provide selection characteristics for a plurality of substances. Field-effect semiconductor sensor according to Items 2 and 3.
(5)上記ゲート絶縁型電界効果トランジスタが形成さ
れている部分もしくはその周辺にこのトランジスタ同様
に周辺部構造とは電気的に分離された状態で、感度補償
、温度補償、情報処理等を行なう電気回路が形成されて
いることを特徴とする特許請求の範囲第1項、第2項、
第3項及び第4項記載の電界効果型半導体センサ。
(5) In the area where the above-mentioned gate insulated field effect transistor is formed or around it, electricity is provided for sensitivity compensation, temperature compensation, information processing, etc. in a state that is electrically isolated from the surrounding structure like this transistor. Claims 1 and 2, characterized in that a circuit is formed.
The field-effect semiconductor sensor according to items 3 and 4.
JP59085886A 1984-04-26 1984-04-26 Electric field effect type semiconductor sensor Pending JPS60228954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59085886A JPS60228954A (en) 1984-04-26 1984-04-26 Electric field effect type semiconductor sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59085886A JPS60228954A (en) 1984-04-26 1984-04-26 Electric field effect type semiconductor sensor

Publications (1)

Publication Number Publication Date
JPS60228954A true JPS60228954A (en) 1985-11-14

Family

ID=13871388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59085886A Pending JPS60228954A (en) 1984-04-26 1984-04-26 Electric field effect type semiconductor sensor

Country Status (1)

Country Link
JP (1) JPS60228954A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63210655A (en) * 1987-02-26 1988-09-01 Shindengen Electric Mfg Co Ltd Semiconductor ion sensor
JPS63235853A (en) * 1987-03-24 1988-09-30 Shindengen Electric Mfg Co Ltd Semiconductor ion sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63210655A (en) * 1987-02-26 1988-09-01 Shindengen Electric Mfg Co Ltd Semiconductor ion sensor
JPS63235853A (en) * 1987-03-24 1988-09-30 Shindengen Electric Mfg Co Ltd Semiconductor ion sensor

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