JPS6022677Y2 - Analog to digital converter - Google Patents

Description

[Detailed description of the invention] The present invention relates to an analog-to-digital converter using a voltage/frequency converter, and its purpose is to create an analog-to-digital converter that can accurately convert input into a digital signal even when the input is near zero. Our goal is to provide the following.

A voltage/frequency converter has been conventionally used as one of the most effective methods for analog/digital converters.

FIG. 1 shows an example of a conventional analog-to-digital converter using a voltage-to-frequency converter.

This converter changes the polarity of input voltage Ex to zero comparator CO.
Distinguish in analog manner with M, and when the voltage is negative, use the inverting amplifier I
It is applied to the voltage/frequency converter VF as a positive voltage via V, and converted into a pulse train of a frequency corresponding to Ex.

The frequency signal obtained by the voltage/frequency converter VF is counted by a counter CU, and the counted value is displayed on a display DP.

At the same time, in this converter, the polarity of the input voltage Ex determined by the zero comparator COM is displayed on the display DP.

There are positive and negative input voltages EX.

However, since there is no negative frequency for a negative input, the voltage-to-frequency converter cannot be used as is as an analog-to-digital converter.

Regarding this point, the analog-to-digital converter shown in FIG.
The negative input is converted into a digital signal.

By the way, in the converter shown in Fig. 1, the input Ex is near zero voltage,
If Ex is completely zero, there is no way to determine it with the comparator COM, so the voltage frequency converter VF
startup becomes ambiguous.

That is, the converter shown in FIG. 1 has poor accuracy near zero input voltage, which poses a practical problem.

The analog-to-digital converter of the present invention adds a voltage equivalent to the full-scale voltage to the input analog voltage, converts it to a frequency signal using a voltage-frequency converter, and doubles this signal to generate a preset full-scale signal. By subtracting the frequency corresponding to the scale voltage, if it does not exceed zero, display it as is, and if it exceeds zero, by subtracting the counting frequency from the frequency corresponding to the full scale voltage,
This makes it possible to accurately convert inputs near zero voltage of either positive or negative polarity into digital signals.

FIG. 2 is a block diagram showing an embodiment of an analog-to-digital converter according to the present invention.

In FIG. 2, Ex is an input analog voltage, and EM is a voltage corresponding to the full-scale voltage (EMmaX) of the converter according to the present invention.

A is a summing amplifier having a feedback resistor Rf, VF is a voltage/frequency converter, and 2CU is a counter that doubles the output frequency of VF.

The input voltage Ex and the voltage EM corresponding to the full-scale voltage are added by the summing amplifier A and then the voltage/frequency converter VF.
It is converted into a frequency signal by the counter 2CU, and counted to twice the frequency by the counter 2CU.

Since the voltage EM is added to the input voltage Ex in advance, the output frequency characteristic of the voltage/frequency converter VF is shown by the solid line Ex in FIG. 3, and the output frequency characteristic of the counter 2CU is shown by the third line
This is indicated by the dotted line 2Fx in the figure.

ME is a storage circuit in which a frequency corresponding to the full-scale equivalent voltage EM is stored.

The frequency corresponding to this full-scale equivalent voltage EM is a constant value, and this is shown by the dashed-dotted line FM in FIG.

PCU is a preset counter, U℃2 is an up/down counter, DP is a display circuit, SL and S2 are switches that have terminals 1 and 2, respectively, and whose movable pieces are switched in conjunction with each other, and normally both movable pieces are connected to terminal 2. It is designed to be connected to.

The output terminals of the double counter 2CU and the memory circuit ME are connected to the up input terminal U of the up/down counter UDC of the up/down counter LJDC via the switch S2, and are connected to the input terminal of the preset counter PCU via the switch S. The output end of the PCU is connected to the
It is connected to the down input end of the down counter UDC, and the output end of UDC is connected to the display circuit DP.

The up/down counter UDC outputs a polarity signal circle when its count value becomes zero, and this polarity signal causes the switch S
1. The movable pieces of S2 are driven and connected to the terminals 1, respectively.

The operation of the analog-to-digital converter according to the present invention having such a configuration will be described below using the numerical values shown in Table 1 for ease of explanation.

As shown in Table 1, if EXmax is 100mV, the voltage EM corresponding to the full-scale voltage is 1
00r'rIV.

In addition, the voltage/frequency converter VF has an input EX of 1100 m.
When the input of this voltage/frequency converter is zero at V, the output frequency Fx is zero, and when the input EX is +lQQmV and the voltage applied to this converter is 200mV, it outputs l0OkHz (1) frequency Fx. There is.

Therefore, if the input voltage Ex is, for example, 5 mV,
As shown in Table 1, the output frequency Fx of the voltage/frequency converter VF is 75 kHz (this frequency is indicated by Fx□ in Figure 3), and this is 2
It is multiplied and counted to 50kHz.

The output 2Fx of the counter 2cu is given to the up/down counter UDC via the terminal 2 of the switch S2, and the UDC up-counts it.

On the other hand, the frequency FM corresponding to the full-scale equivalent voltage EM is stored in the memory circuit ME.

As shown in Table 1, this FM value is assumed to be 100kHz.
Then, the frequency of the preset counter PCU is preset to 100 kHz by this storage circuit via the terminal 2 of the switch S1.

The up/down counter UDC counts up the output frequency 2FX of the counter 2CU, and then counts down the output FM of the preset counter PCU.

When the UDC finishes counting down the output FM of the preset counter PCU (i.e. 2FX FM), the UD
The count number of C is 50kHz.

This is represented by Fx□' in FIG.

The 80k H2 frequency signal indicated by FX1 is displayed on the display circuit DP as a digital signal corresponding to an analog input voltage of 59 mV together with its polarity (positive).

Thereafter, at a predetermined timing, the count value of the up/down counter UDC is reset by an output signal from a control circuit (not shown).

Next, the case where the input voltage is -59 mV will be explained.

In this case, the output frequency Fx of the voltage/frequency converter VF is 25 kHz (this frequency is shown as Fx2 in Figure 3), and the doubled frequency of 50 kHz is up/down by the up/down counter UDC. will be counted.

Next, the output of the preset counter PCU is given to the down input end of the up/down counter LJDC, but since the PCU is preset to a value of 100kHz, the value of the preset counter PCU is input to the up/down counter UDC. If you subtract , it will exceed zero.

Here, the up/down counter UDC outputs a polarity signal PS when its count number becomes zero.

This polarity signal PS causes the switch S1. Both movable pieces of S2 are connected to terminal 1.

Therefore, the output of the memory circuit is given to the up input terminal U of the up/down counter UDC, and tJDc
is set to 100kHz.

On the other hand, by connecting the movable piece of switch S□ to terminal 1, preset counter PCU has counter 2cu.
A frequency of 50kHz, which is the output 2Fx, is preset.

The up/down counter LJDC up-counts the output of the memory circuit ME, and then outputs it to the preset counter PCU.
Count down the output of .

Therefore, the content of u°C is the value obtained by subtracting 2FM from FM, that is, 100-50=50kHz.

The frequency of this subtracted value is shown in FIG. 3 as Fx2'.

A frequency of 50 kHz, denoted by Fx2', is applied to the display circuit DP along with a signal circle representing negative polarity, and -59 m
It is displayed as a digital signal corresponding to the analog input of V along with its polarity (negative).

Also, when the input voltage Ex is zero, the output frequency 2Fx of the counter 2CU becomes 100k H2, and the preset value of 100
kHz is subtracted, and the UDC count number eventually becomes zero.

In addition, as shown in Table 1, the input voltage Ex is ±100mV.
, ±39 mV, but also analog inputs having values other than these, especially voltages near input zero, can be accurately converted into digital signals in accordance with the above operation.

As explained above, the analog-to-digital converter of the present invention adds a voltage corresponding to the full-scale voltage to the input analog voltage, converts it into a frequency signal using a voltage-frequency converter, and doubles this signal. , the frequency corresponding to the preset full-scale voltage is subtracted, and if it does not exceed zero, it is displayed as is, and if it exceeds zero, the counting frequency is subtracted from the frequency corresponding to the full-scale voltage mentioned above. Since the input is converted into a digital signal, the input analog voltage can not only be around ±EXmax, but also around input zero, which was difficult with conventional analog-to-digital converters using voltage/frequency converters. can be converted into a digital signal with high accuracy regardless of its polarity.

Moreover, the present invention has the feature that it can be constructed entirely from extremely common electronic components, and that a small and inexpensive analog-to-digital converter can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional analog-to-digital converter using a voltage/frequency converter, Fig. 2 is a block diagram showing an embodiment of the analog-to-digital converter according to the present invention, and Fig. 3 is a block diagram of a conventional analog-to-digital converter using a voltage/frequency converter. FIG. 3 is a voltage/frequency characteristic diagram for explaining the operation of the analog-to-digital converter shown in FIG. 2; In Fig. 2, Ex...input voltage, EM...
...Voltage equivalent to full-scale voltage, A...
...Summing amplifier, VF...Voltage/frequency converter, 2CU...Counter that doubles the output frequency of VF, ■...Memory circuit, PCU...
...Preset counter, tJDc...Up/down counter, DP...Display circuit.

Claims (1)

[Scope of utility model registration request] A summing amplifier that adds its full-scale voltage to an input analog signal, a voltage/frequency converter that converts the output of this summing amplifier into a frequency signal, and a doubling frequency counter that doubles the output frequency of this voltage/frequency converter. , a storage circuit in which a frequency value corresponding to the full-scale voltage is memorized, and an up/down circuit in which the output terminal of the double frequency counter is connected to the up input terminal, and the output terminal of the storage circuit is connected to the down input terminal. A counter, in this up/down counter, when the result of subtracting the output of the storage circuit from the output of the double frequency counter exceeds zero, it is driven by the polarity signal output from the up/down counter, and causes the double frequency counter to go up. - A pair of mutually interlocking switches that switchly connect the output end of the memory circuit, which is switch-connected to the down input terminal of the down counter, to the up input terminal;
and an analog-to-digital converter comprising a display circuit for displaying the contents and polarity signal of the up/down counter.