JPS6020661U

JPS6020661U - calculation circuit

Info

Publication number: JPS6020661U
Application number: JP11232283U
Authority: JP
Inventors: 相良　岩男; 孟加藤
Original assignee: 沖電気工業株式会社; 京王技研工業株式会社
Priority date: 1983-07-21
Filing date: 1983-07-21
Publication date: 1985-02-13

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案に係る計算回路を内蔵した電卓の平面図
、第２図は本考案に係る計算回路のブロック図である。第３図は記憶装置の記憶内容を示す説明図である。１・・・表示装置、２・・・キーボード、３・・・デコ
ーダ・レジスタ、４・・・駆動回路、５・・・表示装置
、６・・・制御装置、７・・・計算ユニット、８・・・
記憶装置、９・・・比較器、１０・・・点滅回路。FIG. 1 is a plan view of a calculator incorporating a calculation circuit according to the present invention, and FIG. 2 is a block diagram of the calculation circuit according to the present invention. FIG. 3 is an explanatory diagram showing the contents stored in the storage device. DESCRIPTION OF SYMBOLS 1... Display device, 2... Keyboard, 3... Decoder register, 4... Drive circuit, 5... Display device, 6... Control device, 7... Computation unit, 8 ...
Storage device, 9... Comparator, 10... Flashing circuit.

Claims

[Scope of utility model registration request]

(1) A decoder register that detects the keyed-in numerical signals and calculated signals, a storage device that stores the numerical signals and calculated signals according to the keyed-in order, and a decoder register that detects the keyed-in numerical signals and calculated signals, and a storage device that stores the keyed-in numerical signals and calculated signals in the storage device. A comparison circuit that compares numerical signals and arithmetic signals, a display circuit that displays a discrepancy including the lower matching digit as a result of the comparison, and a control circuit that controls the decoder register, storage device, comparison circuit, and display circuit using control signals. A calculation circuit consisting of.

(2) In the verification mode, the control circuit sequentially reads out the keyed-in numerical signal, the calculated signal, and the numerical signal and calculated signal stored in the storage device, and compares them with a comparator.Claim 1. The calculation circuit described.

(3) When the comparison result of the comparator shows a discrepancy, the numerical value and operation signal keyed into the decoder register are replaced with the contents of the corresponding storage device by a replacement signal, Claim 1 2. Calculation circuit for item 2 or item 2.