JPS6019845B2 - Channel selection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a channel selection device used in a television receiver or the like.

Conventionally, as a channel selection device for driving an electronic tuner, a method has been used in which a desired channel is preset using a variable resistor or the like, and the desired channel is selected using a push button or the like.

In addition, in many cases, these channel selection devices have forward/reverse IJ.
A remote control device could be added, and when the remote control device was operated, channels were sent sequentially at regular time intervals, or channels were sent one channel at a time. However, the method of changing channels at regular time intervals has the disadvantage that it takes time to change to a channel several channels apart. Furthermore, the method of transmitting one channel at a time with a single operation has the drawback that when searching for a desired program while sequentially transmitting channels, the user must perform the operation many times before reaching the desired channel. As described above, each of the IJ mote control device forwarding methods of channel order and reverse forwarding has its drawbacks, and is not a fully satisfactory system. The purpose of the present invention is to "eliminate the above-mentioned drawbacks of the prior art, and by operating a single channel selection switch, it is possible to forward or backward at fixed time intervals, it is possible to forward one channel with one operation, and it is also possible to tune to a desired specific channel. It is an object of the present invention to provide a channel selection device capable of fast forwarding.In the present invention, when the forward/reverse switch is operated continuously, a pulse with a long cycle is generated at constant time intervals, and when the forward/reverse switch is operated intermittently, pulses are generated at constant time intervals. ``It is characterized by generating a number of pulses corresponding to the on/off of the switch, and using these pulses as pulses for forward and reverse transmission of the channel selection device.

The present invention will be explained in more detail by way of examples.

An embodiment of a channel selection device according to the present invention is shown in the figure. 1' in the diagram
2 is a decoder, 3 is a variable resistor group,
4 is an electronic tuner ~ 5 is a channel selection pulse generating means for generating a clock pulse for a channel selection counter;
It consists of an R circuit. Reference numeral 6 denotes a count interruption pulse generating means for generating a pulse that puts the clock pulse counting counter into a standby state.

7 is a clock pulse counting counter (hereinafter referred to as a counter) that generates forward clock pulses, 8 is a NAND circuit, 9, 1 is an OR circuit, 1 1, 1 2 is an AND circuit, 13 is an inverter, and 14 is a low frequency clock pulse. 15 is a high frequency clock pulse generator; 16 is a channel selection signal input terminal;

OR circuit 10, AND circuits 11, 12, inverter 13
constitutes a first control circuit 20 that switches and outputs the output signals of the clock pulse generators 14 and 15 in accordance with the channel selection signal inputted to the channel selection signal input terminal 16. The NAND circuit 8 and the OR circuit 9 convert the clock pulses supplied from the clock pulse generators 14 and 15 to the clock pulse counter 7 via the first control circuit 20 into the tuning signal supplied from the tuning signal input terminal 16 and the tuning signal supplied from the tuning signal input terminal 16. This is a switch that cuts off or transmits the count interruption pulse supplied from the count interruption pulse generating means 6 depending on the state thereof, and constitutes the second control circuit 21. The operations of the channel selection counter 1, decoder 2, variable resistor group 3, and electronic tuner 4, as well as the operation of the channel selection device that combines them, are the same as those of the conventional ones, so their explanation will be omitted, and only the parts according to the present invention will be explained. will be explained in detail below. When the channel selection switch (not shown) is operated to set the logic "1" level to the channel selection signal input terminal 16', the AND
A low frequency clock pulse (frequency CI) introduced from the input terminal is derived from the output terminal of the circuit 11.
A high frequency clock pulse (frequency C2) is not derived from the output terminal of the AND circuit 12, and its output is fixed at "0". Therefore, clock pulse CI is OR circuit 1
0, passed through the NAND circuit 8 and introduced into the counter 7.
The counter 7 starts counting the clock pulses introduced. When the output signals introduced into the output terminals QI to Q4 of the counter 7 all become "0", the NOR circuit 5 derives "1" from the output terminal, and the channel selection counter 1 outputs the count value "
1", and the channel is sent by one channel. As mentioned above, when the channel selection signal input terminal 16 is
If you continue to input ``, the NOR circuit 5 will output one pulse every time the clock pulse CI is input by one stitch, so the channel selection power will change daily at the time interval (16×times). If the frequency of the clock pulse CI is 16Hz, it changes sequentially at intervals of 1 second per channel.When the input signal of the channel selection signal input terminal 16 changes from "1" to "0", the AND circuit 11 becomes "0". The AND circuit 12 derives the clock pulse C2.The clock pulse C2 is introduced into the counter 7 through the OR circuit 10 and the NAND circuit 8, and the counter 7 continues counting the clock pulse C2.The clock pulse C2 is clock pulse C
Since the frequency is higher than that of I, the counter 7 counts at a high speed, and when the output signals derived to its output terminals QI to Q4 are all "1", the NAND circuit 6 derives "0". At this time, the OR circuit 9 derives "0", so NA
The output signal of the ND circuit 8 is fixed at "1" and the introduction of the clock pulses CI and C2 to the counter 7 is stopped. Therefore, the counter 7 stops counting while the output signals derived from the output terminals QI to Q4 of the counter 7 are fixed at "1". Next, connect “” to the tuning signal input terminal 16 again.
1'' is introduced, the clock pulse CI is derived from the output terminal of the AND circuit 11, and the counter 7 to which this is introduced starts counting again.As described above, the clock pulse CI introduced to the channel selection signal input terminal 16 Signal goes from “1” to “0”
After the clock pulse C2 changes to 1, all output signals of the counter 7 become "1". If the frequency of the clock pulse C2 is 1 and the frequency of the clock pulse is 1, then the time is 10 milliseconds. .

Furthermore, the time from when "1" is again derived to the channel selection signal input terminal 16 until the counter 7 starts counting is about 63 milliseconds at maximum, assuming that the frequency of the clock pulse CI is 16 days 2. “1” intermittently at signal input terminal 16
By introducing this, the channel selection power counter 1 can be changed by one channel in about 73 milliseconds. This is in 1 second,
This corresponds to the ability to forward forward about 14 channels, and it is possible to fast forward to a specific channel several channels away in a short time. In this case, it is possible to obtain an effect as if the user had directly selected a desired specific channel by skipping through intermediate channels. In this embodiment, the counter 7 is a 4-bit counter, but it is clear that the same effect can be obtained with other numbers of bits (number of stages).

Further, in the explanation, only forward feeding was described, but the present invention can be similarly implemented in the case of reverse feeding. As described above, according to the channel selection device according to the present invention, when the channel selection switch is continuously operated, preset channels can be sequentially scanned at fixed time intervals, and when the channel selection switch is operated continuously, By intermittent operation, you can fast-forward through channels by the number of intermittent operations, so you can operate the same switch whether you are looking for the desired channel while checking the program content or when you want to quickly move to a channel several channels away. It is convenient because only one switch is needed (two switches including reverse feeding), and both operations can be performed with one switch (two switches including reverse feeding), which is highly effective industrially.

[Brief explanation of the drawing]

The figure is a logic circuit diagram showing an embodiment of a channel selection device according to the present invention. 5: NOR circuit, 6: NAND circuit, 7: Counter, 8
:NAND circuit, 9, 1 0: OR circuit, 11, 12:
AND circuit, 13: inverter, 14, 15: clock pulse generator, 16: channel selection signal input terminal.

Claims (1)

[Claims] 1. A tuning counter, a decoder connected to the tuning counter, a variable resistor group connected to the decoder, an electronic tuner connected to the variable resistor group, and a tuning device into which a tuning signal is input. In a channel selection device that has a signal input terminal and selects a specific channel by sequentially scanning a preset channel group using a channel selection signal input to the channel selection signal input terminal, a clock pulse of a first frequency is used. a first clock pulse generator that generates clock pulses, a second clock pulse generator that generates clock pulses of a second frequency higher than the first frequency; When the channel selection signal input terminal is connected to the channel selection signal input terminal, and the channel selection signal is supplied to the channel selection signal input terminal, the clock pulse of the first frequency supplied from the first clock pulse generator is output, and the channel selection signal input terminal is connected to the channel selection signal input terminal. a first control circuit that outputs a clock pulse of a second frequency supplied from a second clock pulse generator when a tuning signal is not supplied to the terminal;
A clock pulse of a first or second frequency is supplied from a first control circuit, and is connected to a clock pulse counting counter that counts clock pulses of the first or second frequency, and a clock pulse counting counter, and a count value is supplied from this counter. and a tuning pulse generating means that generates a tuning pulse when the counted value reaches a predetermined first counted value and supplies this tuning pulse to a tuning counter, and is connected to a clock pulse counting counter. , a count value is supplied from this counter, and a second count value is different from the first count value.
is connected between the first control circuit and the clock pulse counter, and is connected between the first control circuit and the clock pulse counter, and is supplied with the count interruption pulse from the count interruption pulse generation means. , and a channel selection signal is input from the channel selection signal input terminal, and after the channel selection signal is input, the clock pulse of the first or second frequency supplied from the first control circuit is transmitted to the clock pulse counting counter. and a second control circuit that stops transmitting the clock pulse of the first or second frequency after the channel selection signal is no longer input and after the count interruption pulse is supplied. A channel selection device characterized by: