JPS6019664B2 - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6019664B2
JPS6019664B2 JP2917879A JP2917879A JPS6019664B2 JP S6019664 B2 JPS6019664 B2 JP S6019664B2 JP 2917879 A JP2917879 A JP 2917879A JP 2917879 A JP2917879 A JP 2917879A JP S6019664 B2 JPS6019664 B2 JP S6019664B2
Authority
JP
Japan
Prior art keywords
semiconductor device
leads
input
output signal
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2917879A
Other languages
Japanese (ja)
Other versions
JPS55121672A (en
Inventor
貴英 大上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2917879A priority Critical patent/JPS6019664B2/en
Publication of JPS55121672A publication Critical patent/JPS55121672A/en
Publication of JPS6019664B2 publication Critical patent/JPS6019664B2/en
Expired legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 この発明は、入出力信号用リード、電源および接地用リ
ードが、半導体回路を収納するパッケージの一面に垂直
に取り付けられた半導体装置(以下プラグィンタィプパ
ッケージと称する)のIJードの無い面に、各リードと
電気的に接続された穴をあげる事により、冷却フィン、
あるいは入出力信号観測用または接続用の端子、あるい
はその他の電子回路部品を任意に差し込んだり、また任
意に抜いたりすることができる半導体装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device (hereinafter referred to as a plug-in type package) in which input/output signal leads, power supply and grounding leads are attached perpendicularly to one surface of a package housing a semiconductor circuit. By making holes electrically connected to each lead on the side without IJ, cooling fins,
It also relates to a semiconductor device in which terminals for input/output signal observation or connection, or other electronic circuit components can be inserted or removed as desired.

従来のプラグィンタィプパッケージを第1図に示す。A conventional plug-in type package is shown in FIG.

第1図a,bに於いて、1は半導体装置の基体をなすパ
ッケージ、2は入出力信号用IJ−ド、電源および接地
用リード、3は半導体装置を搭載する印刷配線板である
。従釆、半導体装置は印刷配線板3に直接取り付けられ
、半導体装置と印刷配線板の間のすき間は狭いので、冷
却の面においては、自然対流または強制対流では、印刷
配線板に面した半導体装置の表面は冷却に寄与せず、半
導体装置は冷却されにくいという欠点があつたし、また
、半導体装置の入出力信号接続も非常に困難であるとい
う欠点もあった。上記の欠点を改良するものとして、第
1図cに示すように、リード2bを延長して、パッケー
ジを貫通させた半導体装涜もあったが、この半導体装置
では、パッケージより高いリードが不用な場合でも抜く
ことができず、このような半導体装置を搭載した印刷配
線板を重ねて別の印刷配線板に取り付ける時には、印刷
配線板間のすき間を広く取らねばならないという欠点が
あった。この発明はこのような欠点を除去するためにな
されたもので、任意の形状、長さおよび材質を有する端
子等を差し込んだり、また抜き取ったりすることができ
るように、入出力信号用リード、電源および接地用リー
ドの各リードと電気的に接続された穴を、リードの無い
面に設けた半導体装置を提供するものである。
In FIGS. 1a and 1b, 1 is a package forming the base of a semiconductor device, 2 is an input/output signal input/output signal lead, a power source and a ground lead, and 3 is a printed wiring board on which the semiconductor device is mounted. Accordingly, since the semiconductor device is directly attached to the printed wiring board 3 and the gap between the semiconductor device and the printed wiring board is narrow, in terms of cooling, natural convection or forced convection is effective because the surface of the semiconductor device facing the printed wiring board This has the drawback that the semiconductor device does not contribute to cooling, making it difficult to cool the semiconductor device, and it is also extremely difficult to connect input and output signals to the semiconductor device. In order to improve the above-mentioned drawback, there was a semiconductor device in which the lead 2b was extended to penetrate the package as shown in Figure 1c, but this semiconductor device did not require a lead higher than the package. However, when printed wiring boards mounted with such semiconductor devices are stacked and attached to another printed wiring board, there is a drawback that a wide gap must be provided between the printed wiring boards. This invention was made in order to eliminate such drawbacks, and it is designed to provide input/output signal leads, power supply leads, etc. so that terminals of arbitrary shapes, lengths, and materials can be inserted and removed. The present invention also provides a semiconductor device in which holes electrically connected to each of the grounding leads are provided on a surface without leads.

以下図面にもとづいてこの発明の一実施例について詳細
に説明する。第2図a,bは、このような半導体装置の
一実施例を示す図であり、1,2a,3は、第1図に示
すものと同じである。第2図が第1図と異なる点は、第
2図bの4の穴である。この穴は各リードと電気的に接
続され、穴の内側も導体で被われている。このような構
造により、第3図a,bに示すようなことが可能である
。第3図a,bにおける1,2a,3,4は、第2図の
ものと同じである。第3図aでは、冷却のために、5の
ような冷却フィンを、4の穴に差し込むことにより、簡
単に取り付けられることを示す。このとき、冷却フィン
を4の穴に固定しなければ、任意に別の冷却フィンと取
り替えることもできる。また、第3図bでは、半導体装
置の入出力信号を一時的に観測したいような場合に、6
のような任意の長さの端子を差し込むことにより、観測
を行ない易くすることができ「観測が終われば抜き取る
ことができる。さらに、半導体装置の出力信号を他の電
子回路または半導体装置へ接続したような場合には、7
のように信号接続の容易な端子を、4の穴に差し込んで
固定することにより可能となる。なお、以上の実施例で
は、半導体装置の基体をなすパッケージ1が正方形であ
り、入出力信号用リード、電源および接地用リード2a
の数は合計2$本あり、リードの配置も第2図aのよう
な配置になっているが、これらは種々の形状、本数、お
よび配置を取り得るもので、本実施例に限られるもので
はない。また、パツケージーに取り付けられているIJ
−ド2aと穴4は一対一の対応に限られるものでもない
。さらに、穴4に差し込むことのできるものも、特定の
形状および材質の冷却フィンおよび入出力信号観測用お
よび接続用端子に限られず、任意の形状および材質を取
り得るもので、任意の電子回路部品でも良い。以上の様
に、本発明に係る半導体装置では、半導体装置の入出力
信号用リード、電源および接地用リードの取り付けられ
た面と反対の面に、これらのりードと電気的に接続され
た穴を設けてあることにより、任意の冷却フィンの取り
付けと取り外し、また任意の入出力信号観測用および接
続用端子およびその他の電子回路部品の取り付けと取り
外しが容易に行なえる利点がある。
An embodiment of the present invention will be described in detail below based on the drawings. FIGS. 2a and 2b are diagrams showing one embodiment of such a semiconductor device, and 1, 2a, and 3 are the same as those shown in FIG. The difference between FIG. 2 and FIG. 1 is the hole 4 in FIG. 2b. This hole is electrically connected to each lead, and the inside of the hole is also covered with a conductor. With such a structure, the things shown in FIGS. 3a and 3b are possible. 1, 2a, 3, and 4 in FIGS. 3a and 3b are the same as those in FIG. 2. Figure 3a shows that cooling fins such as 5 can be easily installed by inserting them into holes 4 for cooling. At this time, if the cooling fin is not fixed in the hole 4, it can be replaced with another cooling fin as desired. In addition, in FIG. 3b, when you want to temporarily observe the input/output signals of a semiconductor device,
Observations can be made easier by inserting a terminal of any length, such as a terminal, and can be removed once the observation is completed. In such a case, 7
This is possible by inserting a terminal that allows easy signal connection into the hole 4 and fixing it. In the above embodiment, the package 1 forming the base of the semiconductor device is square, and the input/output signal leads, power supply and grounding leads 2a are
The total number of leads is 2 dollars, and the arrangement of the leads is as shown in Figure 2 a, but these can have various shapes, numbers, and arrangements, and are limited to this example. isn't it. In addition, the IJ installed in the package
- The correspondence between the door 2a and the hole 4 is not limited to one-to-one. Furthermore, the objects that can be inserted into the holes 4 are not limited to cooling fins of a specific shape and material and input/output signal observation and connection terminals, but can be of any shape and material, and may be any electronic circuit component. But it's okay. As described above, in the semiconductor device according to the present invention, holes electrically connected to the input/output signal leads, power supply and grounding leads are provided on the surface opposite to the surface to which these leads are attached. By providing this, there is an advantage that any cooling fin can be easily attached and removed, and any input/output signal observation and connection terminals and other electronic circuit parts can be easily attached and removed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のプラグィンタィプパツケージを示す図で
あって、第1図aは半導体装置のリードが取り付けてあ
る面に向って見た平面図で、第1図bは側面図、第1図
cは第1図bを改良したものの側面図、第2図は本発明
に係る半導体装置の一実施例を示す図であり、第2図a
は平面図、第2図bは側面図である。 第3図は本発明に係る半導体装置の応用例を示す図、第
3図aは冷却フィンを取り付けた図、第3図bは入出力
信号観測用端子と入出力信号接続用端子を取り付けた図
である。図中1‘まパッケージ、2aおよび2bは入出
力信号用リード、電源および接地用IJ−ド、3は印刷
配線板、4は本発明に係る半導体装置の特徴であり、電
気的に入出力信号用リード「電源および接地用リードと
接続された穴、5は冷却フィン〜6は入出力信号観測用
端子、7は入出力信号接続用端子である。 なお、図中同一あるいは相当部分には同一符号を付して
示してある。予1灘 予Z囚 予3凶
FIG. 1 is a diagram showing a conventional plug-in type package, in which FIG. FIG. c is a side view of an improved version of FIG. 1b, FIG. 2 is a diagram showing an embodiment of the semiconductor device according to the present invention, and FIG.
is a plan view, and FIG. 2b is a side view. FIG. 3 is a diagram showing an application example of the semiconductor device according to the present invention, FIG. 3a is a diagram with cooling fins attached, and FIG. 3b is a diagram with an input/output signal observation terminal and an input/output signal connection terminal attached. It is a diagram. In the figure, 1' is a package, 2a and 2b are leads for input/output signals, IJ-boards for power supply and grounding, 3 is a printed wiring board, and 4 is a feature of the semiconductor device according to the present invention. 5 is a cooling fin, 6 is a terminal for observing input/output signals, and 7 is a terminal for connecting input/output signals. Note that the same or corresponding parts in the figure are the same. It is shown with a code.Yo1 NadaYoZ PrisonerYo3Kyo

Claims (1)

【特許請求の範囲】[Claims] 1 入出力信号用リード、電源および接地用リードが、
半導体回路を収納するパツケージの一面に垂直に取り付
けられた半導体装置に於いて、上記入出力信号用リード
、電源および接地用リードにそれぞれ電気的に接続され
た穴が、上記パツケージのリードの無い面に設けられて
いる事を特徴とする半導体装置。
1 The input/output signal leads, power supply and grounding leads are
In a semiconductor device mounted vertically on one side of a package housing a semiconductor circuit, the holes electrically connected to the input/output signal leads, power supply and grounding leads are connected to the side of the package without leads. A semiconductor device characterized by being provided in.
JP2917879A 1979-03-13 1979-03-13 semiconductor equipment Expired JPS6019664B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2917879A JPS6019664B2 (en) 1979-03-13 1979-03-13 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2917879A JPS6019664B2 (en) 1979-03-13 1979-03-13 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS55121672A JPS55121672A (en) 1980-09-18
JPS6019664B2 true JPS6019664B2 (en) 1985-05-17

Family

ID=12268966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2917879A Expired JPS6019664B2 (en) 1979-03-13 1979-03-13 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6019664B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63119281U (en) * 1987-01-27 1988-08-02

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858350U (en) * 1981-10-14 1983-04-20 株式会社東芝 IC package
JPS6390862U (en) * 1986-12-01 1988-06-13

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63119281U (en) * 1987-01-27 1988-08-02

Also Published As

Publication number Publication date
JPS55121672A (en) 1980-09-18

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