JPS6019336A - Noise reduction circuit - Google Patents
Noise reduction circuitInfo
- Publication number
- JPS6019336A JPS6019336A JP12734183A JP12734183A JPS6019336A JP S6019336 A JPS6019336 A JP S6019336A JP 12734183 A JP12734183 A JP 12734183A JP 12734183 A JP12734183 A JP 12734183A JP S6019336 A JPS6019336 A JP S6019336A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- sub
- vcf6
- leading
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/44—Arrangements characterised by circuits or components specially adapted for broadcast
- H04H20/46—Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95
- H04H20/47—Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/1646—Circuits adapted for the reception of stereophonic signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
- H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、チューナーにおけるノイズ低減回路に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction circuit in a tuner.
従来この種の回路として、第１図に示すものがあった。A conventional circuit of this type is shown in FIG.
これはハイブレンドと呼ばれる回路で、図において１は
ステレオ復調器であシ、Ｌｃｈ出力２及びＲｃｈ出力３
との間には、スイッチＳとコンデンサＣとの直列回路が
接続されている。This is a circuit called high blend, and in the figure 1 is a stereo demodulator, Lch output 2 and Rch output 3.
A series circuit of a switch S and a capacitor C is connected between the two.
かかる回路にあっては、チューナーで入力電波の小きい
ステレオ放逸等を聞いた時に気になるノイズを軽減する
もので、ＬＣｈと１％ｃｈの間に接続されているスイッ
チＳをオンすることによ、！ｌ）、Ｌｃｈ＆Ｒｃｈとが
コンデンサＣで結合されたことになシ、周波数の高い成
分はど混合量が多くなり、’［、Ｃｈ、 Ｒｃｈそれぞ
れの出力に含まれる逆相のノイズ成分は混合され、各出
力２，３にはノイズが軽減をれた出力が得られる。In such a circuit, the purpose is to reduce the noise that becomes noticeable when listening to small stereo dissipation of input radio waves with a tuner, and by turning on the switch S connected between LCh and 1%ch. Yo! l) Since Lch & Rch are combined by capacitor C, the amount of high frequency components mixed increases, and the opposite phase noise components contained in the outputs of Ch and Rch are mixed, Outputs 2 and 3 each have reduced noise.
従来の回路は以上のように構成されているので、高い周
波数はどＬｃｈとＲｃ ｈの混合比が大きくなり、セパ
レーション（分ｈｒｔｔ度）が劣化するという欠点があ
った。Since the conventional circuit is constructed as described above, there is a drawback that the mixing ratio of Lch and Rch becomes large at high frequencies, and the separation (minute hrtt degree) deteriorates.
この発明は上記のような従来のものの欠点を除去するた
めに成をれたもので、出力電圧が大きいときだけサブ信
号（Ｌ−Ｒ）の旨い周波数成分を通し、それ以外のとき
はサブ信号の商い周波数成分をカットし、かつ遅延信号
を加えることにより、ノイズを軽減し、かつ聴感上広が
多感を出すことのできる回路を提供することを目的とし
ている。This invention was accomplished in order to eliminate the drawbacks of the conventional ones as described above, and allows the good frequency components of the sub-signal (L-R) to pass only when the output voltage is large, and to pass the sub-signal (LR) only when the output voltage is large. The purpose of the present invention is to provide a circuit that can reduce noise and provide a broader sense of hearing by cutting the frequency component and adding a delayed signal.
以下、この発明の一実施例を図に基づいて説明する。Hereinafter, one embodiment of the present invention will be described based on the drawings.
第２図において、ステレオ復調器１のＬｃｈ出力２及び
Ｒｃｈ出力３はマトリックス４に接続され、マトリック
ス４の出力にはメイン信号（Ｌ 十Ｒ）とサブ信号（Ｌ
＝Ｒ）の信号が得られ、このうちメイン信号はマトリッ
クス９の入力と遅延器５の入力へ接続されている。また
、サブ信号は電圧制御フィルタ （以下ＶＣＦという）
６の入力と検出器７０入力へ接続されている。検出器７
の出力は、微分器１３の入力に接続され、その出力はＶ
ＣＦ６のヨントロール端子へ接続されている。In FIG. 2, the Lch output 2 and Rch output 3 of the stereo demodulator 1 are connected to a matrix 4, and the outputs of the matrix 4 are the main signal (L + R) and the sub signal (L
=R), the main signal of which is connected to the input of the matrix 9 and the input of the delay device 5. In addition, the sub signal is a voltage control filter (hereinafter referred to as VCF)
6 input and the detector 70 input. Detector 7
is connected to the input of the differentiator 13, whose output is V
Connected to the CF6 low roll terminal.
また、遅延器５とＶＣＦ６の出力は混合器８によって混
合され、マトリックス９の入力に接続されている。また
、マトリックス９からは合成Ｌｃｈ出力１０および合成
Ｒｃ ｈ出力１１が出力されている。Further, the outputs of the delay device 5 and the VCF 6 are mixed by a mixer 8 and connected to the input of a matrix 9. Further, a composite Lch output 10 and a composite Rch output 11 are output from the matrix 9.
マトリックス４及び９の構成は、第３図に示すように、
各入力を加算器１５及び減↓４器１６に入力することに
より、入力の和及び差を出力している。The configuration of matrices 4 and 9 is as shown in FIG.
By inputting each input to an adder 15 and a subtracter ↓4 unit 16, the sum and difference of the inputs are output.
次に、この発明の動作について説明する。Next, the operation of the present invention will be explained.
まず、ステレオ復調器１から得られるＬｃｈ出力２．Ｒ
ｃｈ出力３からマトリックス回路４によりメイン信号（
Ｌ十Ｒ） 、サブ信号（Ｌ −Ｒ）を得ている。First, Lch output 2. obtained from the stereo demodulator 1. R
The main signal (
L + R) and sub-signals (L - R) are obtained.
このサブ信号のエンベロープを検出５７によって検出し
、微分器１３によって微分することによシサブ信号のリ
ーディングエツジ（立ち土がり検出）を行っている。こ
の微分器１３の出力によってサブへ号の立ち上がりが鋭
い時は、ＶＣＦ６のカットオフ周波数ｆｃを高く、そノ
Ｌ以外の時はｆｃを低くするように、ｖＣＦ６をコント
ロールする。The envelope of this sub-signal is detected by a detector 57 and differentiated by a differentiator 13, thereby performing leading edge detection of the sub-signal. The output of the differentiator 13 controls vCF6 so that when the rise of the subsignal is sharp, the cutoff frequency fc of VCF6 is made high, and when it is other than that L, fc is made low.
即ち、ノイズ成分が多いときには、サブ信号の立上りは
比較的緩やかであるから、カットオフ周波数ｆｃが低く
ｆｘシ、サブ信号の高い周波数成分はＶＣＦ’６から出
力されないようにし、ノイズ成分の少ないときはサブ信
号の立上りが鋭くなり、ｆｃを高くして、高い周波数成
分を出力し、方向感や定位を出している。That is, when there are many noise components, the rise of the sub-signal is relatively slow, so the cutoff frequency fc is low and fx is set so that the high frequency components of the sub-signal are not output from VCF'6, and when there are few noise components, The rise of the sub-signal becomes sharper, fc is increased, and high frequency components are output, giving a sense of direction and localization.
これＫより聴感上ノイズは低減される。また、メイン信
号を遅延器５全通してＨ１定時間遅延させた信号と、Ｖ
ＣＦ６の出力とを混合器８で混合し、この混合器８の出
力と遅延させないメイン信号とをマトリックス９に入力
して、加え合わせているので、上記のｆｃが高いとき即
ち、ノイズ−成分の少ないときには、遅延器５の出力よ
りＶＣＦ６の出力レベルが大となり、混合器８の出力は
ほとんどサブ信号が支配的となって、マトリックス９の
出力はステレオ復調器１のＬＣｈ出力２及びＲｃｈ出力
３とほぼ同じ信号が出力される。The noise is audibly reduced by K. In addition, a signal obtained by passing the main signal through the delay device 5 and delaying it for a fixed period of time H1, and
The output of the CF6 is mixed in the mixer 8, and the output of the mixer 8 and the main signal that is not delayed are input to the matrix 9 and added. Therefore, when the fc is high, that is, the noise component When the output level is low, the output level of the VCF 6 is higher than the output of the delay device 5, the output of the mixer 8 is almost dominated by the sub signal, and the output of the matrix 9 is the Lch output 2 and the Rch output 3 of the stereo demodulator 1. Almost the same signal is output.
一方、ｆｃが低いとき、即ちノイズ成分が多いときには
遅延器５の出力がＶＣＦ６の出力より大と々って、混合
器８の出力は遅延器５の出力が支配的となり、第３図に
示すマ） ｌ）ツクスの構成から明らかなように、マト
リックス９のＬｃｈ及びＲｃｈ出力１０．１１にはこの
遅延信号は逆相で現われることになり、疑似的な広が多
感を得ることができる。従って、■ＣＦ６で失なわれた
広がり感を補正することができる。On the other hand, when fc is low, that is, when there are many noise components, the output of the delay device 5 is much larger than the output of the VCF 6, and the output of the mixer 8 is dominated by the output of the delay device 5, as shown in FIG. M) l) As is clear from the configuration of Tx, this delayed signal appears in the opposite phase at the Lch and Rch outputs 10 and 11 of the matrix 9, making it possible to obtain a pseudo-spread sensitivity. Therefore, the sense of spaciousness lost in CF6 can be corrected.
なお、上記実施例では遅延回路５の出力は常に出力され
るように々つでいたが、これをｖＣＦ６のカットオフ周
波数ｆＣが高い時には遅延回路５の出力を小さくするよ
うにすることで立ち上がりが鋭い時に定位を出す効果を
妨け々いようにすることができる。Incidentally, in the above embodiment, the output of the delay circuit 5 was set so as to be always output, but by reducing the output of the delay circuit 5 when the cutoff frequency fC of vCF6 is high, the rise can be improved. It can be made to interfere with the localization effect when sharp.
第４図はかかる構成の実施セ１Ｊを示し、遅延回路５の
出力を’ｔ 圧ｆａｌｌ ＃減衰器（ＶＣＡ）１２を通
して混合器８に入力し、微分器１３の出力を反転器】４
で反転した出力によりＶＣＡ１２の増幅ヲコントロール
する。ノイズ成分が少ないときには微分器Ｊ３の出力か
犬となり、反転器１４の出力が小となるからＶＣＡ１２
のｅｉｃＮ度が大きくなり、遅延回路５の出力を充分に
減衰させて、ＶＣＦ６からのサブ信号出力をより支配的
としている。FIG. 4 shows an implementation cell 1J having such a configuration, in which the output of the delay circuit 5 is input to the mixer 8 through the attenuator (VCA) 12, and the output of the differentiator 13 is input to the inverter 4.
The amplification of VCA 12 is controlled by the inverted output. When the noise component is small, the output of the differentiator J3 becomes a dog, and the output of the inverter 14 becomes small, so the VCA 12
The eicN degree of is increased, the output of the delay circuit 5 is sufficiently attenuated, and the sub-signal output from the VCF 6 becomes more dominant.
以上のようにこの発明によれは、サブ信号の高い周波数
成分を出力電圧が小さいときにはカットし、かつ遅延器
により広が９感を出すようにしたので、ステレオ感を保
ちつつノイズ低減ができる。As described above, according to the present invention, the high frequency components of the sub-signal are cut when the output voltage is low, and the delay device is used to widen the signal to give a nine-tone effect, so that noise can be reduced while maintaining the stereo effect.
第１図は従来のノ・イブレンドの回路を示す図、第２図
はこの発明の一実施例を示す図、第３図は第２図、第４
図におけるマトリックス回路の構成を示す図、＠４図は
この発明の他の実施例を示す図である。
１・・・・・・ステレオ復調器
２・・・・・・Ｌｃｈ出力
３・・・・・・Ｒｃｈ出力
４．９・−・・・・マトリックス
５・・・・−・遅延器
６・・・・・−ＶＣＦ
７・・・・・・レベル検出器
８・・・・・・混合器
１０・−・・・・合成、［、ｃ ｈ出力１１・・・・・
・合成ＲＣｈ出力
１２−・・・・・ＶＣＡ
１３・・・・・・微分器
１４・・・・・・反転器
特許出願人 ）（イオニア株式会社FIG. 1 is a diagram showing a conventional No-i-Blend circuit, FIG. 2 is a diagram showing an embodiment of the present invention, FIG.
Figure @4, which shows the configuration of the matrix circuit in the figure, is a diagram showing another embodiment of the present invention. 1...Stereo demodulator 2...Lch output 3...Rch output 4.9...Matrix 5...Delay unit 6... ...-VCF 7... Level detector 8... Mixer 10... Synthesis, [, ch output 11...
・Synthetic RCh output 12-...VCA 13...Differentiator 14...Inverter patent applicant) (Ionia Co., Ltd.
Claims (1)
の立上シを検出する検出手段と、前記検出手段の出力に
よってサブ信号の、カットオフ周波数を制御するサブ信
号制御手段と、前記遅延手段の出力とサブ信号制御手段
の出力とを混合する混合手段と、前記混合手段とメイン
信号とを合成し、左右の信号を出力するマ） ＩＪック
ス手段とを備えたことを％′徴とするノイズ低減回路。a delay means for delaying a main signal for a predetermined period; a detection means for detecting a rising edge of a sub-signal; a sub-signal control means for controlling a cut-off frequency of the sub-signal based on the output of the detection means; Noise characterized by a mixing means for mixing the output and the output of the sub-signal control means, and a mixer means for synthesizing the mixing means and the main signal and outputting left and right signals. reduction circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12734183A JPS6019336A (en) | 1983-07-13 | 1983-07-13 | Noise reduction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12734183A JPS6019336A (en) | 1983-07-13 | 1983-07-13 | Noise reduction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6019336A true JPS6019336A (en) | 1985-01-31 |
| JPH0363857B2 JPH0363857B2 (en) | 1991-10-02 |
Family
ID=14957521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12734183A Granted JPS6019336A (en) | 1983-07-13 | 1983-07-13 | Noise reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6019336A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03101057U (en) * | 1990-01-31 | 1991-10-22 | ||
| JP2001285227A (en) * | 2000-03-31 | 2001-10-12 | Pioneer Electronic Corp | Fm multiplex demodulator |
-
1983
- 1983-07-13 JP JP12734183A patent/JPS6019336A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03101057U (en) * | 1990-01-31 | 1991-10-22 | ||
| JP2001285227A (en) * | 2000-03-31 | 2001-10-12 | Pioneer Electronic Corp | Fm multiplex demodulator |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0363857B2 (en) | 1991-10-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5390344A (en) | FM audio signal receiver having a characteristic control function | |
| JPH01162020A (en) | Fm radio receiver | |
| JPS6019336A (en) | Noise reduction circuit | |
| US4737991A (en) | Audio multiplex television tuner | |
| JPH02215240A (en) | Fm stereo circuit | |
| JP2711152B2 (en) | Multi-channel audio signal playback device | |
| JPS589615B2 (en) | FM Stereo Fukuchiyouhoushiki | |
| JPS6141177B2 (en) | ||
| JPH0419864Y2 (en) | ||
| JPS6122366Y2 (en) | ||
| JPH0528841Y2 (en) | ||
| JPS5853531B2 (en) | stereo demodulation circuit | |
| JP2711151B2 (en) | Multi-channel audio playback device | |
| JPH0342760Y2 (en) | ||
| JPH048680Y2 (en) | ||
| JPH04298200A (en) | Automatic sound volume adjustment device in surround circuit | |
| JP3039932B2 (en) | Mute circuit | |
| KR200263523Y1 (en) | Automatic voice mode switching device for Dolby decoder | |
| JPS58197933A (en) | Fm stereophonic demodulation circuit | |
| JPS63194438A (en) | Fm stereo receiver | |
| JPS61118100A (en) | Sound processing circuit | |
| JPS63194436A (en) | Fm stereo receiver | |
| JPH02206230A (en) | Noise reduction device for fm stereo tuner | |
| JPS588620B2 (en) | The Tsuonjiyokiyo Cairo | |
| JPH0638299A (en) | Sound equipment |