JPS60187811A - Synchro-digital converter - Google Patents

Abstract

PURPOSE:To obtain an accurate digital output, by operating a reversible counter of a synchro-digital converter for correction when an input synchronized signal and an output signal of the converter are different in an angle of 180 deg. from each other. CONSTITUTION:Synchronized signals (a)-(c) from a synchro transmitter are sent through a Scott transformer 1, a quadrant selecting circuit 2, a sine multiplier 4 and a cosine multiplier 3 and detected in a phase detector 7A by an output of a transformer 6. Detection signals are inputted to a reversible counter 9 and this counter is operated. As the result, a digital value being the same with that of an angle of the synchronized transmitter is obtained from the counter 9. When the input synchro signal and the output of the reversible counter are different in an angle of 180 deg. from each other, the difference is detected by a phase detector 7B, and a voltage-controlled oscillator 8 is operated to operate the counter 9.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a tracking type synchronized digital (
Regarding the conversion device ftK (hereinafter referred to as 8/D).

The present invention relates to an S/D converter that converts a 180 degree step input synchro signal into a digital signal.

FIG. 1 is a block diagram showing a conventional tracking type S/D converter. In Fig. 1, (1) is a Scott transformer that converts the synchro signal from a synchro oscillator or digital synchro conversion device into a resolver signal, and (2)
(3) is a quadrant selection circuit that switches and outputs the polarity of resolver pie g according to the angular quadrant of the resolver signal; (3) is a cosine multiplier that receives all the sin outputs of quadrant selection circuit (2) and performs cosine multiplication; 4> is a sine multiplier that inputs the ωS output of the quadrant selection circuit (2) and performs sine multiplication, (5) is a subtracter that subtracts the two signal tones and calculates the difference, and (6) is a reference parent. (7) is a phase detector that detects the carrier wave of the output signal of (51);
(8) is a voltage controlled oscillator that outputs a clock signal based on the output signal of the phase detector (7), and (9) is the clock signal that is the output of the voltage controlled oscillator (3) and the output of the phase detector (7). It is a reversible counter that increases or decreases depending on the signal.

A conventional tracking type S/D converter is configured as shown in FIG. ), ()) K transformation. The resolver signals (f) and (f) are sent to the quadrant selection circuit (2),
180F of the output (g) of the reversible counter (9)! ! L
A quadrant-selected signal output (su), rest) is obtained by the 90 degree weighting signal.

Here, set the angle of the synchro oscillator to 0. Assuming that the maximum amplitude of the synchronized signal is (W) and the reference signal (E) is t"5inWt, the output signal (IJ) of the quadrant selection circuit (2), (R
) are respectively K Φsin wt＊5in O, K @
It becomes 5inWt @CO3θ. Next K (i issue (1)
The force is multiplied by the cosine in the cosine multiplier (3).

If the angle of the digital signal of the output (+1 is the reversible counter (9)) is φ.

The signal is multiplied by the sine multiplier (4), and the output (wo) is (woI=K-sinwt*
cosθ·s11φ. Above signal &L)), (
5') is subtracted by the next subtractor (5). The output V) of this subtracter (5) is e7) = JL1-(wo) = K'5inW t-5i
nθacosφ−K”51nW t*ωslj ・si
nφ=K @5inWt(sinθacosφ−COS
θ・s1nφ) From the trigonometry theorem, e7) = K −sjnw t esin (θ−φ)
becomes.

Next, the signal (W) is detected by the phase detector (7) from the output signal power (K) of the transformer (6). This detected signal (y) becomes K''5in (θ-φn). This output (y) is input to the voltage controlled oscillator (8), and a clock signal proportional to its magnitude is outputted. This clock signal (Y) and the output (Y) of the phase detector (7) are connected to a reversible counter (9).
is input, and the reversible counter (9) increases or decreases.

The voltage controlled oscillator (8) is the output (y) of the phase detector (7)
The reversible counter (9) is operated until the voltage becomes OV, that is, sin (θ-φ)=0. As a result, U-φ is obtained, and a digital value (E) which is the same as the angle of the synchro oscillator is obtained.

This example digital value becomes the output of the S/D converter. By the way, in the above s/D conversion device, actually!
The input voltage (Y) of the pressure control oscillator (8) does not need to be OV, and if it is smaller than the minimum weight voltage of the reversible counter (9), the clock signal (Y) will not be generated.

The relationship between the minimum weight voltage of the reversible counter (9) at this time and the clock generation of the t-pressure control oscillator (81) is shown in FIG.

Here, the input signal of the S/D converter is not a continuously changing signal like a synchro oscillator.

Digital Synchro C (hereinafter referred to as D/s) When the synchro signal is the output from a conversion device.

The angle of the synchro signal changes discontinuously. When a synchro signal that changes by 180# from the current angle is input to the above-mentioned S/D converter from a D/S converter, the angle θ' becomes θ' -11+180.

Then, with the conversion described above, the output (Y) of the 9-phase detector (7) becomes (Y) = sin (θ'-φ) = sin (θ + 180-φ) = sin (θ-φ), which is 180 degrees. The voltage is reversed from before the change, but
Since the clock signal of the voltage control oscillator (8) does not exceed the total voltage to be generated, the clock signal (2) is not generated and the reversible counter (9) does not operate. In the end, the output of the S/D converter becomes an abnormal output before changing by 180 degrees. Figure 3 shows the relationship between the output (y) of the phase detector (7) and the voltage that generates the voltage controlled oscillator (8) at this time. The control oscillator (8) is likely to output a clock signal, but since the synchronization signal changes in steps in a D/S converter, etc., the tracking type S/D converter described above Because of the constant, S
The output example of the /D converter remains unchanged.

However, as is clear from the above explanation of the operation, this conventional device is different from the angle of the current synchro signal.

It has a drawback that it outputs an abnormal output that differs by 180 degrees in response to a synchronized signal that changes stepwise by 180 degrees.

This invention was made for the purpose of improving such drawbacks, and includes a sine multiplier, a cosine multiplier, and an adder.

A phase detector and a positive/negative discriminator distinguish the input synchronized signal and S/
Determine whether the angle with the output signal of the D conversion device differs by isg degrees, reference value generator, comparator.

By using an AND gate, a switching circuit, and an adder, if there is a difference, a certain voltage is input to a voltage controlled oscillator to operate a reversible counter, thereby solving the above drawback.

FIG. 4 is a configuration diagram showing one embodiment of the present invention.
In the figure, (1) is a synchro oscillator or digital
Scotto transformer that converts all synchronized signals from the synchronized converter into resolver signals.

(2) is a quadrant selection circuit that switches and outputs the polarity of the resolver signal depending on the quadrant of the angle of the resolver signal.

(3A) and (3B) are reversible counters (9
) is a cosine multiplier that multiplies the cosine of the value of (4A), (4
B) is a sine multiplier that multiplies the input signal by the sine of the value of the reversible counter (9), (5) is a subtracter that subtracts the two signals and calculates the difference, and (6) is a reference AC signal. (7A) and (7B) are phase detectors that fully detect and rectify the carrier wave of the input signal, and (8) are voltage controlled oscillators that output the number of clocks proportional to the magnitude of the input signal. (9) is a reversible counter (10A) which increases or decreases depending on the output of the voltage controlled oscillator (8) and the output of the phase detector (7A).

(IOB) is an adder that adds two signals, αl is a positive/negative discriminator that determines whether the input signal is positive or negative, (12A), (1
2B) is a reference value generator that generates a certain constant value, Q3
is a comparator that determines the magnitude of two input signals, and 041 is a comparator that determines the magnitude of two input signals.
US is a switching circuit that controls the output of the reference value generator (12B) and the input to the adder (10B) by the output of the AND gate α.

The operation of this invention will now be explained. In Figure 4,
Initially, the sequence until the digital output of the reversible counter (9) follows the angle of the input signal is the same as described for the conventional device in FIG.

Here, we will discuss the case where a 180 degree step synchronization signal is input after tracking. The output of the quadrant selection circuit (2) is multiplied by the sine multiplier (4B). Its output (L/l is (L) = x-sinWt
・sin θ・sin φ. Also, the signal -) is multiplied by the cosine in a cosine multiplier (3B), and its output (N) becomes (SoJ-K・5inWt *cosθacosφ.The above signal (I/l, (So) is Next adder (10A
) is added.

The output c of this adder (10A) is C〉 = (shi→+c)) = K *5inW t”si
nθ11sin$-1-K ・3inW t 5cO3
vacos$=KIIsinWt(s1nθsinφ−
I-cO3011CoSφ) From the trigonometry theorem, (n)=K''5inW t-cos(θ-φ).

This output signal C) is detected by the phase detector (7B) and is expressed as: K*cos(θ−φ)
becomes.

Here, the output body before the change is θkiφ, so the naka)kiK.

Also, since the output after changing by 180 degrees, ) is φ+180 in θ, it becomes − in ).

By determining whether the output of this phase detector (7B) is positive or negative, if the sign of this output is negative.

You can see that it has changed 180 degrees. Therefore, when the positive/negative discriminator [alpha] makes a negative judgment, its output (chi) becomes logic 1. Here, now, synchro input signal and reversible counter (9)
This phenomenon occurs when the output of The output (U) of comparator 0 becomes logic 1. When the output signals of (e) and (c) are logic 1, the logic of the output (1-) of AND gate α4 becomes 1, and the reference value generator (12B)
The output voltage of is inputted to the adder (lOB) through the polarization circuit α9. Therefore, a voltage that generates a clock is outputted to the output of the adder (10B), which is input to the voltage control oscillator (8), which generates a clock signal, which is then activated by the reversible counter (9).
works. Once the reversible counter (9) operates, it moves in the sequence described for the conventional device until the angle θ of the synchronized signal and the angle φ of the reversible counter match, and θ=φ.
become.

As explained above, the present invention can also be applied to synchronized signals that change in 180 degree steps.

S/D conversion is possible.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a conventional synchro Φ digital converter, Fig. 2 is a diagram showing waveforms of the main parts of Fig. 1, and Fig. 3 is a diagram showing the waveforms of the main parts of Fig. 1.
The figure shows all the waveforms of the main parts of Fig. 1 when a 180 degree input is received, and Fig. 4 shows the structure a of a synchro-digital converter according to an embodiment of the present invention. , (1) is a Scotch transformer, (2) is a quadrant selection circuit, (31° (3h) (3B) is a cosine multiplier,
f41. (4A), (4B) are sine multipliers, (5)
is a subtracter, (6) is a transformer, (71° (7A),
(7B) is a phase detector, (8J is a voltage controlled oscillator, (9) is a reversible counter, (1oA), (10B) is an adder, all is a positive/negative discriminator, (12A), (12B) are reference values Generator. aJ is a comparator, α ship is an AND gate, and tts is a switching circuit. Note that the same reference numerals in the figure indicate the same or equivalent parts. Agent Masuo Oiwa 112 Fig. 3 Fig. 3 Voltage

Claims (1)

[Claims] A Scottsto transformer inputs a three-phase synchro signal and converts it into a two-phase resolver signal, and inputs the resolver signal,
a quadrant selection circuit that outputs an angular quadrant; a first sine multiplier that inputs an analog signal and a digital angle signal; and a first sine multiplier that multiplies the sine of the digital angle; A first cosine multiplier that inputs a signal and a digital angle signal and multiplies the analog signal by the cosine value of the digital angle, a subtracter that subtracts the two signals, and an adder that adds the two signals together. The first one inputs the analog signal and detects and rectifies the carrier wave.
a phase detector, and a voltage controlled oscillator that inputs an analog signal and outputs a clock signal. In a tracking type synchro-digital conversion device equipped with a reversible counter that inputs a clock signal and a status signal and carries out rising or falling counters, one of the two output signals of the quadrant selection circuit is converted into a plurality of sine wave signals. a second sine multiplier that inputs the digital value of the reversible counter to one input terminal of the input terminal of the reversible counter, and inputs the digital value of the reversible counter to the other input terminal, and multiplies the sine of the digital value; A cosine wave signal, which is another output signal of the quadrant selection circuit, is input to one of the plurality of input terminals, the digital value of the reversible counter is input to the other input terminal, and the digital value is Cosine multiplication 'J4 - first addition in which the second cosine multiplier that meets, the output of the second sine multiplier and the output of the second cosine multiplier are input to the two input terminals and added. The output of the first adder is input to one of the two input terminals of the adder, and the reference current signal r is input to the other input terminal. a second phase detector that inputs the output sound of the second phase detector, determines whether it is positive or negative, and outputs a logic 1 if it is negative, and generates a certain reference voltage, respectively. the output of the first phase detector is input to one input terminal of the two input terminals, and the output of the first phase detector is inputted to the other input terminal, and the output of the first reference value is inputted to the other input terminal. A comparator that inputs all the outputs of the generator and compares them, and outputs logic 1 when the output is below the reference value, inputs the output of the above comparator to one of the two input terminals, and inputs the output of the above comparator to the other input terminal. An AND gate that inputs the output of the positive/negative discriminator to the input terminal and outputs a logic 1 when both logics are 1, and the second reference value generator to one of the two input terminals. A switching circuit which inputs the output of the AND gate, inputs all the outputs of the AND gate to the other input terminal, and outputs the value of the reference value generator when the output of the AND gate is logic 1, and two input terminals. The output of the first phase detector is inputted to one input terminal of the terminal, all the outputs of the switching circuit are inputted to the other input terminal, and the second output signal is added and sent to the voltage controlled oscillator. A synchronized digital conversion device with all features including an adder.