JPS60187164A - Telemeter receiver - Google Patents

Abstract

PURPOSE:To increase a response speed and to improve the reliability of the device by providing a means which counts the period of an input pulse frequency signal with a reference clock pulse signal. CONSTITUTION:The reference clock pulse signal S4 from an oscillator 4 is inputted to an AND circuit 5 all the time and when a pulse frequency signal S2 from a demodulator 1 is inputted to the AND circuit 5 in this state, a clock pulse signal S5 is outputted at the mark pulse time of the signal S1. Then, the signal S5 is inputted to a counter 6 and begins to be counted, and the counted number is inputted to an address of ROM7. Then a digital signal proportional to a frequency is written corresponding to the counted number. Consequently, when the counted number with pulse width is inputted, a desired digital signal output is outputted from the ROM7.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a current-resistant frequency type telemeter receiving device that changes the frequency of a pulse signal transmitted from a slave station and measures C, for example in a remote monitoring and control device. (hereinafter referred to as premeter receiving device in 1-1A).

[Technical Background of the Invention J Generally, when obtaining digital output in this type of telemeter receiving device, as shown in FIG. The F-V converter 2 converts it into a pulse frequency signal S1, the F-V converter 2 converts it into a DC voltage signal S2 proportional to the frequency of this signal, and the AD converter 3 converts the DC voltage signal S2 into a digital output signal. I'm trying to get S3.

-To give an example, the pulse frequency signal is 20 Hz-3
At 0Hz, the DC voltage signal is generally 0 to 5V, and the digital output value is generally 0 to 999.

[Problems with Background Art] Naturally, in such a telemeter receiving device, for example, when the pulse frequency signal 81 changes instantaneously from 20 Hz to 251-1 z at time to, as shown in FIG. , the DC voltage signal S2 is O~2.5v as shown in the i3 diagram.
It takes 18 ri to change to 1 ri.

This time is generally considered to be 2 to 3 seconds, and this delay is
-■ The inverter 2 is of the RC charging/discharging type. f
, t (゛, This increases the response speed by 2 to 3 seconds, so
If the pulse frequency signal S1 changes one after another within two seconds, there is a problem that a complete response cannot be achieved and accurate measurements cannot be made as a telemeter receiving device.

[Object of the Invention] The present invention was made in order to solve the above-mentioned problems, and its purpose is to provide a pre-meter reception capable of increasing the response speed and improving the reliability of the device associated with this. The goal is to provide equipment.

[Summary of the invention] In order to achieve the above object, the present invention provides an external
a counting means for counting aI with the pulse signal sent (based on the period of the incoming pulse frequency signal); and a converting means for converting the output from the counting means into a digital signal output proportional to the frequency of the pulse frequency signal; The present invention is characterized in that an ``arremeter receiving system'' is constructed from the above-mentioned means for holding the digital signal output of the converting means until data is updated.

[Embodiments of the invention] An embodiment of the present invention shown in the drawings will be described below.

FIG. 4 is a block diagram showing an example of the configuration of a telemeter receiving device according to the present invention.

In the figure, 1 is a demodulator that converts a signal SO sent from a slave station at an audio frequency into a pulse frequency signal S1. 4 is an oscillator that outputs a reference clock pulse signal S4, and 5 is a signal S1. is an AND circuit that outputs the reference clock pulse signal S4 output from the oscillator 4 only while the logic value is 111 I+, and 6 is an LSI element that outputs the clock pulse signal S5 output from the AND circuit 5 to the input circuit 1. 1 is a counter.Furthermore, 7 is a read-only output signal S6T from the counter 6 which converts a pure binary arc into a 5-digit (im output) proportional to the frequency of the pulse frequency times S1. Memory (Read
0o-IV Memory (hereinafter referred to as R○~1), 8 is a memory that holds the digital signal output of this ROM 7 until the data is updated, 9 is the reset signal S91 of the counter 6 and the capture of the memory 8 This is a control circuit that outputs a timing signal 892.

Next, the operation of the telemeter receiving apparatus of the present invention constructed as described above will be explained. In FIG. 4, the reference clock pulse signal $4 from the oscillator 4 is always output to the 111 AND circuit 5, and in this state, when the pulse frequency multiplied @s1 from the demodulator 1 is input to the AND circuit 5, When the signal s1 has a logic value II 111, that is, the mark pulse time, a lock pulse signal RS 5 is output as shown in FIG. Therefore, the length of the pulse width of the pulse frequency signal 81 is determined by the clock pulse signal S5CjJun1-.

That is, the clock pulse signal S5 outputted to the unloading circuit 5 is manually inputted to the counter 6 to start counting. This count number is output as simple binary data and sent to addresses RO-17.

In this case, the output signal S6t of the counter 6 has a pulse width of 1 to 1), J stiffness, and a pulse frequency signal S1.
The mark pulse time per cycle is 1.2f, where f is the frequency. The octopus at Zoshi-C1 signal 86 is -7-
Since it covers proportionately to the width of Kubalus, the circumference is 1ffl and several days Q'J
L/(is proportional to 1, -'fc. Therefore, a conversion table is used to make the IC digital output power proportional to the frequency. By calculating the clock count number based on this frequency by C1 calculation in advance,
Corresponding to the count number input to the address of 7-
A digital signal output proportional to the C frequency is written to the data in U ROM 7. As a result, a digital signal output that can be requested when the pulse width is shortened by one to a number is outputted from 17 to Ro. Then, this value is written into the memory 8 to hold the next pulse, and the output signal S8 is sent to the CPU (not shown) as an input signal.
Give it as a detsuno.

In this case, FIG. 6 shows the input/output timing of the d5 input/output 8 by the term rfya-1.

In other words, as shown in the figure, the pulse frequency times H81 is the logical value "
Utilizing the timing when the signal changes from 1 to 0, the control circuit delays the timing signal S
Tr the write at 92. This delay time is calculated by counter 6
This is a very short period of time to ensure the time it takes for an input to be sent to -) and an output to be sent from /)+. On the other hand, after the writing to the memory 8 is completed, the counter 6 is reset to the reset 1 by a signal 891, and the memory 8 holds the data until the next write signal arrives.

As mentioned above, this premeter receiving device uses the demodulator 1 to convert the audio frequency signal SO sent from an external power source such as a slave station, and converts the period (pulse width) of the 1=pulse frequency signal S1 into the signal from the oscillator 4. i counted with reference clock pulse signal S4
f' V1 means counter 6, this counter 6
This ROM is used as a conversion means for converting pure binary data, which is the output signal S6, into a digital signal output proportional to the frequency of the pulse frequency signal S1.
It consists of a digital signal horn 7 and a meshiri 8 which serves as a memory means for holding Nork History Shin 115 and C.

1, 'f--), it is possible to reliably respond to the pulse frequency signal S1 that changes in a short period of time by increasing the response speed, and it is possible to perform accurate 1iTr measurements with great effort, improving reliability. Is it possible to do so?

Note that this defense is not limited to the above example, but can be explained as follows.
L) Real m It is something that can be done.

(a) In the above embodiment, the case where the mark pulse width is counted from 1 to 1 by the counter 6 has been explained, but instead of the mark pulse width, the space pulse width (logical value
), or both the mark pulse width and the space pulse width (logical values PA1°' and "O"), that is, the width of one cycle, may be counted without any problem.

(b) In the above embodiment, the case is described in which the ROM 7 is used as a conversion means for obtaining the j digital signal output jj that is proportional to the frequency of the received pulse frequency signal S1.
Similar effects can be obtained by using a non-volatile RAM and a discrete I-element circuit instead of RON4.

[Effects of the Invention] According to J: Unimoto's defense explained above, the period of the received pulse frequency signal is converted to a reference clock pulse (No. 8 and converted to Calan 1 and digital (g F + output is 1q). It is possible to provide an i-remake receiving device that can increase the response speed and improve the reliability of the device accordingly.

[Brief Description of the Drawings] Fig. 1 is a block diagram showing a conventional allemator receiving device;
Figure 2 is a diagram for explaining an example of countercurrent frequency input.
FIG. 3 is a diagram showing an example of the characteristics of the F-V converter for the same signal, and FIG. 4 is a diagram showing an example of the present invention.
5 and 6 are diagrams for explaining the operation of the present invention. 1... Demodulator, 2... F-V-J inverter, 3.
・・A-]〕]〕2 converter... optical oscillator, 5...
Anne 1~Circuit, 6...Counter, 7...RONIl,
8...Memory, 9...Control i] 11 circuits. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 1

Claims (1)

[Claims] a set counting means for counting the period of the pulse frequency signal sent from the outside using a reference clock pulse signal; and a conversion means for converting the output from the counting means into a digital signal output proportional to the frequency of the pulse frequency signal; A telemeter receiving device comprising storage means for retaining the digital signal output of the conversion means until data is updated.