JPS60183860A - Carrier tracking circuit - Google Patents

Abstract

PURPOSE:To synchronize a reference signal with an input signal in a short time after channel switching by storing differential frequency information between input signals of individual channel of a time division multiple signal and the reference signal independently and synthesizing differential frequency information and a phase error signal to control the phase of the reference signal at a channel switching time. CONSTITUTION:A phase comparing circuit 1 outputs a demodulated signal So and a phase error signal e0 in accordance with an input signal Si, which is obtained by multiplexing burst signals of individual channels in time division, and a reference signal Sr from a sine wave-cosine wave converting circuit 4. A loop filter 2 smooths the signal e0 to output an error signal e0'. In this case, the output of a synthesizing circuit 13 is stored in a storage circuit 14 as differential frequency information between signals Si and Sr. At this time, storage areas MA-Mi of the storage circuit 14 corresponding to channels are selected by switching circuits 15 and 16. A signal generating circuit 3 generates a phase signal Sp on a basis of the signal e0'. Said differential frequency information is taken out selectively in accordance with coming channels of the input signal. Since this information is varied continuously with respect to the same channel, it is synchronized quickly at a channel switching time.

Description

Detailed Description of the Invention [Technical Field of the Invention] The present invention provides a basis for synchronous detection corresponding to the input signal of each channel from a time division multiplexed signal; Regarding circuits.

[Invention Technique 1 (Problems with i-background technology)] In the TDMA (IFJ division multiple access) communication system, which is often used in tri-star communications, signals are sent out in bursts from a number of transmitting stations.
TD has arrived after being transformed into a modern world.
The MA signal is subjected to synchronous detection at the receiving station using the same demodulator. [time/minute υ] For multi-color signal synchronous detection, it is necessary to create a reference signal corresponding to each channel signal. The rear tracking circuit for creating this reference signal has conventionally included Heiss hand processing, inverse modulation, remodulation, and multiplication.

Many methods have been adopted. All of these are based on removing the information on the modulated signal from the modulated signal and extracting the frequency and phase of the carrier contained in the modulated signal through a tuned circuit with a high Q value or a phase-locked loop.
It increases the signal by 1q.

By the way, in the TDMA method, each digit! The carrier frequency and phase are the same for each channel burst. Therefore, immediately after channel switching, difference frequency information between the burst signal of the previous channel and the corresponding reference signal remains in the racking circuit. However, unlike phase information, frequency information cannot generally be obtained instantaneously (unless a sufficiently long input signal is referenced). was input, the new reference signal required a very long transient time to synchronize with the above Hurst signal.Therefore, at the beginning of each burst signal there is a very long transition time for the carrier 1-racking. A preamble had to be inserted, which caused a problem in which the transmission efficiency decreased by 4D.

[Object of the Invention] The present invention has been made in view of the above problems, and its purpose is to be able to synchronize with an input signal in an extremely short time when switching channels of a time division multiplexed signal. It is an object of the present invention to provide a 4:view/rear 1-racking circuit that can improve transmission efficiency.

[Summary of the Invention] The present invention stores difference frequency information between an incoming signal of each channel of a time division multiplexed signal and a reference signal corresponding to these input signals independently for each channel, and when switching channels, It is characterized in that frequency information corresponding to the reference signal is selectively extracted and this information is combined with the phase error (ffi signal) to suppress the phase of the reference signal.

[Effects of the Invention] According to the present invention, the difference frequency information between the input signal and the reference signal is stored for each channel, and the difference frequency information of the corresponding channel is selectively extracted to calculate the carrier 1 ranking. Since the operation is performed, when focusing on the same channel, the difference frequency information becomes a continuously changing value.

Therefore, immediately after channel switching, the frequency of the reference signal is determined instantaneously and quickly synchronized with the input signal. As a result, the length of the preamble inserted at the beginning of the burst signal can be shortened, and transmission efficiency can be significantly improved.

[Embodiments of the Invention] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a 4" diagram showing an example in which the present invention is applied to a baseband processing type digital key 1 rear tracking circuit. This key 17 rear tracking circuit includes a phase comparator circuit 1, a loop filter 2. The signal light main circuit 3 and the sine wave/cosine wave conversion circuit 4 are connected to form a feedback loop.

The phase comparison circuit 1 receives an input signal 3i obtained by time-division multiplexing the burst signals of each channel and a reference signal S from the sine wave/cosine wave conversion circuit 4.
Compare the phase difference between Si and S r. Therefore, the phase comparison circuit 1 outputs the demodulated signal 3o, removes the modulated signal component from the input signal 3i, detects the phase difference between the modulated carrier and the reference signal @Sr, and outputs the phase error signal eO. .

The loop filter 2 smoothes the error signal eIll. That is, the error signal eo is introduced into one input of the synthesis circuit 11 via the coefficient circuit 10, and is also introduced into one input of the synthesis circuit 13 via the 1-sequence number input 12. The output of the synthesis circuit 13 is the input signal 3i and the reference signal 3.
r difference frequency information is stored in the storage circuit 14 via the switching circuit 15. The memory circuit 14 is a switching circuit 15, 16 that is switched by an external control signal +'3 S c.
J2 is the storage area MA, MB corresponding to each channel.
, . . . M+ is selected. The information stored in the selected storage area is fed back to the synthesis circuit 13, and
η is applied to the other input of the synthesis circuit 11.

The signal generating circuit 3 shifts the phase signal @S1) which gives the phase of the reference signal 3p by R1 based on the error signal e' which has been smoothed by the loop filter 2. That is, the error signal eo'
is synthesized in a synthesis circuit 2818 with a constant S[J: corresponding to the frequency (specified value) of the input signal of each channel. The output of this combining circuit 18 is introduced into one input of a combining circuit 19. The output of the synthesis circuit 19 is stored in an output phase memory 20.

The output of the output phase memory 20 is fed back to the other input of the synthesizing circuit 19, and is also applied to the sinusoidal wave conversion circuit 4 as a phase signal S'1.

The sine wave/cosine wave conversion circuit 4 is configured, for example, by R01vl and J-'CIM, and the input phase (3tanS +
To the extent that J: can be raised to + (generated by using a sine wave, J, and cosine wave as the reference signal 3p. It is also possible to do this, and in this case, the synthesis circuit 18 becomes unnecessary.

On top of this, the Kitria 1-cut-1-1-9 times f3 according to this actual example of 4-generation is as shown in Figure 2. circuit 1
Select area 10 ~ 1Δ of /l in j formula (・doujin 1C during the period of receiving channel B's burst) and select 8 of the same MB during the period of receiving channel C's burst. works to select. And these stories 1n territory 1pf
fiMA, N.IIE3. The difference frequency information of each channel stored in the MC is selectively extracted according to the arrival channel of the input time-division signal. In this case, the time period of one frame (the interval at which signals of the same 1ν channel arrive) is generally specified, so for example, if the period of one frame is known by an internal L1 check, etc. period (two-difference frequency information may be switched).

The difference frequency information extracted in this way, when focusing only on the same channel, is a piece of information that fluctuates completely continuously. Therefore, when switching channels, synchronization can be quickly achieved as if the J-Unit had been operating continuously since the previous frame. Therefore, compared to the conventional method, the gap required for 1-racking is greatly reduced, so the preamble length is reduced by 7. G16 will become possible, and efforts will be made to improve transmission efficiency.

FIG. 3 is a diagram showing an embodiment in which the present invention is applied to the inverse modulation type 1). Input signal 81 is input to phase comparison circuit 21 and inverse modulation circuit 22 . The phase comparator circuit 21 has a sine wave.
The base) V signal 3r from the cosine wave conversion circuit 23 is also input,
Demodulated data SO is output based on this reference signal 3r and human input signal Si.

This demodulated data SO is input to the inverse modulation circuit 22 via the identification circuit 24, and is subjected to inverse modulation of the human power signal @Si. The unmodulated signal 3n from which the modulated component has been removed by this inverse modulation and is disturbed by the filter 73 is sent to the phase comparison circuit 25 u'i'
b; No. 3 Input together with r. The phase comparison circuit 25 is
A phase error signal ea is generated and output.

This much! (] njj difference fi:j''5eo is smoothed by the loop filter 26, and waveform-converted via the signal generation circuit 27 and the sine wave/cosine wave conversion circuit 23 to form the base LF (; bawl.

In the loop filter 2G, a memory circuit is provided which has a memory area corresponding to each channel, as in the previous embodiment, and this memory circuit is configured to have a memory area for each channel by an external control No. 12 Sc. can be switched.

C according to this example also has the same effect as the previous example with 1q
can be done.

FIG. 4 is a diagram showing an actual vA example in which the present defense is applied to a remodulation type. Input signal 3i is input to phase comparison circuits 31 and 32. The reference signal Sr from the sine wave/cosine wave 2 subtraction circuit 33 is also input to the phase comparator circuit 32, and this reference signal 3
Demodulated data SO is output based on r and input signal Si. This one! The i-key data SO is input to the re-modulation circuit 35 via the identification circuit 34 along with the reference signal Sr. Remodulation signal s Hl from remodulation circuit 35 and input signal 3i
The phase comparison circuit 31 compares the phase with the phase comparison circuit 31. From the phase comparison circuit 31, modulation 4g 45 Based on the phase comparison of comrades,
The signal eO is output to the phase error A from which the modulation component has been removed. Thereafter, waveform conversion is performed in the sine wave/cosine wave conversion circuit 33 via the loop filter 36 and the S generation signal 37 to generate the reference signal 3r. The same effect as before can be achieved by combining the above.

FIG. 5 (This is a diagram showing an embodiment in which Mamoto's explanation is applied to an inverse modulation type tank system. The human horn signal 3i is input to the comparator circuit 41 and the inverse modulation circuit 42.

The phase comparator circuit 41 receives p tlr from the tank circuit 43.
A signal 3r is also input, and this reference signal Sr is a human input signal 3i.
Based on this, the demodulated date SO is output.

This II tone data SO is input to the inverse modulation circuit 42 via the identification circuit 44. The inverse modulation circuit 42 receives the input signal 3i
is inversely modulated to remove the modulated component, and an unmodulated signal 3n disturbed by noise is output. This unmodulated signal 3n is input to the phase comparison circuit 45 as a reference signal 3r. The phase comparison circuit 45 outputs a 1η phase error signal F'r e O. This transmission signal eo passes through a loop filter 46 and controls the tuning frequency of a tank limiter circuit 43 that removes noise components from the unmodulated signal 3n, thereby generating a reference signal 3r.

The tank circuit 43 can be constructed of a second-order feedback type digital f filter, for example, as shown in FIG.

In addition, in the figure, 50.51 is a synthesis circuit, 521 J 3 is a word memory, L) 41 J 5 is a variable coefficient @ camphor circuit,
eo' is the sub-leg signal of the output of the loop filter, and 56 is a filter coefficient bank for determining the tuning frequency of the tank. Further, as in the previous embodiment, the same configuration as described above can be applied to the loop filter 4G.

FIG. 7 is a diagram showing an embodiment in which the present invention is applied to a transmission system. Input signal 3r consisting of N 11IP S K signal
is multiplied by N in a frequency multiplier circuit 60 to remove the modulated component, and the unmodulated signal 1-- is outputted from a signal generation circuit G2 consisting of an i:iJ variable frequency oscillator in a mixer 61.
It is combined with the signal S[ and mixed with the signal S[. The output signal 'i3n+ of the mixer 61 has its noise component removed in the tank circuit 63, divided by 7/'N in the frequency dividing circuit 64, and then mixed up in the mixer 65.

As a result, the reference signal Q for synchronous detection is output from the mixer 65.
3r is output. Further, the input and output signals of the tank circuit 63 are phase-compared by a phase comparison circuit 66. Phase comparison circuit 6
The phase error signal eO output from G controls the signal light main circuit 62 via a loop filter 67.

Also in this embodiment, the loop filter 67 is
- The configuration is similar to that of the third embodiment.

Similarly, the present invention can be applied to various types of carrier 1-racking circuits. Also,
The present invention is not limited to digital circuits, but may be constructed partially or entirely using analog circuits.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a baseband processing type according to an embodiment of the present invention, without showing the racking circuit, and FIG. 2 is a diagram for explaining the operation of the circuit. 5. FIG. 1 is a block diagram showing a kitria tracking circuit according to another embodiment of the present invention, FIG. 6 is a reblock diagram showing an example of the tank circuit in FIG. FIG. 7 is a block diagram showing a carrier 1-racking circuit according to still another embodiment of the invention. 1.21.25.31.32.41,45. (i13・
・・Phase comparison circuit, 2.26.36, 46.67...
Loop filter, 3.27.37.62...138 generation circuit, 4.23.33...signal generation circuit, 10°1
2... Coefficient circuit, 11.13... Synthesis circuit, 14.
...Memory circuit, 15.16...Switching circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 22 Figure 4 Figure 5 Otsu 2 4] Figure 6 C, r

Claims (1)

[Claims] Time division multiplexing Y) each!・Input of the channel (phase ratio of No. 3 and the reference signal corresponding to the human signal of each of these chitonels manually to generate a phase error signal of both signals) circuit, etc.
Input signals of each of the chitonels and their corresponding groups 11ζ
(A storage means for storing the difference frequency information with respect to No. 8 for each channel, the storage means stores the difference frequency information corresponding to the frequency λ of the arrived input signal in the division multiplexed signal) a means for selectively extracting and overturning information; and a means for synthesizing the difference frequency information extracted by the means and the above-mentioned () error signal, and based on this synthesis (, 36, the base "+' (i 210 means (J,
A key A rear tracking circuit comprising (14) digital filters.