JPS60175435A - Inspecting method for pattern width of circuit pattern - Google Patents

Abstract

PURPOSE:To eliminate the good and adverse influences of an accurate positioning and the accuracy of the pattern itself by producing a logic signal in sequence from an arbitrary position on the circumference toward the prescribed rotating direction, and counting the number of varying logic levels. CONSTITUTION:A circuit pattern is converted by a television camera into an electric signal, and output as a video signal 7. The signal 7 is converted by a binary threshold level preset by a binary circuit 8 into a binary image. The varying point of the circuit pattern and the background is obtained from the binary image by a varying point segment circuit 9, and X and Y coordinates of the varying point are simultaneously stored in a varying point memory 10. The portion narrower than the specified pattern width is detected by the binary image and the varying point coordinates by a circle detector 11. The discriminated result is stored in an error point memory 12, and the defect is indicated by an image.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for inspecting the pattern width of a circuit pattern.

[Background of the invention]

Conventional pattern defect inspection methods include a design data comparison method and a comparison inspection method for the same product. The disadvantage of both methods is that it is very difficult to align the inspection target with the comparison data or with the comparison workpiece, and there are cases where erroneous judgments are made based on the relationship between the alignment accuracy and the detected defect accuracy.

In addition, if the pattern to be inspected has good geometrical precision, it can be inspected using the conventional method described above, but if the pattern itself is distorted or has large variations due to each sun wheel, accurate defect determination cannot be performed. There is a drawback that it cannot be done. These circumstances were the same in pattern width inspection.

[Purpose of the invention]

An object of the present invention is to eliminate the drawbacks of the above-mentioned prior art, and to enable pattern width inspection during pattern defect inspection without worrying about accurate positioning or accuracy of the pattern itself. An object of the present invention is to provide a pattern width inspection method.

[Summary of the invention]

The method for inspecting the pattern width of a circuit pattern according to the present invention is as follows. First, the photoelectrically converted two-dimensional video signal of the circuit pattern, the entire background image, and the circuit pattern are binarized at a predetermined threshold level to obtain a binarized image 1. Figure 1 (
α) is a diagram showing an example of a binarized image obtained in this way, and as shown, it consists of a circuit pattern 1 and a background image 2.

Next, change points between circuit pattern 1 and background image 2 are detected from the above binarized image, and X of the change points is detected.

Form a Y coordinate and a change point image. FIG. 1(h) is a diagram showing an example of a changing point image, in which changing point image (border line) 1a
~1k are formed.

Next, out of all pixels located on a circumference with a predetermined radius around a certain change point fcX, Y)k and each pixel of the change point image, pixels in which both overlap are extracted. In that case,
The content of the pixel where the above two overlap is set as 1'', and the content of the non-overlapping pixel on the circumference is extracted as ``add'' (the logical setting may be the reverse of this). Then, the content of each extracted pixel on the circumference is extracted as a logic signal of 61'' and 0'' in order from a pixel at an arbitrary position on the circumference in a predetermined rotation direction. And the logic level of this logic signal is ′
Count the number of transitions from 1" to 0" or from 0" to 1", and only if this count exceeds 7'ft: p, the pattern width of circuit pattern 1 is narrower than the predetermined width and a defect has occurred. judge that it is.

That is, the pattern width of the circuit pattern 1 is generally defined as the minimum pattern width for flowing current, and it is sufficient if it has a certain width.

Therefore, when considering the relationship between all pixels located on the circumference of a circle with a radius equal to the pattern width around a certain change point and each pixel of the change point image, it is found that the pattern width is normal and a distance of 9 or more is maintained. In this case, the circumference of the above-mentioned radius [hereinafter referred to as determination circle]. ] and the change point image intersect at two points.

Also, if the pattern width is exactly the distance, the number of intersections is 3.
It becomes a place. In that case, the area of each intersection (the number of overlapping pixels) usually differs depending on the shape of the circuit pattern. Therefore, the contents of the pixels that overlap the judgment circle of the radius and the change point image are detected as 1'' or '0'', and the pixels that do not overlap with the change point image on the judgment circle are extracted using the reverse logic. Then, logic signals of ``1'' and 0'' are taken out in order from a pixel at an arbitrary position on the judgment circle in a predetermined rotation direction, and the logic level is changed from 1'' to 0'' or 0.
” to 1H. When the intersection of the judgment circle and the change point image is at one point, the logic level transitions twice, so if the pattern width is exactly the distance, If there are 3 intersections, there will be 6 logic level transitions. Therefore, when 7 or more logic level transitions are detected, the circuit pattern width is narrower than the predetermined width by ρ, and it is determined that there is a defect. do.

FIGS. 1C and 1D are diagrams showing a specific example of determining whether there is a defect in the pattern width from the change point image flUy, 1i and the change point m+fs*fs. In Fig. 1 (cl), the intersection of the change point f, the pixel on the judgment circle with the radius centered on the entire center, and the pixel of the change point images 1y, 1i is
α1. There are two points of bl, and the logic level transition on the judgment circle is four times. Therefore, based on the determination based on the change point f1, the pattern width is determined to be normal. Figure 1(d)
The change point f1 shown in In the judgment based on ft and fsK, the intersection points are aI + hI * at + hl + α3, respectively.
．． h, the logic level transitions four times9, and is determined to be normal. However, the change point f shown in FIG. 1(c) VC,
In the judgment based on , the intersection is αt+'t+'! Since the number of *G points is 4 and the number of logic level transitions is 8, it is determined that the pattern width is narrower than the predetermined width and there is a defect.

[Embodiments of the invention]

An embodiment of the present invention is shown in FIGS. 2 and 3 below.

This will be explained using FIG. 4, FIG. 5, and FIG. 6.

FIG. 2 is a block diagram showing one embodiment of the present invention. As shown in the figure, the circuit pattern formed on the circuit component to be inspected 5 is imaged on the television camera 4 through the entire optical system 6. This circuit pattern is then converted into an electrical signal by the television camera 4 and output as a video signal 7.

The video signal 7 reaches the binarization threshold level previously set in the binarization circuit 8 to separate the background and the circuit pattern, and the video signal 7 reaches the binarization threshold level previously set to separate the background and circuit pattern, Obtain an image. Next, from the binarized image, change points between the circuit pattern and the background (i.e., the boundary image of the circuit pattern) as shown in FIG. Store the x and y coordinates in the change point memo +710. and,
The circle test circuit 11 detects a portion narrower than the specified pattern width using the above-mentioned binarized image and change point coordinates. At this time, the specified pattern width can be set externally.
It is given as a determination reference signal 14. The determination result is stored in the error single point memory 12, and a defect 20 as shown in FIG. 3(α) is obtained as a defect detection image 21 shown in FIG. 3(C).

Next, the circle verification circuit 11 will be explained.

As shown in Fig. 4, the pixel EI + El +...EK-1 + El'', which corresponds to a circle whose radius is the width of the inspection pattern, is determined in advance with the change point of interest fCi,j)k as the center. The image of the circumference is set as a circle 22. Here, several images of the circumference to be set are set in advance so that the radius can be arbitrarily changed from the outside, and the images are switched by the judgment reference signal 14 from the outside.

Here, the distance from the change point f Ci, j) is defined as the criterion for radius fD pixels, and the following pixels on the circumference whose center is the change point f Ci, j) and whose radius corresponds to the distance D pixels. Find all pixels EI='h that satisfy conditional expression (1).

However, m, +c=-1), -, -1, 0,1, =-
,D.

0≦α×1.

Next, among these pixels E, ~EK, the content of the pixel at the change point is set to "1", and the content of the other pixels is set to "0".
”, the entire circle pixel extraction circuit 111 is used to extract the pixels E, ~Eρ on the judgment circle 22 extracted by the circle pixel extraction circuit 111, and the contents are parallel signals υ, and the parallel/serial converter 112 The contents of the pixels E, -Ek are converted into serial signals in the order of pixels E, -Ek.The contents of the pixels E, -Ek that have been converted into serial signals are input to the signal transition state detection circuit 113, where the logic level is " The number of transitions from "1" to "0" and from "+" to "1" is counted. Then, only when the counted value is 7 or more, it is determined that there is a defect in the circuit pattern and an error signal 114 is sent. is output and stored in the error memory 12.

FIG. 4 is a diagram showing a specific example of the circle verification circuit 11. The contents of the pixels E and -Ek output from the circle pixel extraction circuit 111 (not shown in FIG. 4) are taken into the bit shift register 31 at the output timing of the take-in pulse 30.

At this time, the first bit of the shift register 51 contains the pixel E.
The contents of pixel Ek are taken in, and the second bit contains pixel Ek,
The contents of + are taken in, and thereafter, the contents of pixel E are taken in in the same manner as the th bit.

This shift register 31 corresponds to the parallel/serial converter 112 described above, and shifts the contents of each bit by one stage each time a shift pulse is input. The contents of the first bit and the (&-1)th bit are input to the signal transition state detection circuit 113. The exclusive OR circuit 62 in the signal transition state detection circuit 113 receives the contents of the th bit and the (&-1)th bit, and then outputs the contents of the shift register 3.
Every time the contents of 1 are shifted by one stage, the bit-th and (
&-1) Detect whether the contents of the bit are a combination of 1'' and 0''. Then, it outputs '1' only when it becomes a combination of 1'' and 0''.

As a result, the contents of pixels E, -Ek (1", '0")
A transition point is detected. 1'' indicating the transition point output from the exclusive OR circuit 32 is subjected to an AND condition with the shift pulse in the AND circuit 33, and then input to the counter 34 and counted. 35
1 comparator 3 when the count value is 7 or more.
5, "1" corresponding to the error signal 114 is output.

5A and 5A show changing point images 1, . . . of the circuit pattern output from the changing point differentiation circuit 9 shown in FIG. 1
It is a figure which shows the specific example of i (boundary line). Figure 5←) is
The determination circle 22 centered on the change point f(i, j) is the change point image 1. fin5 diagram (
A) FX change point f Ci, d) Judgment circle 22 centered on k is change point memory; 1. The figure shows the case where the two points intersect at four points. Therefore, FIG. 5(α) shows a case where the circuit pattern is normal, and FIG. 5(b) shows a case where a defect has occurred in the circuit pattern. In addition, in FIG. 5 (α), Cb), there are 28 judgment circles 22 f) pixels E1 to Et8.
It is formed from.

Each pixel E, ~E! on the determination circle 22 shown in FIG. 6 (α), Cb) ij, and FIG. 5 (α), (h) K! 81, a circle pixel extraction circuit 111 in the circle judgment and determination circuit 11 in the case of 'fc' processed by the circle verification circuit 11 shown in FIG.
3 is a time chart showing the output of the AND circuit 33. Here, FIG. 6 ←) represents each pixel E1 to E shown in FIG. 5 (eL)! In the case of st-treatment, Fig. 6 (A)
are each pixel E, ~E! shown in FIG. 5(h). This is the case when s is processed. In the case shown in FIG. 5 (α) and FIG. 6 (α), pixels E□, E4 and pixel E26 *
Two sets of E17 are combined into one by the circle pixel extraction circuit 111.
Therefore, the AND circuit 36 outputs four pulses indicating a logic level transition.

Therefore, in this case, since the count value of the counter 34 shown in FIG. 4 is 4, which is smaller than 7, the circuit pattern is determined to be normal. In the case shown in FIG. 5 (α) and FIG. 6 (h), as shown, pixel E and pixel EII * E6
, pixel EIor 41 , and pixel E0 are detected as "1" by the circle extraction circuit 111, and therefore the AND circuit 33 outputs eight pulses indicating a transition of logic levels. Therefore, in this case, the count value of the counter 34 shown in FIG. 4 is 8, which is greater than 7, and therefore it is determined that the circuit pattern has a defect.

Note that the present invention can be realized by software processing, but it can also be realized by real-time processing by hardware using a pipeline image memory.

As described above, according to this embodiment, it is possible to inspect the pattern width using a simple criterion without requiring highly accurate positioning and standard pattern metals for comparison. Therefore, the cost of the inspection device can be reduced.

[Effects of the Invention] According to the present invention, the judgment criteria are simplified, the high precision positioning and standard patterns that conventionally required engineers are no longer required, and the accuracy of the circuit pattern itself is not a problem. A method for inspecting the pattern width of a circuit pattern can be provided. Therefore, there is no need for a standard pattern generating device for comparison, and the inspection device can be made smaller and cheaper.

[Brief explanation of the drawing]

Figure 1←), (A)l (C)9 (d) is a diagram showing the principle of the present invention, Figure 2 is a diagram showing an embodiment of the present invention, Figure 3 (α), (A) , CC) is an explanatory diagram showing the operation of the embodiment shown in FIG. 2, FIG. 4 is a diagram showing an example of the circle verification circuit in the embodiment shown in FIG. 2, and FIG. 5 (α). (b) is a diagram showing a specific example of a changing point image of a circuit pattern output from the changing point differentiation circuit in the embodiment shown in FIG. 2, and FIG. It is a time chart showing the processing of each pixel on the determination circle by the circle test circuit. 1... Circuit pattern 1α to 1k... Change point image 2
...Background image 4...Television camera 5...Circuit components to be inspected 6...Optical system 8...Binarization circuit 9...
- Change point differentiation circuit 10... Change point memory 11... Circle verification circuit 12... Error memory 20... Defect 21... Defect detection image 22... Judgment circle 3
1... Shift register 32... Exclusive OR circuit 33
...AND circuit 34...Counter 35...Comparator 111...Circle pixel extraction circuit 112...Parallel/serial converter 113...Signal transition state detection circuit Fig. 1 Fig. 2 Fig. 14

Claims (1)

[Claims] The photoelectrically converted two-dimensional video signal of the circuit pattern is binarized into the background image and the circuit pattern at a predetermined threshold level to form the entire binarized image, and then the above two The change point between the background image and the circuit pattern is detected from the value image, the X and Y coordinates of the change point and the change point image are formed, and the next change point fc is detected.
X. All pixels located on a circumference of a predetermined radius with Y) as the center and pixels where the change point image overlaps are set to logic level "1" or 0, and pixels on the circumference that do not overlap are set to the logic level "1" or 0. The inverse logic of the overlapping pixels is extracted, and then the extracted logic signals are sequentially extracted from any position on the circumference in a constant rotation direction, and the number of times the logic level "1" and "0" transition is calculated. 1. A method for inspecting a pattern width of a circuit pattern, characterized in that the pattern width is counted and, only when the counted value exceeds a predetermined number, it is determined that the pattern width is narrower than the predetermined width and a defect has occurred.