JPS60174367U - TV receiver trap circuit - Google Patents

TV receiver trap circuit

Info

Publication number
JPS60174367U
JPS60174367U JP1984062823U JP6282384U JPS60174367U JP S60174367 U JPS60174367 U JP S60174367U JP 1984062823 U JP1984062823 U JP 1984062823U JP 6282384 U JP6282384 U JP 6282384U JP S60174367 U JPS60174367 U JP S60174367U
Authority
JP
Japan
Prior art keywords
circuit
switching
parallel resonant
switching diode
catv
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984062823U
Other languages
Japanese (ja)
Other versions
JPH0141221Y2 (en
Inventor
犬飼 弘幸
Original Assignee
株式会社富士通ゼネラル
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社富士通ゼネラル filed Critical 株式会社富士通ゼネラル
Priority to JP1984062823U priority Critical patent/JPS60174367U/en
Publication of JPS60174367U publication Critical patent/JPS60174367U/en
Application granted granted Critical
Publication of JPH0141221Y2 publication Critical patent/JPH0141221Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Details Of Television Systems (AREA)
  • Filters And Equalizers (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるテレビ受信機のトラップ回路の一
実施例を示す電気回路図、第2図は従来のFM)ラップ
回路図、第3図は周波数特性図である。 1・・・・・・入力端子、2,3,9・・・・・・コイ
ル、4゜5.10,13.15・・・・・・コンデンサ
、6,7・・・・・・並列共振回路、11・・・・・・
直列共振回路、12゜14・・・・・・スイッチングダ
イオード、16,17゜18.19・・・・・・抵抗、
20・・・・・・CATV用切換接点、21・・・・・
・−膜数送用切換接点、22・・・・・・スイッチング
回路、23・・・・・・共通接点、24・・・・・・F
Mトラップ回路。
FIG. 1 is an electric circuit diagram showing an embodiment of a trap circuit of a television receiver according to the present invention, FIG. 2 is a conventional FM wrap circuit diagram, and FIG. 3 is a frequency characteristic diagram. 1... Input terminal, 2, 3, 9... Coil, 4゜5.10, 13.15... Capacitor, 6, 7... Parallel Resonant circuit, 11...
Series resonant circuit, 12゜14...Switching diode, 16,17゜18.19...Resistance,
20...Switching contact for CATV, 21...
・-Membrane number feed switching contact, 22...Switching circuit, 23...Common contact, 24...F
M trap circuit.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)入出力間に、コイルとコンデンサからなる2個の
並列共振回路を直列に挿入し、これらの並列共振回路の
結合点と接地間に直列共振回路を挿入してなるトラップ
回路において、直列に挿入された前記2個の並列共振回
路と並列にCATV用スイラスイツチングダイオード力
側からみて逆向にして結合し、前記2個の並列共振回路
の結合点と直列共振回路の間に一般放送用スイツチング
ダイオードを、並列共振回路側からみて逆向にして挿入
し、前記CATV用スイラスイツチングダイオードード
側をトラップ回路に内蔵したスイッチング回路やCAT
V用切換接点に結合し、カソード側を抵抗を介して接地
し、前記−膜数送用スイツチングダイオードのアノード
側を、前記スイッチング回路の一般放送用切換接点に結
合してなることを特徴とするテレビ受信機のトラップ回
路。
(1) In a trap circuit, two parallel resonant circuits consisting of a coil and a capacitor are inserted in series between the input and output, and a series resonant circuit is inserted between the connection point of these parallel resonant circuits and the ground. A CATV swivel switching diode is connected in parallel with the two parallel resonant circuits inserted in the circuit in opposite directions when viewed from the power side, and a general broadcasting circuit is connected between the connection point of the two parallel resonant circuits and the series resonant circuit. The switching diode for CATV is inserted in the opposite direction when viewed from the parallel resonant circuit side, and the CATV swivel switching diode side is built into the trap circuit for switching circuits and CAT.
V switching contact, the cathode side is grounded via a resistor, and the anode side of the switching diode for membrane number transmission is coupled to the general broadcasting switching contact of the switching circuit. TV receiver trap circuit.
(2)直列共振回路のコンデンサを、スイッチングダイ
オードをオン、オフするための直流電流の遮断兼用とし
た実用新案登録請求の範囲第1項記載のテレビ受信機の
トラップ回路。
(2) A trap circuit for a television receiver according to claim 1, in which the capacitor of the series resonant circuit serves as a direct current cutoff for turning on and off a switching diode.
JP1984062823U 1984-04-27 1984-04-27 TV receiver trap circuit Granted JPS60174367U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984062823U JPS60174367U (en) 1984-04-27 1984-04-27 TV receiver trap circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984062823U JPS60174367U (en) 1984-04-27 1984-04-27 TV receiver trap circuit

Publications (2)

Publication Number Publication Date
JPS60174367U true JPS60174367U (en) 1985-11-19
JPH0141221Y2 JPH0141221Y2 (en) 1989-12-06

Family

ID=30592396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984062823U Granted JPS60174367U (en) 1984-04-27 1984-04-27 TV receiver trap circuit

Country Status (1)

Country Link
JP (1) JPS60174367U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04262683A (en) * 1990-08-06 1992-09-18 Thomson Consumer Electron Inc Television receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04262683A (en) * 1990-08-06 1992-09-18 Thomson Consumer Electron Inc Television receiver

Also Published As

Publication number Publication date
JPH0141221Y2 (en) 1989-12-06

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