JPS60159949A - Trace signal system - Google Patents

Abstract

PURPOSE:To execute a delicate trace operation by the minimum number of signal lines, by adding newly a frame synchronizing signal line of a trace data signal. CONSTITUTION:A processing of each signal of a trace data signal (a), a write timing signal (c) and a selecting signal (b) is executed automatically by executing a write instruction to an I/O port 3 or memory device, to a microprocessor 1. When the output of the first trace data signal (a) is ended, a frame synchronizing signal 5 is returned to an inactive state (a high level from a low level). Thereafter, the trace data signal (a) in this frame is outputted by executing successively a write instruction of the microprocessor 1. By executing this operation one after another, the trac data signal is outputted to a trace signal receiving device 2. The receiving device 2 counts the time of pulse intervals of a frame synchronizing signal (d), measures an execution time of the microprocessor 1, fetches and analyzes the trace data signal (a) by applying a gate, by which the trace signal receiving device 2 can be made to have various trigger functions.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field to which the Invention Pertains] The present invention relates to a trace method, and more particularly to a software trace signal method that is optimal for small, portable communication terminal equipment.

[Prior art]

Traditionally, when developing software for small, portable communication terminal devices, general-purpose development tools are used on a circuit called an evaluation board that is different from the actual device, and the developed software is implemented on the actual device. A method is being taken to do so. However, in this case, it very often does not work or malfunctions on the actual device, and solving the problem usually requires a great deal of difficulty and time. The reason is that the device is small and
This is because because it is portable, it may be difficult or impossible to connect general-purpose tools. In addition, even if a general-purpose tool can be connected, in the case of small communication devices and mobile devices, due to their nature, the software that is targeted for debugging is not only sequence control but also has strong firmware-like elements such as signal processing for transmission and reception. This is because general-purpose tools are insufficient in many respects.

In addition, with conventionally proposed tracing methods, if the user's software includes signal processing for transmitting and receiving, the processing time for the trace signal may become non-negligible, and detailed tracing is not possible.

Furthermore, as devices become smaller, the number of signal lines requiring circuits and connectors for outputting trace signals must also be reduced.

[Purpose of the invention]

It is an object of the present invention to provide a trace signal system that solves the above-mentioned drawbacks by adding a new frame synchronization signal line for trace data signals, thereby making it possible to perform detailed trace operations with a minimum number of signal lines. purpose.

[Structure of the invention]

The present invention provides eight trace data signal lines, a write timing signal line, and a select signal line so that microprocessor bus signals can be used as trace signal lines. It becomes possible to output trace data just by executing the 10 or memory access command once. In addition, in addition to the above signal lines, a frame synchronization signal line is prepared, and the frame synchronization signal line is operated when the first data of each trace signal frame is sent, so that the interval between frame synchronization signals can be adjusted by an external device. By measuring the time, the execution time of the target software can be measured, and the tracing function is significantly improved. Further, by using a frame synchronization signal when receiving a trace data signal in an external device, the data can be received correctly with a simple hardware circuit, so that the received data can be easily analyzed. Furthermore, since the trace data signal received when the frame synchronization signal is active can be extracted and pattern matched, it is possible to provide various trigger functions. For example, there is a trigger function that sets pattern match data in advance and starts receiving trace data when the content of the trace data signal matches the pattern match data, or vice versa. It is also possible to easily implement a trigger function to end data reception.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, 1 is a microprocessor;
Reference numeral 2 designates a trace signal receiving device, 3 designates an engineering board, 4 a bus signal group of the microprocessor 1, and 6 a connector for connecting the device to a trace signal receiving device 2 as an external device. 5 is a frame synchronization signal line. In the connector B, the trace signal lines are connected to the bus signal of the microprocessor 1, eight trace data signal lines, a write timing signal line, and a select line. As a result, when the connector 6 is viewed from the microprocessor 1, it can be treated as a microprocessor device or a memory device. The frame synchronization signal line 5 connected to the connector B is output from the I10 port 3 in the device and is controlled by a trace program inserted into the software of the microprocessor 1.

Next, the operation timing of each trace signal line will be explained with reference to FIG. Figure 6.

FIG. 4 is a flowchart diagram of the software inserted into the microprocessor.

In FIG. 2, (a) is a trace data signal, (b) is a select signal to the trace signal receiving device 2, and (C) is a write timing signal for the trace data signal (a).

(d) is a frame synchronization signal.

When outputting a trace signal, the microprocessor 1 makes the frame synchronization signal (d) active (from high level to low level), sets the seleno) (l(1))k high level, color low level, and sends data to the trace data signal line. output,
Add a pulse to the write timing signal line. After outputting the data, the trace data signal line is turned off and the select signal (b) is returned from low level to high level. The trace data signal (a), write timing signal (C), and select signal (b) are processed by a microprocessor.
This is automatically performed by executing a write command to the port or memory device at 9-1. When the output of the first trace data signal is finished, the frame synchronization signal is returned to inactive (from low level to high level). Thereafter, trace data signals within this frame are output by sequentially executing write commands of the microprocessor f1.

By performing the above operations one after another, the trace data signal is output to the trace signal receiving device 2.

The trace signal receiving device 2 measures the pulse interval of the frame synchronization signal (d), measures the execution time of the microprocessor f1, and also gates the frame synchronization signal (d) to extract and analyze the trace data signal (a). By doing so, the trace signal receiving device 2 can be provided with various trigger functions. For example, trigger data may be set in advance in the trace signal receiving device 2.

The frame synchronization signal (d) is multiplied by k to ensure a pattern match with the extracted trace data signal (a). In this way, there is a trigger function that stores and analyzes trace data signal 0 from the point where the received trace data signal matches the pattern and analyzes it, and a trigger function that stores and analyzes the trace data signal 0 from the point where the received trace data signal (a) matches the pattern and matches. A trigger function for terminating the reception of the trace data signal (a) and analyzing the received data can be easily realized.

〔Effect of the invention〕

As explained above, the present invention uses the eight trace data signal lines, write timing signal line, and select signal line that utilize the microprocessor's path signal, and measures the trace execution time. Furthermore, the trace signal system includes a frame synchronization signal line that can provide a trigger function.

It is possible to realize detailed tracing functions with less burden on both hardware and software.

[Brief explanation of drawings]

FIG. 1 shows a partial block diagram of an embodiment of the present invention, FIG. 2 is a timing chart of each signal line, FIG.
FIG. 4 is a flowchart diagram of software inserted into the microprocessor. In the figure, 1 is a microprocessor, 2 is a trace signal receiving device, 3 is an I10 port, 4 is a bus signal line group, 5 is a frame synchronization signal line, and 6 is a connection.

Claims (1)

[Claims] 1. Equipped with a microprocessor into which a trace program is inserted in advance, eight trace data signal lines are used as trace data signal lines, and signals on the trace data signal lines are received by an external receiving device. A trace signal system characterized by having a write timing signal line and a select signal line for a second time, and a frame synchronization signal line for a trace data signal. 2. The trace signal according to claim 1, characterized in that the operation time of the software being executed on the microprocessor is measured by timing the signal interval of the frame synchronization signal of the trace data signal. method. 6. The trace signal system according to claim 1, wherein the trace data in the external receiving device is analyzed by using a frame synchronization signal of the trace data signal. 4. Claim 1, characterized in that the trigger function is realized by analyzing the trace data signal received when the frame synchronization signal is active.
Trace signaling method as described in Section.