JPS60157680A - Processor for thinning line - Google Patents

Abstract

PURPOSE:To accelerate thinning line processing by constituting in such a way that referring frequency to adjacent picture elements can be suppressed to the minimum such as three or five adjoining picture elements. CONSTITUTION:In a table memory 1, deletion possibility of a picture element concerned tracking direction information and tracking additional information are stored with respect to patterns of all adjacent picture elements which are able to appear. An input part 2 inputs figures, drawings, etc., samples them on a square latice, makes them binary and stores them in a picture memory 3. A border line extraction part 4 scans pictures stored in the memory 3 sequentially in an X direction starting from the picture at the upper left end, and when it encounters non-tracked black picture element on a border line, it scans continuously picture elements on the border line. After completion of tracking, the position of a tracking start picture element is registered in a border line information memory 5. A processing part 6 for thinning line converts all border lines to thin lines in accordance with the information of the memory 5. First, it takes a temporary tracking start picture element of a border line from memory 5, and investigates adjoining picture elements of the picture element counterclockwise. For processing the thinning line, only three or five picture elements are referred to by checking a table.

Description

[Detailed Description of the Invention] Industrial Field of Use The present invention is applicable to processing, recognition, understanding, etc. of binary images such as figures and drawings printed on paper or drawn by hand using a computer or the like. The present invention relates to a thinning processing device used as pre-processing. When recognizing and understanding the above-mentioned binary image using an electronic divider, etc., the thickness of the drawn line is often irrelevant, and in order to reduce the amount of information processing performed by the electronic computer, It is common to perform line thinning processing to extract only the skeleton of the drawn line.

Conventional configuration and F of l, 111 points Conventionally, as a thinning method, white pixels on the image (pixel value "
A contour tracing type line thinning method has been proposed that improves processing speed by avoiding references to the ``o'' part as much as possible and thinning the line while tracing the contour line (Japanese Patent Application Laid-Open No. 1983-1989). No. 95188 Nisei Gakkai Image Engineering Research Group Material IE
78-74 IEICE Transactions Dts6-D11'"On the topological properties of sampled binary figures").

Hereinafter, conventional contour tracing type thinning processing will be explained. In contour tracing type thinning processing, a pixel on one contour is always set as a pixel of interest. Here, X in Figure 1. When the pixel of interest is xi (here, iθS1 is an element of the set S) k, it is called the adjacent pixel of Xo.

In addition, S= 11.2, 3, 4, 6, 6, 7.81 and set S1: 11.3, 6.71 set 52-12+
4+6+81.

The pixel on the contour line is the pixel of interest X. Then, X□(1・Sl
), one pixel is a white pixel (pixel value = 0), so in the conventional thinning process of contour tracing, it is difficult to eliminate the possibility of erasing the target pixel, that is, the black pixel (pixel value = 0). 〉
In order to check whether or not the pixel of interest (1) can be changed to a white pixel (pixel value - 0) for thinning, the remaining seven adjacent pixels are referred to. By referring to these seven adjacent pixels, if the pixel of interest can be erased, the pixel value is set to ゲ゛'○°' and it is erased, and if it cannot be erased, it is left. Next, all of the pixels of interest are moved to pixels on the contour line adjacent to the current pixel of interest, and the erasability of the new pixel of interest is checked again. A thinned image is obtained by repeating the above process until there are no pixels on the erasable contour line.

However, the above-described processing has a problem in that seven adjacent pixels must be constantly referred to in order to check the erasability of one pixel of interest, and the processing takes time.

OBJECTS OF THE INVENTION The present invention solves all of the above-mentioned conventional problems, and an object thereof is to provide a line thinning processing device that can perform high-speed line thinning processing.

Composition of the Invention The present invention includes an image storage unit that stores figures inputted by a device such as a scanner or a facsimile, sampled on a square grid, and binarized; and an image storage unit that stores outlines of the figures in the image storage unit. A contour extraction unit that extracts all information, a contour information storage unit that stores information regarding the contour, and a possibility of erasing the pixel of interest for all possible patterns of adjacent pixels adjacent to the pixel of interest that are pixels on the contour. The first information of , the second information of the tracking direction information indicating the direction of the pixel of interest to be examined first, and the addition of tracking which is the information required when investigating the erasability of the pixel of interest in the above method. 3 pixels or 6 pixels of the chip that stores 3 types of information including 3rd information
By referring only to the pixel, generating an address in the table storage section, and referring to the table storage section from the address, the possibility of erasing the pixel of interest is checked, and if it is erasable, the pixel of interest is erased, and if it is not erasable, the pixel of interest is erased. The thinning processing device is equipped with a thinning processing unit that extracts the upper tracking direction information and the tracking additional information from the table storage unit in preparation for checking the erasability of the next pixel of interest. In the thinning processing unit that determines the erasability of a pixel, by minimizing the number of references to adjacent pixels, thinning processing can be performed at high speed.

DESCRIPTION OF THE EMBODIMENT FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention, in which φR1 vs. hard 4 stop, a$'rt 8-6, and five lords.

1 is a table storage unit, which indicates the possibility of erasing the pixel of interest;
Tracking direction information and tracking additional information are prepared for all possible adjacent pixel patterns, that is, 96 types of patterns.

Reference numeral 2 denotes an input unit, into which figures, drawings, etc. printed or handwritten on a two-dimensional plane such as paper are input, sampled on a square grid, and binarized.

Reference numeral 3 denotes an image storage section, which stores figures, drawings, etc. input through the input section 2.

Reference numeral 4 denotes a contour line extraction section, which extracts all contour lines in the image storage section 3.

Reference numeral 6 denotes a contour information storage section, which stores information regarding contours.

6 is a thinning processing unit, which stores information from the contour information storage unit, etc.
And based on the information in the table storage section 1, line thinning processing is performed while tracing the pixels on the contour line in the image storage section 3.

A display section 7 displays the thinned results.

The operation of the thinning processing apparatus of this embodiment configured as described above will be described below.

[Table storage unit 1] The following is a description of the tracking direction without shunting. As shown in Figure 1, the current pixel of interest is X. If there is, the pixel of interest at the secondary time point is any one of the adjacent pixels at the present time. Therefore, the eight tracking directions d shown in FIG. 3 are allowed.

dlE"s Hereinafter, the current pixel will be referred to as 7, starting from the pixel of interest one time before.

As shown in FIG. 4, the table storage unit 1 includes items such as erasability of the pixel of interest, tracking direction information, and additional tracking information.
Addresses are prepared from 0 to 96. From address 0 to address 31, information for d and ESl is stored, and from address 32 to address 96
Information in the case of d fraud S2 is stored in the bank network.

Now, for the following explanation, some notations, the number of connected pixels of interest NC8, and the number of adjacent black pixels SUM will be defined (see FIG. 1).

The binary information of an arbitrary pixel X is expressed as binary (x H).

Therefore, if XI is a black pixel (pixel value>1) bina
ry(x J) = 1 When Xl is a white pixel (pixel value - ○) binary (x, ) = i:).

Still, when binary (x, ) = 1 bi
nary (x, ):=O.

When binary (x) = O, binary (
x, ) = 1.

For an integer J, module 8 f mod 8(
Indicated by j).

Next, the number of connections NCs, which indicates the number of connected components connected to the pixel of interest among the connected components existing within the eight adjacent pixels, is defined by the following equation.

Further, the number of adjacent black pixels SUM (defined by a quintic equation) indicates the number of black pixels within 8 adjacent pixels.

SL1M=Σbinaxy(x,)iθS It is assumed that tracking is performed so that pixels are viewed on the left hand.

Next, a method of storing information in the table storage section 1 will be described. First, regarding the case of dpeSl.

This will be explained using FIG.

If tracking is performed on the contour line so that the black pixels are always viewed on the left, then in the case of dpeSl, blna'' (XmodB (ap-3) = .

It is obvious that "na"V (XmodB (dp-2):0).

0 size, xmode (dp+41 is the pixel of interest from one time point ago, binary'(XmodB(dp+4))
=' and will be processed.

Therefore, the remaining 6 pixels "rr+od8 (dp-1) 'XmodB (d
p ), XmodB (dp+11°XmodB(d
p+2) and xood8(dp+3), the table address is generated.

There are 25 types of patterns for the arrangement of 6-pixel binary information, 1, 1, and (0, 1), and the address A in the table
D is determined by the following formula.

AD-Σ 21+1・blnary(XmodB(dp
+□))=1×3 For each of the 25 types of patterns, the erasability of the pixel of interest, the tracking pixel direction, and additional tracking information are stored in addresses 0 to 31 of the table.

The possibility of erasing the pixel of interest is determined by the number of connected pixels of the pixel of interest) and the number of adjacent pixels SUM. In other words.

When NC3=1 and SLLM,%1, "1" indicating erasability is stored in the erasability section of the pixel of interest at the address in table storage unit 1; otherwise, Stores “0” indicating that erasing is not possible.

In the example of FIG. 7, which is the case of dp-3, the address of the table is AD-Σ 21+1blnaTy(xmod8(3+1
))=30-1 <: i <1:3. Also, since it is NC8-1 and SUM=6, in this case,
In the erasability section at address No. 30 of the table storage unit 1, ``1'' indicating erasability is stored.

Also, in the tracking direction information section, blnary(xrll
. d8(dp,-1))-1, the smallest i (-1<:
i'; 4) Store as ffi tracking direction information 1d. This examines adjacent pixels in order counterclockwise from xmod8(%-11, and the first black pixel xmod8(dp
+i) 1 is ja.

In the example of FIG. 7, since the tracking direction information is 1d-o, '0' is stored in the tracking direction information item at address No. 30 in the table storage unit 1.

Next, additional tracking information will be described. The tracking direction dn from the current pixel of interest to the next pixel of interest is dn=mod8(dp+i d).

In the case of dnESl, the tracking additional information ADV is calculated by the following formula.

ADv-2・blnary(xmod8(dn+1))
+2 ・blnary(xmod8(dn+2)) Also, for dnC82 ADv-20b1nary(xmod8(dn+1))
+320 This ADV is stored in the tracking additional information section.

In the example in Figure 7, since ld=○, dn-3°dnC
Since it is 81, ADV −= 231 binary (x4) +24
- binary (X5): 24 Therefore, °'2 is added to the tracking additional information item at address 3o in table storage unit 1.
4''' is stored. This tracking additional information ADV is used in the thinning processing unit 6 as follows. For example, as shown in FIG. When moved, X9 to counter the erasure possibility of x3
, Xl. It is necessary to generate a table address from 6 pixels of l"11#x41x5 and set it to '1\.

′! 11 13 ・AD=20-binary(x9)+2'-bina
ry(xlo)+2'binary(xll)+23-
binary (x4) + 24・binary (x6
) However, x4 and x6 are at the previous point in time,
``When O was the pixel of interest, it was already referenced and known, and if x3 becomes the pixel of interest at the next time, then
It is also known that x3 must be referenced again to determine its erasability.

Therefore, X4. Additional information AD to track information about X5
In the above formula, if V is registered in the table storage unit 1, in order to ensure the possibility of erasing “o”, if it is pulled out at the same time when referring to the table storage unit 1, x3
The table address calculation when determining the erasability of AD=20-binary(x9)+2'-bina
ry(xlo)+2ζbinary(xll)+AD
V is fine. Thus, using ADV saves processing time for generating addresses.

、Ha・￥Explain. For dpES2, 1, −+ 14・ Also, blnary(xrrlOd8(dp+4)) −
Therefore, the remaining 6 pixels, xmo
d8 (dp-2) evening xmOd8 (dp-1) lxmOd
8(dp)+xmOd8(dp+1)I”mod8 (
dp+2) + xmod8 (dp”3)＼
Generate the address AD of the tape.

In the case of dpES2, the information is stored from address 32 to address 95 in the table, so AD-Σ 2''
+""ar)'(xmod8 (dp+i))+32
.

−2〉i<, 3 26 For each turn of the six-pixel binary information arrangement, set the erasability of the pixel of interest, tracking direction information, and tracking additional information in the same way as in the case of dpGSl, Store at the address.

[Input unit 2] In the input unit 2, figures, drawings, etc. printed or handwritten on paper are input using a device such as a facsimile or scanner, sampled on a square grid, binarized, and stored in the image storage unit 3. Store in.

[Contour extraction unit 4] 15 This will be explained using FIG. 10. In the contour extraction section 4, first, pixel 1 at the upper left corner of the image stored in the image storage section 3 is extracted.
It scans sequentially in the X direction starting from 1, and when it hits the right end, it shifts one line in the Y direction, and repeats the rask scan in which it scans in the X direction from the left end in the same way. During the rask scan, when a black pixel (12 in FIG. 10) on the untracked contour is encountered, the rask scan is temporarily interrupted and the contour is traced. Pixel 12 is called a temporary tracking start pixel. Among the pixels adjacent to pixel 12, the pixels adjacent to pixel 12 are examined counterclockwise from pixel 13, which is a white pixel, and black pixel 1 is
If pixel 4 is found, pixel 14 is set as the tracking start pixel, and its position (X coordinate, Y coordinate) and direction 15 from pixel 12 to pixel 14 are set as the tracking start direction.

Next, with pixel 14 as the pixel of interest, pixels adjacent to pixel 14 are examined counterclockwise in the same manner as above, and black pixel 16 is found.
This is set as the next pixel of interest. At this time, the direction from pixel 14 to pixel 16 is called a tracking direction. By repeating this process, pixels on the contour are tracked one after another. In addition,
Label the tracked pixels to indicate that they have been tracked (change the pixel value from "1" to °'2").
).

Tracking ends when the position of the pixel of interest matches the position of the tracking start pixel and the tracking direction matches the tracking start direction. When the tracking is completed, the position of the tracking start pixel is registered in the section of the temporary tracking start pixel position in the contour information storage unit 5 having the configuration shown in FIG. Note that the term "thinning end flag" is set to "o" at this point.

When the above processing is completed, the temporarily interrupted rask scan is resumed from the place where it was interrupted. The rask scan is performed until it hits the lower right corner of the image.

Note that if all pixels adjacent to a black pixel detected by rask scanning are white pixels, that black pixel is an isolated point and is not registered in the contour information storage unit 5.

[Thinning Processing Unit 6] The line thinning processing unit 6 sequentially thins all contour lines based on the information in the contour information storage unit 6. First, from the contour information storage unit 5, the thinning end flag page is “o”.
” Extracts the tentative tracking start pixel 17- of the contour line.Similar to the contour extraction section, check the neighboring pixels of the tentative tracking start pixel counterclockwise to find the tracking start pixel and the tracking start direction. .At this time, at the same time, the tracking start direction is set to dn.
Then, the additional tracking information ADV is calculated using the formula explained in the table storage section.

Next, the tracking start pixel is set as the pixel of interest, and the tracking start direction is set as d.
Set p and enter the address AD of the table.

When dpGSl -4-ADV When dpC82 +ADV The table storage unit 1 is referred to from the address AD of the table determined above. The next pixel position of interest is determined from the tracking direction information section of the address, the tracking 8 direction dpk is updated, and the ADV is updated from the tracking additional information section.

By repeating the above process, pixels on the contour are tracked.

During tracking, refer to the erasability section of the pixel of interest in the table, and if it is 1°, erase the pixel of interest.Thinning is thereby performed.

As mentioned above, the thinning process refers to all 3 adjacent pixels in the case of d, FSl, and all 6 adjacent pixels in the case of dpES2,
This is done by examining a table.

The end of tracking is the same as in the contour extraction section 4.

The possibility of erasing the tracking start pixel is not checked at the start of tracking, but at the end of tracking. Also, at the end of tracking,
The pixel of interest next to the tracking start pixel is circled, and this pixel position is stored in the provisional tracking start pixel position section of the contour information storage section 5. Note that if none of the points of interest can be erased during contour-circumference tracing, it is assumed that the thinning of that contour line has been completed, and the item of the thinning end flag in the contour information storage unit 6 is set to 1.
Set it to 111+.

19. When the tracing of all the contours registered in the contour information storage unit 5 has been completed, the contour line whose thinning end flag item in the contour information storage unit 5 is “'0” is If the contour line exists, the thinning process is performed on the contour line again. When the term of the thinning end flag of all contour lines becomes "1", the MB line processing section is terminated.

[Display Unit 7] The display unit 7 displays the thin line image in the image storage unit 3.

Note that the thinning processing device of the embodiment can obtain a thinning image having 8 connectivity, but by simply replacing the number of connections of the pixel of interest NC8 with NC4 shown in the following equation, it is possible to obtain a thinned image without any other changes. , a thinned image with 4-connectivity is obtained.

°blnary(xmod8(□+1))・binar
y(Km□dg(i+21)) Effects of the Invention The thinning processing device of the present invention can check the erasability of a pixel of interest by simply referring to 3 adjacent pixels or 6 adjacent pixels, which increases processing speed. Since the retrace can be reduced to about % of the conventional value, its practical effect is great.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the relationship between a pixel of interest and adjacent pixels. FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention;
4 is a diagram showing the configuration of the table storage unit, FIG. 6 is a diagram showing the tracking direction in contour tracing,
Figure 6 is a diagram showing adjacent pixels in the case of dpesl;
FIG. 8 is an explanatory diagram of the table storage section, FIG. 8 is an explanatory diagram of additional tracking information, FIG. 9 is a diagram showing adjacent pixels in the case of dp/S2, FIG. 10 is an explanatory diagram of the operation of the contour extraction section, and FIG. FIG. 11 is a diagram showing the configuration of the contour information storage section. -- 7. ゛゛/shikijido, 3., b waveta Jhiko 2.
1 tablet p3 Rii Ukaka 1≧、S・Juri man 1Vpsy
liノβ Yuiju-φノ)B)、Otsu、...Door tact j
Tahiri Ep. Name of agent: Patent attorney Toshio Nakao (1 person) Figure i Figure 2 Figure 3 Figure 5 Figure 6 Figure 7 Figure 87) Iil Figure 0 >-Kai C

Claims (1)

[Scope of Claim] An image storage unit that stores binarized graphic information. a contour extraction section that extracts all the contour lines of the figure in the image storage section; a contour information storage section that stores information about the contour; and an adjacent pixel adjacent to the pixel of interest that is a pixel on the contour line that can appear. For all patterns, first information indicating the erasability of the pixel of interest, second information of tracking direction information indicating the direction of the pixel of interest to be examined next, and erasability of the next pixel of interest. a table storage unit that stores three types of information, including third information of additional tracking information, which is information required when investigating Based on this, an address in the table storage unit is generated by referring to only 3 or 6 pixels depending on the tracking direction among the adjacent pixels adjacent to the pixel of interest. By referring to the table storage unit from the address, the erasability of the pixel of interest is checked, and if it is erasable, the pixel of interest is erased, and if it is not erasable, it is left as is, and as a preparation for checking the erasability of the next pixel of interest. , a line thinning processing unit comprising: a line thinning processing unit that extracts the tracking direction information and the tracking additional information from the table storage unit.