JPS60155256U - Hold monitor sound listening circuit - Google Patents
Hold monitor sound listening circuitInfo
- Publication number
- JPS60155256U JPS60155256U JP4177184U JP4177184U JPS60155256U JP S60155256 U JPS60155256 U JP S60155256U JP 4177184 U JP4177184 U JP 4177184U JP 4177184 U JP4177184 U JP 4177184U JP S60155256 U JPS60155256 U JP S60155256U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- resistor
- switch
- terminal
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Devices For Supply Of Signal Current (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図、第２図は電子化電話機基本回路のブロック構成
図、第３図は保留音送出回路を付加する場合のブロック
構成図、第４図は同じくその保留時におけるスピーカプ
リアンプ系の交流等価回路、第５図は本考案の原理を説
明する保留時におけるスピーカアンプ系の交流等価回路
、第６図は 、本考案保留モニタ音受聴回路−実施例を
示す回路図、第７図は同じくその交流等価回路、第８図
は本考案の他の実施例を示す回路図である。 、ｌ
ａ、ｌｂ・・・高電流供給端子、２・・・スピーカアン
プ、２ａ・・・スピーカアンプ入力端子、３・・・スピ
゛−カ、４・・・ダイヤル信号発生回路、４ａ・・・
ダイヤル信号発生回路の電源子端子、５・・・スイッチ
手段、５ａ・・・スイッチ手段５の制御入力端子、６・
・・送話器、７・・・送話プリアンプ、８・・・送話メ
インアーンプ、９・・・スイッチ手段、１０・・・抵抗
ハイブリツド回路、１１・・・平衡回路網、１２・・・
受話プリアンプ、１３・・・受話メインアンプ、１・４
・・・受話器、１５・・・通話回路用電源回路、１５ａ
・・・定電流回路、１５ｂ・−・定電圧回路、１５ｃ・
・・出力端子、１６・・・スピーカプリアンプ、ｊ７，
１８，１９・・・定電流回路、２０・・・トランス、２
１・・・スイッチ、２２・・・堡留音発生回路、２３．
２５・・・バッファ回路、２４．２６，２７・・・スイ
ッチ。
゛ 第４図
第５図 −１−Figures 1 and 2 are block configuration diagrams of the basic circuit of an electronic telephone, Figure 3 is a block configuration diagram when a hold tone sending circuit is added, and Figure 4 is the AC equivalent of the speaker preamplifier system when on hold. circuit, Fig. 5 is an AC equivalent circuit of a speaker amplifier system during hold to explain the principle of the present invention, Fig. 6 is a circuit diagram showing an embodiment of the hold monitor sound listening circuit of the present invention, and Fig. 7 is the same. AC equivalent circuit FIG. 8 is a circuit diagram showing another embodiment of the present invention. ,l
a, lb...High current supply terminal, 2...Speaker amplifier, 2a...Speaker amplifier input terminal, 3...Speaker, 4...Dial signal generation circuit, 4a...
Power supply terminal of dial signal generation circuit, 5... switch means, 5a... control input terminal of switch means 5, 6.
... Transmitter, 7... Sending preamplifier, 8... Sending main amplifier, 9... Switching means, 10... Resistance hybrid circuit, 11... Balanced circuit network, 12...
Receiving preamplifier, 13... Receiving main amplifier, 1.4
...Handset, 15...Power supply circuit for telephone circuit, 15a
...constant current circuit, 15b--constant voltage circuit, 15c-
...Output terminal, 16...Speaker preamplifier, j7,
18, 19...constant current circuit, 20...transformer, 2
1... Switch, 22... Block sound generation circuit, 23.
25...Buffer circuit, 24.26, 27...Switch.゛ Figure 4 Figure 5 -1-
Claims (2)
回路の２つの高電流供給端子からみて直列に接続され、
通話時には該ダイヤル信号発生回路の両端を電子スイッ
チで短絡し、ダイヤル時には該電子スイッチを開放する
よう構成された□ 電話機基本回路に保留時に送出する
保留音のモニタ回路を付加した保留モニタ音受聴回路に
おいて、保留音発生回路の出力端子に第１の抵抗と第１
のコンデンサを介してＰＮＰトランジスタのベースに接
続し、該ＰＮＰトランジスタのエミッタを第２の抵抗を
介して前記保留音発生回路の電源の子端子に接続し、該
ＰＮＰ ）ランジスタのコレクタを第３の抵抗を介して
前記ダイヤル信号発生回路の電源の子端子に接続し、該
ＰＮＰトランジスタのベースを第４の抵抗を介して前記
ダイヤル信号発生回路の電源の子端子に接続するととも
に、該ＰＮＰ トランジスタのコレクタを第５の抵抗又
は第５の抵抗と第２のコンデンサを介してスイッチの第
１の接点に接続し、該スイッチの第２の接点を前記スピ
ーカアンプに受話信号を入力するための前段回路の出力
端子に接続し、該スイッチの共通接点端子を前記スピー
カアンプの入力端子に接続したことを特徴とする保留モ
ニタ音受聴回路。(1) The speaker amplifier and the dial signal generation circuit are connected in series when viewed from the two high current supply terminals of the telephone circuit,
When making a call, both ends of the dial signal generation circuit are short-circuited by an electronic switch, and when dialing, the electronic switch is opened. □ A hold monitor sound listening circuit that is added to the basic telephone circuit with a monitor circuit for the hold sound that is sent out when on hold. , a first resistor and a first resistor are connected to the output terminal of the held music generation circuit.
The emitter of the PNP transistor is connected to the child terminal of the power supply of the held music generation circuit through a second resistor, and the collector of the PNP transistor is connected to the base of the PNP transistor through a third resistor. The base of the PNP transistor is connected to the power supply terminal of the dial signal generation circuit through a resistor, and the base of the PNP transistor is connected to the power supply terminal of the dial signal generation circuit through a fourth resistor. A pre-stage circuit that connects the collector to the first contact of the switch via a fifth resistor or a fifth resistor and a second capacitor, and inputs the second contact of the switch to the receiver signal to the speaker amplifier. A hold monitor sound listening circuit characterized in that a common contact terminal of the switch is connected to an output terminal of the switch, and a common contact terminal of the switch is connected to an input terminal of the speaker amplifier.
プの利得調節を行う可変抵抗器の第１の端二譬；−＝：
吊悶１＝１ する実用新案登録請求の範囲第１項記載の保留モニタ音
受聴回路。 、−一(2) The common contact terminal of the switch is connected to the first end of the variable resistor that adjusts the gain of the speaker amplifier; -=:
A holding monitor sound receiving circuit according to claim 1 of the utility model registration claim, in which agonizing 1=1. , -1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4177184U JPS60155256U (en) | 1984-03-26 | 1984-03-26 | Hold monitor sound listening circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4177184U JPS60155256U (en) | 1984-03-26 | 1984-03-26 | Hold monitor sound listening circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60155256U true JPS60155256U (en) | 1985-10-16 |
| JPH0346607Y2 JPH0346607Y2 (en) | 1991-10-02 |
Family
ID=30551907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4177184U Granted JPS60155256U (en) | 1984-03-26 | 1984-03-26 | Hold monitor sound listening circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60155256U (en) |
-
1984
- 1984-03-26 JP JP4177184U patent/JPS60155256U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0346607Y2 (en) | 1991-10-02 |
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