JPS6015048B2 - Camera with release device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a camera equipped with a release device that controls the release operation of the camera using, for example, an electromagnetic magnet. This is about a camera that has been used.

Modern cameras equipped with exposure condition determining devices using electrical control systems require a mechanism to close the side light switch to supply power to measurement circuits, arithmetic circuits, etc. prior to camera start-up operation. , Various methods are used for this purpose.

In other words, (11) A method of opening and closing the side light switch by manually operating a switch operating member installed at the appropriate location on the camera exterior. ■ Turn on the side light switch by pulling out the winding lever to the preliminary angle position, and then press the lever. How to turn this off by returning it to the storage position.

'3} A method of turning on the Kagamiyama Hikari switch with the first step of pressing down on the release button, and then turning on the release switch with the second step of pressing down on the release button.

Among the above, with a camera using method 1, if you forget to operate the light switch during shooting, the camera will not take a picture and you may miss a photo opportunity, and if you forget to turn off the footlight switch after shooting, the camera will be inconvenient. It has the disadvantage that the power battery is consumed during use, shortening its lifespan.Therefore, cameras using method 1) have the disadvantage that the switch has to be opened and closed every time a photo is taken, making the operation complicated. It is.

On the other hand, using method 2, the camera's winding bar and the opening/closing of the side light switch are linked, so if you forget to open/close the side light switch when taking a picture and this causes an inconvenience, Although it is rare, there are times when you accidentally return the winding lever to the stowed position while shooting, making the release impossible and missing a photo opportunity.Also, when the camera is inconvenient, you may not realize that the lever is in the reserve position. It is also possible that the battery will become exhausted.

In addition, when attaching an electric drive device to a camera using method (■), since the hoisting bar cannot be operated, it is necessary to provide a mechanism to switch the circuit so that it is activated by a separately installed footlight switch. However, it also has the disadvantage that the camera mechanism and circuitry are complicated. [Cameras using method 3' use a side light switch that is linked to the release button, so the switch is opened and closed by the release operation, which is always operated when shooting. There is no needless power consumption that tends to occur, and since the side light switch is closed for a short time when photographing is needed, the consumption of the power supply battery can be extremely reduced. Cameras employing an electromagnetic release device using the method {3} and configured to sequentially supply power to various circuits of the camera have already been put into practical use.
Start the electromagnetic Leeds device using the method described in {3' above,
In a camera that uses an exposure condition determining device to obtain proper exposure, the first step of pressing down on the shutter button is used.

Turn on the light switch and start supplying power to the spotlight circuit, arithmetic circuit, etc., then turn on the shutter release switch in the second step by pressing down on the shutter release button, and start the electromagnetic release that performs shooting operations such as shutter operation. In the camera,
As mentioned above, there is a time difference between the time when the side light switch is turned on by pressing the release button and the time when the release switch is turned on, so this time difference causes the electromagnetic release device to operate sequentially and to perform normal shooting operations. However, if you perform an operation such as pressing down the release button suddenly, the IJ
In some cases, the camera lens switch is turned on and the photographing operation is started. When such a release button is operated, there is a problem in that the exposure control operation is not performed properly, resulting in improper exposure. In other words, by using a silicon photocell with fast photoresponse characteristics as a light receiving element, it is possible to create a search light circuit that can sufficiently respond to sudden changes in the amount of incident light. It takes some time for the output of the optical circuit to stabilize due to stray capacitance in elements, amplifiers, logarithmic compression elements, etc. Also, since a light-receiving element with fast light response characteristics is used, it is difficult to illuminate the subject. A low-pass filter installed to eliminate fluctuations in side light power when the light source contains flicker.
Due to the delay time in , the output of the side optical circuit reaches a stable state after a certain period of time from when the power is turned on.

Furthermore, the delay due to the stray capacitance mentioned above is determined by the time it takes for the charges charged in the stray capacitance to be discharged by the photocurrent of the photodetector. Therefore, when the amount of light received is small, the generated photocurrent is also small and a stable state is reached. It takes a long time to achieve this, and if the amount of light received is large, a stable state will be reached after a short period of time. The time delay required for the leakage light output to stabilize as described above can be avoided by operating the release button at normal speed, but it can cause malfunctions if the button is pressed down suddenly. be. The object of the present invention is to solve the above-mentioned problem in a camera in which the shutter release switch is turned on by pressing the release button as described above, and the operation of the electromagnetic release is started when the release switch is turned on. That is.

The configuration of the present invention to solve the above problem is as follows: "The first operation of the shutter release operation unit supplies power to the optical circuit, and the second operation is formed by the subsequent second operation of the release operation unit. In a camera that activates an electromagnetic release member in response to a signal and starts a photographing operation, a first timing signal is formed that starts a timing operation with a first operation of the release operation section and generates an output after a predetermined timing period. means, a second time signal forming means for generating an output after time measurement longer than the time measured by the first time signal forming means; At the time of brightness, the first
a selection circuit that selects the second timing signal forming means when the luminance level is lower than the luminance level; and a selection circuit that selects the second timing signal forming means when the luminance is lower than the luminance level; The present invention is characterized by the provision of a prohibition circuit that detects the second operation signal and prohibits activation of the electromagnetic release member when the second operation signal is generated before the output from the time measurement signal forming means.

The present invention will be explained in detail below with reference to the drawings.

The figure is a circuit diagram showing an embodiment of a camera equipped with an electromagnetic release device according to the present invention. In the figure, P is a pulse signal generating circuit which shortens its output when the side optical switch Sw is turned on and generates a negative pulse. That is, when the power supply control transistor Tr becomes conductive and the voltage charged in the capacitor C exceeds a certain value, the transistor Tr2 of the circuit P becomes conductive.
is turned on and Tr3 is turned off. This allows the side light switch S
After w, is turned on, a negative pulse is generated at the output of the circuit P for a short time while Tr3 is turned on. A is a circuit for switching the delay time required for stabilization of the optical circuit into two stages, long and short, depending on the amount of light incident on the light receiving element, and the input terminal receives a sampling light output from a measurement circuit (not shown) according to the brightness of the subject. VBv.
is input and compared with the reference value by the comparator CPI. ○6, G7 and 08 are NAND gates, 1, is an inverter, and the output of the comparator CPI is logic "0" at low illumination and logic "1" at high illuminance, and the sequence counter described later is reset. A positive pulse (“1”) is applied to the output of circuit A after delaying the time until Q outputs at low illuminance and the time until Q4 outputs at high illuminance.
occurs.

D is a circuit that generates an output "1" after the winding completion signal is input when the winding completion switch Sw5 is turned on and the fed film becomes stable. It is composed of controller CP2. The power supply voltage check circuit compares the power supply voltage with a comparator CP3, and outputs "1" if it is above the standard value, and outputs "0" if it is below the standard value. J is a constant current circuit which inputs a set signal for a flip-flop FFI, which will be described later, and supplies a constant current to the base circuit of the power supply control transistor Tr. K is a sequence control counter that counts pulses from the clock pulse generator OSC. Note that R is a reset terminal, and Q, to Q, and 3 are output signals of each counter stage. L and L are pulse forming circuits consisting of three inverters and a NAND gate connected in series, and generate a pulse signal determined by the delay time of the inverters. S is a self-timer circuit that performs a delay operation using the Q,3 output from the sequence counter K when the switch Sw3 is turned on, and starts a release operation when the output is "1". FF1, FF2, and FF3 are flip-flop circuits each consisting of a set of NAND gates, G, 9.
is a NOR gate, and its output controls the transistor Tr7, and a light emitting diode LED as a warning means emits light to display a warning that the release operation is locked due to an abnormal release operation. BAT is the power battery, Sw4 is the power switch, Sw,
is the measurement switch as the first switch, SW2 is the release switch as the second switch, and Sw and S
w2 is the first and second stage by pressing the release button.
At this stage, the first state (off) transitions to the second state (on). In addition, G, ~G5 and ○ are NAND gates, Mg
is an electromagnetic release magnet, and R, 2, and C3 are a resistor and a capacitor for passing current in a pulsed manner to the magnet Mg. Next, the operation of the circuit shown in the figure having the above configuration will be explained.

First, the power switch Sw4 is turned on to supply power to the circuit from the battery BAT. Next, when the release button (not shown) is pressed down, the side light switch Sw is turned on with its first stroke. As a result, R, -D, -Sw. Current flows through the circuit of resistance R. With a voltage drop of , the power supply control transistor T
r, turns on. The capacitor C is charged by the output current of the Tr, and a voltage is applied to the circuit P at its terminal voltage. As a result, the transistor Tr3 of the circuit P turns on momentarily and outputs the logic "0" as the aforementioned negative pulse. This output ``0'' pulse causes the NAND gate G to temporarily generate an output ``1'', and the reset terminal R of the sequence counter K becomes ``1'', resetting the counter. ``0'' inputs "0" to one of the inputs of the NAND gate G,2 of the flip-flop FFI.
I is reset. Next, the output "1" of the NAND gate G,2 inputs "0" to the flip-flop G,5 of the flip-flop FF2 through the inverter 19, and FF2 is reset. FF
3 is also reset. Furthermore, after the counter K is reset as described above, the transistor Tr3 of the circuit P is turned off, so the gate G outputs "0", so the reset is released and the counting of pulses from the clock oscillator OSC starts. do. At this time, if the amount of light incident on the light-receiving element is large, that is, when a bright subject is illuminated, the input brightness VBvo to circuit A will be a high value, and the output of the comparator-CPI will be ``1''.This signal is NAND gate G7
"1" is directly input to the NAND gate G8, but "0" is input to the NAND gate G8 via the inverter-1.
Therefore, NAND gate G7 outputs "0" when Q4 output "1" comes from the counter, thereby
The output of D gate G6, that is, the output of circuit A is counter K.
11 after the time from the start of counting until Q4 is output.
In addition, in the case of a dark subject, the CPI output will be "0", so when the counter outputs Q6 output "1", the output of circuit A will be "1" due to the signal from NAND gate G8. The output "1" whose delay time has been switched depending on the amount of light received from circuit A is input to one side of NAND gate ○2.As a result of the above, when the brightness is higher than a predetermined brightness, the output "1" is used as a selection circuit. Due to the output of the comparator CPI, after a relatively short period of time after the first stroke of the release, "
0” is output, thereby forming the NAN inhibit circuit.
"1" is applied to one input of the D gate G2, and "1" is applied to one input of the D gate G2, and "1" is applied from the gate ○8 constituting the second time measurement signal forming means after a relatively long time from the first stroke of the shutter when the brightness is low.
0” is output, which causes “1” to be sent to one input of ○2.
is applied. Following the turning on of the Namie light switch Sw, the release switch Sw2 is turned on by the second stroke of pressing down the release button.

At this time, if the camera is in the state where the winding is completed and the time from the time when the winding is completed to when the film stabilizes is set, circuit D is activated.
``1'' is output to the output of comparator CP2. Also, if the power supply voltage is above the specified value, the output from the circuit is also ``1''. In this state, the output of NAND gate G5 is Since “1” is input to all inputs, G5
“0” is output from. "0" from this NAND gate ○5 is inputted as "1" to the pulse generation circuit L2 via inverters 1 and 5. As a result, a negative pulse signal is generated at the output of L2, which is converted into a positive pulse by the inverters 1 and 4 and input to the NAND gate G2. That is, when "0" is output from the NAND gate G5, the pulse generating circuit L2 temporarily outputs "0" as a negative pulse.
", so the output of the inverter 114 temporarily becomes "1" as a positive pulse and is input to gate ○2. One input of NAND gate G2 is supplied with " from circuit A with a delay time according to the subject brightness. 1" is input, and when the positive pulse from this L output is input to NAND gate G2, "0" will be output from G2. In other words, since the side optical switch Sw is on, There is enough time for IJ switch Sw2 to turn on, and during this time the NAND
If a signal from circuit A is input to one side of gate G2, "0" is output from NAND gate 2, which is input to flip-flop FFI 2 and 3 to set flip-flop FFI.

However, in the case of sudden pressing of the Lease button, the time from turning on the side light switch SW to turning on the Lease switch Sw2 is short, and as a result, a positive pulse from L arrives at the NAND gate G2. When this happens, the signal from circuit A will not be "1" again. In this state, since "0" is not output from NAND gate ○2, flip-flop FFI is not set. That is, by setting the FFI, the release operation that is started in the subsequent circuit operation is not performed, and the shutter is in a release lock state.
Also, at this time, "0" is output from NAND gate ○5, and the output of flip-flop FFI is also "0", so both the two inputs of NOR gates ○ and 9 become "0".
The transistor Tr7 is turned on by the output "1" from G, 9, and the light emitting diode LED is turned on to display a warning that the release is locked. When the release button is pressed at the normal speed, the flip-flop FFI is set by the output from the N-mount ND gate G2, and the FFI outputs “
1'' is applied to the constant current circuit J, which supplies a constant current to the base circuit of the power supply control transistor Tr.

As a result, the conductive state of the transistor Tr is maintained, so that even if the storage optical switch Sw is turned off thereafter, power supply to the circuit is continued. flip flop FF
The output “1” due to the setting of I is simultaneously output from the pulse forming circuit L.
and generates a negative pulse at its output. This is N
The signal is input to the counter K via the AND gate G, and the counter is reset again. In addition, the output "0" from inverters 1 and 2 of pulse forming circuit L is output to inverter 18.
"1" is input to one input of the NAND gate G3 via the NAND gate G3. At this time, if self-timer photography is not performed and timer switch SW2 is off, the NAND of circuit S
Gate ○． The output from o is "1", both inputs of NAND gate G3 become "1", and "0" is output from G3. are set. Also, if the timer switch S3 is on when using a self-timer, the output of the circuit S will be output after the delay time from when the counter is reset and starts counting the clock until the output of Q,3 becomes "1". but"
This causes the output of the NAND gate G3 to become "0".

Therefore, at this point, the counter is reset and the flip-flop FF2 is set. When flip-flop FF2 is set, NAND gate G2
"1" is input to one input of the signal "1", and this signal "1" is transmitted to a side light section (not shown) through a terminal M, and the side light value is stored.

Also, the set signal “1” of flip-flop FF2 is NAN
Input to D gate G2o. Furthermore, flip-flop FF3
is NAND through inverters 1 and 3 in the reset state.
Since "1" is input to the gate ○, the two inputs of the NAND gate G2o become "1" together with the set output "1" of the FF2, and the output of G2o becomes "0". As a result, the capacitor C that was being charged through the resistor R,2
3 is discharged in a pulsed manner through the magnet Mg, and the magnet Mg is activated.

As a result, an electromagnetic release operation is performed by the operation of the electromagnetic magnet, and subsequent photographing operations are performed. When the internal mechanism of the camera (not shown) completes the photographing operation due to the operation of the electromagnetic release, and the next winding is completed, the winding completion switch Sw5 is turned on, and the output of circuit D becomes "0". flip-flop FFI is reset, and this output resets flip-flop FF2 and FF
3 is also reset and restored to the state before the release button was pressed. In the above embodiment, a camera equipped with an electromagnetic release device using an electromagnetic magnet was described.
The present invention is not limited to the above-mentioned cameras;
Needless to say, the present invention can also be applied to cameras equipped with a general release device. As described above, in a camera equipped with a release device according to the present invention, instability caused by sudden depression of the release button, which tends to occur with systems using a side light switch and a release switch linked to the press of the release button, can be avoided. Neck.

It is possible to prevent inappropriate exposure control due to memorization of light values, and since the release operation of the release device is locked and a warning is displayed due to an abnormal release operation as described above, it is possible to prevent failures due to malfunctions during shooting. It is something that can be eliminated. In addition, the time it takes for the footlight circuit to stabilize is different depending on whether the subject has low brightness or high brightness, but even in these cases the delay time is automatically switched. This method does not cause any unnecessary time delay, and has many effects such as the ability to increase the number of frames per second during continuous shooting using a motor drive device.

[Brief explanation of the drawing]

The figure is a circuit configuration diagram showing an embodiment of a camera equipped with a leakage device according to the present invention. P...Pulse signal generation circuit, A...Circuit for switching delay time according to side light output, Day...
・Power supply voltage check circuit, J... Constant current circuit,
K...Sequence control counter, L,,Z
...Pulse forming circuit, S...Self-timer circuit, FF
1, FF2, FF3...Flip-flop circuit, GM...
... NOR gate of the warning display circuit, LED ... Light emitting diode for warning display, Sw. ...Side light switch, Sw2...,. ．． Shirieswitch, Sw3・
...Self-timer switch, Sw4...
・Power switch, Sw5... Winding completion switch, Mg... Magnet for electromagnetic release, BA
T...Power battery.

Claims (1)

[Claims] 1. In a camera that supplies power to a photometric circuit with a first operation of a release operation member and activates an electromagnetic release member to start a photographing operation by a second operation signal generated by a subsequent second operation of the release operation member, a first time signal forming means that starts a time measurement operation upon a first operation of the release operating member and generates an output after a predetermined time period; a second clock signal forming means that generates a timed output; and a second clock signal forming means that detects the output of the photometric circuit and selects the first clock signal forming means when the brightness is higher than a predetermined brightness level; A selection circuit that selects the second timing signal forming means during low brightness, and detects the output from the timing signal forming means selected by the selection circuit and the second operation signal, and detects the second operation signal when the second operation signal is a timing signal. A camera characterized in that a prohibition circuit is provided to prohibit activation of the electromagnetic release member when the signal is generated before the output from the signal formation means.