JPS60150341A - Fault recognition circuit - Google Patents

Fault recognition circuit

Info

Publication number
JPS60150341A
JPS60150341A JP59007541A JP754184A JPS60150341A JP S60150341 A JPS60150341 A JP S60150341A JP 59007541 A JP59007541 A JP 59007541A JP 754184 A JP754184 A JP 754184A JP S60150341 A JPS60150341 A JP S60150341A
Authority
JP
Japan
Prior art keywords
circuit
output
signal
pulse waveform
waveform shaping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59007541A
Other languages
Japanese (ja)
Inventor
Osamu Yamanaka
治 山中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59007541A priority Critical patent/JPS60150341A/en
Priority to US06/687,761 priority patent/US4658206A/en
Priority to DE19853500896 priority patent/DE3500896A1/en
Publication of JPS60150341A publication Critical patent/JPS60150341A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/14Monitoring arrangements

Abstract

PURPOSE:To detect easily a fault of a circuit from which a burst form signal is transmitted with simple circuit constitution as well by detecting the fault with an exclusive OR between an input signal and an output signal of a transmission circuit. CONSTITUTION:An intermediate frequency band directional coupler 10, a diode detector 11 and a DC amplifier 12 are fitted to an output section (or an input section of a transmission frequency converter) and a comparator 13 is connected to them so as to obtain a rectangular wave in response to an input burst signal, and a similar comparator 17 is fitted to a signal detection circuit at the output side of a transmitter, both the rectangular wave signals are ORed exclusively by an exclusive OR circuit 5 so as to detect a fault of a device (in this case, a transmission frequency converter 2 and a power amplifier 2) independently of the presence of a signal.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明け TDMA (Time Division 
Multiple Acceee)用送旧慨等のバース
ト状のは号を伝送する送は装置(送培周波数変換器、゛
市力増@器昇)の正常。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to TDMA (Time Division)
The transmission device (transmission frequency converter, ``city power increase @ equipment increase'') that transmits burst-like signals such as transmission for multiple acceee is normal.

異猟のll1Iノ作を検出する為の回路に関するもσ)
である。
Regarding the circuit for detecting illegal hunting ll1I production (σ)
It is.

〔従来技術〕[Prior art]

近年、衛星通1言等の分子fVcおいては、時分割多元
接続方式(TDMA方式)等の採用により、送は周波数
変換fj’fr H電力増幅器等の信号伝送装置におい
ては自装置の障害等の検出においても新たな技術が要求
享ハる工うになってさている。第11%に従来のFDM
 FM方式における障害検出回路の一例を示す。図中の
変調器(1)よりの信号は退店周波数変換器(2)K入
力され、周波数変換さtまた後、゛電力増幅器(3)を
経て、アンテナ装置(41工り送@ζねろうこの工つな
装置VCおいて、信J8)が正しく送1言さねているか
どうか全検出する方法として同図に示す工つに、送1g
機出力に方向性結合器(5)全用い、送1吉出力の一部
全恢?皮器−6)あるいは屯カセンサー等全1月いて検
出し、直流増幅器(7)ケ通しt後、ウィンドコンパレ
ータ’81’Gk用いてその出力レベルが許容1111
>囲(−,どレベル以ヒで一′fレベル以下)にある刀
・どうかK J−って、装置aの異常全検出する方法が
ある。こハ汀、従来のFDM−FM方式においてにr出
力の゛出力が常]1存は−゛ボレベルある為にこの工う
な方法にJ、る仔!出デバ可能であつ之ことV(Lる。
In recent years, with the adoption of time division multiple access (TDMA), etc., in molecular fVc such as satellite communication, transmission is frequency converted fj'fr. New technologies are also required for detection. Conventional FDM in 11%
An example of a failure detection circuit in the FM system is shown. The signal from the modulator (1) in the figure is input to the frequency converter (2), and after frequency conversion, it passes through the power amplifier (3) and is then sent to the antenna device (41). As a method for completely detecting whether or not the transmitter J8) is correctly transmitting one word in the VC device, the transmitter 1g is shown in the same figure.
Is all directional coupler (5) used for the machine output, and some of the output is used? The output level is 1111 permissible using the window comparator '81'Gk after the DC amplifier (7) is connected.
There is a method to detect all abnormalities in device a. Now, in the conventional FDM-FM system, the r output is always at the -1 level, so I don't want to use this method! It's possible to get out of there.V(L).

同(イの回路を送fg ”8波数変侯器(2)の出力部
l/c収付けねは送[言固彼数変控器」2の異常′fe
−検出することができる。
Send the same circuit (a)fg If the output part l/c of the 8-wave number converter (2) is not corrected, send the abnormality of the ``8-wave number converter (2)''2'fe
-Can be detected.

し力)しながら、このような方法では送信出力音fこえ
ず0N10FT1″するような、いわゆる/く一ストモ
ードの送11η云送においては、出力のほり)レベルが
一定と斤ら々いA K障害検出同県として17f機能し
riJない。しかも、TT)MAのよりな:++’l 
le方式においては送I菩バースト長2間隔・争も必す
しも一定せず、何種類ものパースh 1M号が送1gき
れる故、上ie開回路時定敏全大さく収って平均出力市
力紮検出するようにしても十分機能し得ない。
However, in such a method, when the transmission output sound is 0N10FT1'' in the so-called /first mode, the output level is constant and the level is approximately A. 17f does not function as K failure detection same prefecture.Moreover, TT) MA's: ++'l
In the LE system, the transmission I burst length 2 interval and contention are not necessarily constant, and many types of parse h 1M can be transmitted 1g, so the average output is within the same range when the upper ie open circuit is used. Even if it were to be detected by force, it would not function satisfactorily.

〔発明の概費〕[Outline of invention cost]

不発明灯このようにバースト状の1g号伝送における機
器の障害検出ケ排他的論理和ケとることに工り得易にか
つ汀里な回路にて実現しようとするものである。
The purpose of this invention is to realize failure detection of equipment in burst type 1G transmission using an exclusive OR operation using a simple and simple circuit.

原理242図で説明する。云送同・俗の蒔廷(面間がな
いものと仮定すると、人力は号Aと出力は号Bの存在す
る時間は、(イ)に示す工うVζ一致する。
The principle will be explained using 242 diagrams. Assuming that there is no difference between men and women, the time when the human power is A and the output B is the same as Vζ shown in (a).

ところ−h(、いすハかの旧号の一部/バ失落すると、
(ロ)VC示すようにtlからt2の闇に排他的論理和
が成立する。従って、排他的倫理40が成立すねは、伝
送回1俗に異常が生じたと判断できる。
Tokoro-h(, When part of the old name of Isuha/Ba disappears,
(b) As shown in VC, an exclusive OR is established from tl to t2. Therefore, if exclusive ethics 40 is established, it can be determined that an abnormality has occurred in the first transmission.

第2図(イ)K不す人力IH号A々出力信けBとを1市
常の排他的論理和同(浴vc導入しても、その両端では
波形にヒゲが生じ、判断し難く′fxろ事もあり得る。
Figure 2 (a) Exclusive ORing of K, human power, IH, A, output signal, and B (even if a bath VC is introduced, a whisker appears in the waveform at both ends, making it difficult to judge). There is also a possibility of fx.

そこで、一方の1g号?遅延させて、その立−ヒ1’1
.ld立下りに他方の洛号が存在するか否かで判1併す
る方が得策である。出力14号は入力1呂号に比し時開
的に遅れるのが通常であるから、特に遅剛回路全設けな
くて済む場合もちh得る。
So, the 1g issue on the other hand? Delay it, that stand-up 1'1
.. It is better to check whether the other Rakugo is present at the falling edge of ld or not. Since the output No. 14 is usually delayed in time compared to the input No. 1, it is particularly advantageous if the slow-rigid circuit does not need to be provided at all.

〔発を月の友施例〕[Example of the release of Tsuki no Tomo]

、君3図に不発を力による障害検出lpl路の一尖疵例
の系統図全ボす。図中、(2)〜(7)はf君1図と同
様の機能ブロック全示し、(9)はin4えばTl)M
A用変調器又は変復調器全訝むTDMA端局眩置で装り
、その出力は送1g周波数変僕器(2)へ送出さハるが
、本イら1月ではこの出力部(又は送は闇彼奴変換器人
力部)に(51〜(7)と同僚の中間周波数帯方向性結
合器(101。
In Figure 3, a system diagram of an example of a single point flaw in the LPL path that detects failure due to force is shown in Figure 3. In the figure, (2) to (7) show all the functional blocks similar to the f-kun 1 diagram, and (9) shows in4 (Tl) M
The entire A modulator or modem is equipped with a TDMA end station device, and its output is sent to the sending 1g frequency converter (2). (51-(7)) and my colleague's intermediate frequency band directional coupler (101).

ダイオード検波器(11)お工び[11流増幅器(興ケ
収付け、こねに比Ili+2器(131全接続して人力
のバーストts号に応じた矩形波力;得らハる工うにし
ている。一方送1.4機出力側の15号検出回路にも同
様の比牧器Q71を収付ける。この工うにして両者の矩
形波信号の排他的論理オ′IT?排他的論理和回路(5
1で収ねは、は号の有理にかかわらず機器(この場合は
送置周波数変換器(2)お工び重力増幅器13))の異
常全検出するこ々/バできる。
Diode detector (11) repair [11 flow amplifier (commercial collection, Koneni Ili + 2 device (131 fully connected and rectangular wave power according to human burst TS); A similar Hibiki Q71 is installed in the No. 15 detection circuit on the output side of the one-way feed 1.4 unit.In this way, an exclusive OR circuit of both rectangular wave signals is created. (5
1 can detect all abnormalities in the equipment (in this case, the transmitting frequency converter (2) and the gravity amplifier 13) regardless of the rationality of the item.

捷t、第41!X、l [本発す]の−j54≦である
排他的論理和1h)iiVtの具体的構成例ケ示す。こ
ねば通常のゼト他的論理和ケ本同酌に1丙用した場合に
生じる微妙なタイミングのすtlによる誤助作を防ぐ八
になされたもので、第3図にふけるA点とB点工すの具
体的IC1l路?不している。
Shoto, 41st! A specific example of the configuration of the exclusive OR 1h) iiVt of -j54≦ of X, l [mainly generated] is shown. This was done to prevent false aids due to the delicate timing that occurs when using the usual zet altruistic disjunction in conjunction with the same consideration, and points A and B in Figure 3. Is there a specific IC1l route to be constructed? I'm not doing it.

図中、(181お工び(21nゴ曲常のエツジトリ力形
りフリップフロップ1m路でT・物子への入力の立上り
)周KD・惜子がHレベルなら出力り、端子もHレベル
となる回路、〆1は遅延回路で、通常車安ボマルナバイ
フレータ8(i−利用して構成さハる。B点のほらけA
薇より遅れるのが通常であるから、特に遅(吐回路は設
けていない。
In the figure, (181 process (rise of input to T/mono at 1 m path of edge force type flip-flop as usual in 21n)) If KD/shoji is at H level, it is output, and the terminal is also at H level. 1 is a delay circuit, which is usually constructed by using the Bomaruna biflator 8 (i-).
Since it is normal for the discharge to be delayed compared to the discharge, no special delay discharge circuit is provided.

次にこのl!−!I i1各の11νI作について説1
月する。窮]のDフリップフロラフ−(18)のD入力
に汀、ALlつの1百号が入力さねクロック人力(T)
 tr(はE 、U的の[6号が入力さね、B工りのパ
ルスの立hh’h+でAのIH号が既に人力Δねている
(Hの状態)であれは、Q、出力はHとなり、Aの1可
号がLの状態であねは、逆K L K 3る。一方、 
&11のDフリップフロラフ−にばA、Bのはけが逆の
関係で入力貞ね、A信号が”U、11って一定時間後に
B1呂号の有無が判定される。
Next this l! -! I i1 Theory 1 about each 11νI work
Moon. D-flip flow rough-(18)'s D input is input, AL1 100 is input clock human power (T)
tr(is E, U's [No. 6 is input, and A's IH No. is already under human power Δ at the rising hh'h+ of the pulse of B process (state of H), then Q, output becomes H, and when the first sign of A is L, the reverse is K L K 3. On the other hand,
In the D flip flow rough of &11, the input signals of A and B are reversed, and the A signal is "U, 11", and after a certain period of time, the presence or absence of B1 is determined.

9了ユつて、+181お工びシ刀のDフリ′ンブフロ′
ングのQ、出力が両方共Hであれば正常であり、どちら
かがLになった時、rなわちA又はBの一方の1J役が
HVcなっても他方がHKならない時には異常であると
判定全下すことができる。
After 9 years, +181 D-flind of the sword
It is normal if both the Q and outputs of the ring are H, and when either one becomes L, it is abnormal if the 1J role of r, that is, A or B, becomes HVc but the other does not become HK. You can make a full judgment.

以」二説明したように本回語を用いflば、一方の閤号
の立−1ニリ後一定1寺間41i vcおいて、その立
上り時に他方の1h号の有無全判定する為、人力される
1g号のバースト長(パルス巾)やその間隔等からその
遅+ル1寺1111ケ適当Vζ定めてやれば、4諌めて
容易に正常、異常の判定ケ下すことがでへ、かつ通常の
排他曲論ゼII和のようVCパルス[百号の立−ヒ幻、
立下h 1leiにおける誤Oの作も生じないと(ハう
特長がある。
As explained above, if we use this language, we will leave a certain period of 41 i vc after the rising of one of the 1 h, and at the time of the rising of the 1 h, it will be manually determined whether the other 1 h is present or not. If we determine the appropriate delay Vζ from the burst length (pulse width) of No. 1g and its interval, etc., we can easily judge whether it is normal or abnormal after 4 times, and the normal Exclusive Music Theory II Wa no Yo VC Pulse
It also has the advantage of not causing an erroneous O at the falling edge.

斗だ、・以ヒの、悦−′111はもっばらTDMA I
s号全例として説明したが、音声の有無によってキャリ
アが断/接さねる5CPCのようなシステム1ても有効
である。
It's Do, I'm happy -'111 is TDMA I
Although the explanation has been given as an example of all the S numbers, a system 1 such as 5CPC, in which the carrier is disconnected/not connected depending on the presence or absence of voice, is also effective.

第4図は一方の阿号の立上すlt#の他方のrei ”
’i′の有無で判断しているが、立上りと立下りの両方
を用いても長いことは言う捷でもない。
Figure 4 shows the rise of one Ago and the other rei of lt#.
Although the judgment is made based on the presence or absence of 'i', it is not a problem to say that it will take a long time even if both the rising and falling edges are used.

第5図はその一列を示すm1略図である。轍は出力は号
B分遅らせる遅延回路、仏1(寸人力は号Aを遅らせる
遅延1o+ uである。cn 、 caiはクロック1
g号の立」二り時にJ端子がHレベルであねばQ端子が
H1ηi子−7ELレベルとなるフリップフロップ回路
で!114図と同様に、一方の店−号の立上り時に他方
のIN号の有無全判別する回路である。Ca、(,47
)f−jクロック1ぎ号の立下り時K J ii子がH
レベルであねはQ、端子がH,Q、4子がLとなるフリ
ップフロップで一方の旧号の立下I′)時に他方の1J
号の有無を判別する回路である。
FIG. 5 is a schematic diagram of m1 showing one row. The rut is a delay circuit that delays the output by a clock B, and the output is a delay circuit 1 (the output is a delay 1o+u that delays a clock A. cn and cai are clocks 1 and 1).
This is a flip-flop circuit in which if the J terminal is at H level when the g signal is standing, the Q terminal will be at H1ηi−7EL level! Similar to FIG. 114, this is a circuit that completely determines the presence or absence of the IN number of the other store when one store number rises. Ca, (,47
) At the falling edge of fj clock No. 1, K J ii is H
It is a flip-flop in which the level is Q, the terminals are H, Q, and the 4 children are L. When one old code goes down (I'), the other one is 1J.
This is a circuit that determines the presence or absence of a code.

〔発明の効果〕〔Effect of the invention〕

この発明は伝送回路の入力信号と出力15号の排他的論
理和により、障害全検出するようにしたので、バースト
状の1J号が伝送プねる回iiMのIIv害ケ′#易に
1−かも1tl咽な回路構成で検出できる効果がある。
In this invention, all faults are detected by the exclusive OR of the input signal of the transmission circuit and the output No. 15, so that the burst-like No. 1J can easily cause the damage caused by No. There is an effect that can be detected with a simple circuit configuration.

史に、入力Igツ゛t!:出力旧号のうち一方の立」二
り時又は立下り(Iとに他方の旧号が存在するか否かに
より、排他曲論Bl!和を構成すれば、誤判断がなくな
るという効果がある。
In history, input Igt! :Depending on whether the other old name exists at the rising or falling edge of one of the output old names (I and be.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(r:i従来の1g号恢出回1浴の例、第2図は
本錯Ful lの原理ケ示す波形説明図、43図は本発
明に、【るl14jj′模出回酪の一央砂1例、・43
4図は水元1411 vcよるパルス比較回路の一例9
+−示す同略図、叫5図はパルス比11!91「l i
俗の他の−X/11をボす1r31路図である。 1!XI If(おいて、(2)は4閉波叙斐候器、:
3)け゛磁力萌1M器、+51 、 lot it方向
性結合器、+61 、 (Ill ij検波器、t+3
1゜(171は比較器、(151は排他的論理和回路、
(18! 、シl)けDフリップフロッグ回路、(4)
に遅延向I@である。 各図中の同−符′/Jは同−又は相当部分全ボす〇代理
人 大岩増雄 第11J 第2図 第;3図 !6 第4図 第51m
Figure 1 (r:i) An example of the conventional No. 1g pumping cycle, Figure 2 is a waveform explanatory diagram showing the principle of the present complex, and Figure 43 is an example of the present invention. 1 case of Ichiosuna, ・43
Figure 4 is an example of a pulse comparison circuit using Mizumoto 1411 VC9
The same diagrams shown as + and 5 show a pulse ratio of 11!91 "l i
It is a 1r31 road map that beats the common other -X/11. 1! XI If (where (2) is a 4-closed wave detector,:
3) Kemagnetic force moe 1M detector, +51, lot it directional coupler, +61, (Ill ij detector, t+3
1゜(171 is a comparator, (151 is an exclusive OR circuit,
(18!, sil) D flip-frog circuit, (4)
is the delay direction I@. The same - symbol '/J in each figure is the same - or the corresponding part is all letters 〇Representative Masuo Oiwa 11J Figure 2; Figure 3! 6 Figure 4 51m

Claims (1)

【特許請求の範囲】[Claims] (1)バースト状の1ぎ号彼ケ伝送する通藩慨器の人力
[r(づ゛お、[び出力+g ’) w波形整形するパ
ルス波形整形回路と、これらのパルス波形整形1rlJ
 la!1の出力の排他的論理オ0をとる排他的論理和
回路々に工りl’l’l +4通1^模器の異常を検出
すること全特徴とする障害検出同1IVt0 +21 illll論的論理和回路一方のパルス波形整
形回路の出力の立卜り時lコ他方のパルス波形整形11
1路の出力がイを在するか否か全検出する回路を有すA
こと全特徴とする特許請求のIlc<囲41項記;威の
障害検出1「Il路。 ::旬 抽伸的5儲叩和同(洛が一方のパルス波形整形
1[11略のf/、 、1: リI+、νに他方のパル
ス波形整形回路の出力/バイ!在するか否かを検出する
回路と、一方のパルス波形整形ti11 +俗のTl下
り時に他方のパルス波形整形回路の出力が存在するか否
か全検出する沖[路上を有すること全特徴とする特許請
求の範囲第1項記載の障害検出回路。
(1) A pulse waveform shaping circuit that shapes the human power of the transmitter that transmits the burst-like signal [r (Zo, [output + g') w waveform], and these pulse waveform shaping circuits 1rlJ
la! The exclusive logic of the output of 1 is engineered into exclusive OR circuits that take the output of 0 to detect abnormalities in the model. When the output of one pulse waveform shaping circuit rises, the sum circuit pulse waveform shaping circuit 11 of the other.
A, which has a circuit that completely detects whether or not the output of path 1 is present.
Ilc of the patent claim which is characterized by all the features of Ilc < boxed item 41; , 1: A circuit that detects whether or not the output of the other pulse waveform shaping circuit is present at I+, ν, and the output of the other pulse waveform shaping circuit when one pulse waveform shaping ti11 + general Tl falls. 2. The fault detection circuit according to claim 1, wherein the fault detection circuit is characterized in that the circuit detects whether or not a fault exists on the road.
JP59007541A 1984-01-18 1984-01-18 Fault recognition circuit Pending JPS60150341A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP59007541A JPS60150341A (en) 1984-01-18 1984-01-18 Fault recognition circuit
US06/687,761 US4658206A (en) 1984-01-18 1984-12-31 Fault detector for communications equipment using exclusive or circuitry
DE19853500896 DE3500896A1 (en) 1984-01-18 1985-01-12 FAULT DISPLAY DEVICE FOR TRANSMISSION ROUTES WITH BURST SIGNAL INSERTION

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59007541A JPS60150341A (en) 1984-01-18 1984-01-18 Fault recognition circuit

Publications (1)

Publication Number Publication Date
JPS60150341A true JPS60150341A (en) 1985-08-08

Family

ID=11668648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59007541A Pending JPS60150341A (en) 1984-01-18 1984-01-18 Fault recognition circuit

Country Status (1)

Country Link
JP (1) JPS60150341A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825736A (en) * 1981-08-08 1983-02-16 Fujitsu Ltd Measuring circuit for signal break time

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825736A (en) * 1981-08-08 1983-02-16 Fujitsu Ltd Measuring circuit for signal break time

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