JPS60144313U - differential amplifier circuit - Google Patents
differential amplifier circuitInfo
- Publication number
- JPS60144313U JPS60144313U JP3221684U JP3221684U JPS60144313U JP S60144313 U JPS60144313 U JP S60144313U JP 3221684 U JP3221684 U JP 3221684U JP 3221684 U JP3221684 U JP 3221684U JP S60144313 U JPS60144313 U JP S60144313U
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- amplifier circuit
- fet
- source
- current output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は差動増幅回路の従来例の電気回路図、第２図は
本考案にかける差動増幅回路の一実施例の電気回路図、
第３図〜第５図は第２図の差動増幅回路を用いた計測用
増幅器の電気回路の例を示した図である。
Ｕｌ・・・第１のＯＰアンプ、Ｕ２・・・第２のＯＰア
ンプ、Ｑｌ・・・第１のＦＥＴ、Ｑ２・・・第２のＦＥ
Ｔ。
Ｒｌｏ、Ｒ□１・・・抵抗、−■・・・定電流源、７．
訃・・非反転入力端子、９，１０・・・反転入力端子、
１１．１２・・・出力端子、１３．１４・・・電流出力
端子。
；０−
十ｖFIG. 1 is an electrical circuit diagram of a conventional example of a differential amplifier circuit, and FIG. 2 is an electrical circuit diagram of an embodiment of a differential amplifier circuit according to the present invention.
3 to 5 are diagrams showing examples of electrical circuits of a measurement amplifier using the differential amplifier circuit of FIG. 2. Ul...first OP amplifier, U2...second OP amplifier, Ql...first FET, Q2...second FE
T. Rlo, R□1...resistance, -■...constant current source, 7.
Death...non-inverting input terminal, 9,10...inverting input terminal,
11.12... Output terminal, 13.14... Current output terminal. ;0-10v
Claims (1)
に比例した信号を出力する差動増幅回路において、 演算増幅器、ＦＥＴおよび抵抗がそれぞれ１対ずつ設け
られていて、 前記演算増幅器では、各々の非反転入力端子が前記２つ
の入力電圧の入力端子になっているとともに各々の反転
入力端子が対応したＦＥＴのソースに接続され、各々の
出力端子は対応したＦＥＴのゲートに接続されていて、 前記ＦＥＴでは、各々のドレインが電流出力端子になっ
ていて、 前記抵抗では、各々の一端が対応したＦＥＴのソースに
接続されるとともに他端は共通に定電流源に接続された
構成になっていて、 前記２つの電流出力端子の差電流を出力とすることを特
徴とする差動増幅回路。[Scope of Claim for Utility Model Registration] A differential amplifier circuit that takes a voltage difference between two input voltages as an input signal and outputs a signal proportional to this input signal, which is provided with one pair each of an operational amplifier, an FET, and a resistor. In the operational amplifier, each non-inverting input terminal is an input terminal for the two input voltages, each inverting input terminal is connected to a source of a corresponding FET, and each output terminal is connected to a source of a corresponding FET. In the FET, each drain is a current output terminal, and in the resistor, one end of each is connected to the source of the corresponding FET, and the other end is commonly connected to a constant current source. What is claimed is: 1. A differential amplifier circuit, characterized in that the differential amplifier circuit has a configuration in which the current output terminals are connected to each other, and outputs a difference current between the two current output terminals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3221684U JPS60144313U (en) | 1984-03-06 | 1984-03-06 | differential amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3221684U JPS60144313U (en) | 1984-03-06 | 1984-03-06 | differential amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60144313U true JPS60144313U (en) | 1985-09-25 |
Family
ID=30533526
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3221684U Pending JPS60144313U (en) | 1984-03-06 | 1984-03-06 | differential amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60144313U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014225876A (en) * | 2013-05-15 | 2014-12-04 | ハネウェル・インターナショナル・インコーポレーテッド | Variable gain dual output transconductance amplifier-based instrumentation amplifier |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5760500B2 (en) * | 1971-12-16 | 1982-12-20 | Rooman Unto Shutoruterufuooto Ag |
-
1984
- 1984-03-06 JP JP3221684U patent/JPS60144313U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5760500B2 (en) * | 1971-12-16 | 1982-12-20 | Rooman Unto Shutoruterufuooto Ag |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014225876A (en) * | 2013-05-15 | 2014-12-04 | ハネウェル・インターナショナル・インコーポレーテッド | Variable gain dual output transconductance amplifier-based instrumentation amplifier |
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