JPS6014000B2 - Manufacturing method of silicon carbide substrate - Google Patents

Manufacturing method of silicon carbide substrate

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Publication number
JPS6014000B2
JPS6014000B2 JP52062488A JP6248877A JPS6014000B2 JP S6014000 B2 JPS6014000 B2 JP S6014000B2 JP 52062488 A JP52062488 A JP 52062488A JP 6248877 A JP6248877 A JP 6248877A JP S6014000 B2 JPS6014000 B2 JP S6014000B2
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JP
Japan
Prior art keywords
sic
substrate
layer
single crystal
growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52062488A
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Japanese (ja)
Other versions
JPS53146299A (en
Inventor
武 桜井
年紀 猪奥
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Sharp Corp
Original Assignee
Sharp Corp
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Priority to JP52062488A priority Critical patent/JPS6014000B2/en
Publication of JPS53146299A publication Critical patent/JPS53146299A/en
Publication of JPS6014000B2 publication Critical patent/JPS6014000B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は炭化桂素(SIC)の大面積基板を製造する方
法に関するもので、特にシリコン基板上に成長させた炭
化桂素簿膜を分離する手段として有効な技術を提供する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a large-area silicon carbide (SIC) substrate, and in particular, to a method of manufacturing a silicon carbide (SIC) substrate, which is an effective technique for separating a silicon carbide film grown on a silicon substrate. This is what we provide.

SICには多くの結晶構造が存在し、結晶礎造により2
.4〜33エレクトロンボルト(eV)にエネルギーギ
ャップを有するもので、熱的、化学的、機械的に極めて
安定で、放射線損傷にも強く、またワイドギアツブ半導
体としてはめずらしく、P型、n型共安定に存在する材
料である。
There are many crystal structures in SIC, and 2
.. It has an energy gap of 4 to 33 electron volts (eV), is extremely stable thermally, chemically, and mechanically, and is resistant to radiation damage.It is also rare as a wide gear semiconductor, and is co-stable for P-type and n-type. It is a material that exists.

従って藤温動作素子、大電力用素子、高信頼性半導体素
子、耐放射線素子等の半導体材料として有望である。又
従釆の半導体材料を用いた素子では困難な環境下でも使
用可能となり、半導体デバイスの応用範囲を著しく拡大
し得る材料である。その他、そのエネルギーギャップの
値から考察するに可視短波長と近紫外光間の光鰭変換素
子材料としても興味ある半導体材料である。さらに他の
ワイドギャップ半導体が一般に重金属をその主成分に含
有し、このために公害と資源の問題を伴なうのに対して
、SICはこれらの両問題から解放されている点からも
電子材料として有望視されるものである。このように多
くの利点、可能性を有する材料であるにもかかわらず実
用化が阻まれているのは、生産性を考慮した工業的規模
での量産に必要となる高品質の大面積基板を得るための
再現性のある結晶成長技術が確立されていないところに
その原因がある。
Therefore, it is promising as a semiconductor material for Fujiwarm operation devices, high-power devices, high-reliability semiconductor devices, radiation-resistant devices, etc. Furthermore, it is a material that can be used even under difficult environments for devices using conventional semiconductor materials, and can significantly expand the range of applications of semiconductor devices. In addition, considering its energy gap value, it is an interesting semiconductor material as a material for optical fin conversion elements between visible short wavelengths and near-ultraviolet light. Furthermore, while other wide-gap semiconductors generally contain heavy metals as their main components, which poses pollution and resource problems, SICs are free from both of these problems, making them an excellent electronic material. This is seen as promising. Despite this material having many advantages and possibilities, it is difficult to put it into practical use because of the high quality, large area substrates required for mass production on an industrial scale with productivity in mind. The reason for this is that no reproducible crystal growth technology has been established to obtain such crystals.

従来、研究室規模でSIC基板を得る方法としては、黒
鉛ルッボ中でSIC粉末を滋0ぴ0〜2600qoで昇
華させ、さらに再結晶させてSIC基板を得るいわゆる
昇華再結晶法(レーリ一法と称される)、シリコン又は
シリコンと鉄、コバルト、白金等より成る混合物を黒鉛
ルツポで溶融してSIC基板を得るいわゆる溶液法、研
磨材料を工業的に得るために一般に用いられているアチ
ェソン法により偶発的に得られるSIC基板を用いる方
法等がある。
Conventionally, as a method for obtaining SIC substrates on a laboratory scale, the so-called sublimation recrystallization method (Raley method and ), the so-called solution method to obtain an SIC substrate by melting silicon or a mixture of silicon and iron, cobalt, platinum, etc. in a graphite melting pot, and the Acheson method, which is generally used to obtain polishing materials industrially. There is a method using an incidentally obtained SIC board.

しかしながら上記昇華再結晶法、溶液法では多数の単結
晶を得ることはできるが、多くの結晶核が結晶成長初期
に発生する為に大型のSIC基板を得ることが困難であ
り、又幾種類かの結晶構造のものが混在し、単一結晶構
造で大型のSIC単結晶を再現性よく得る方法としては
不完全なものである。又、アチェソン法により偶発的に
得られるSIC基板は半導体材料として使用するには純
度及び結晶性の点で問題があり、又比較的大型のものが
得られても偶発的に得られるものであり、SIC基板を
工業的に得る方法としては適当でない。一方、近年の半
導体技術の向上に伴ない、比較的良質で大型の単結晶基
板が入手可能なシリコン異質基板上に、ヘテロェピタキ
シヤル技術により父形SIC(立方晶形に属する結晶構
造を有するもので、そのエネルギ−ギャップは〜2.傘
V)単結晶薄膜が得られるようになった。シリコン基板
上へのへテロェピタキシヤル成長法としては‘11シリ
コンソースとしてSiH4,SIC14,(CH3)3
SIC1,(Cは)ぶjC12、またカーボンソースと
してCC14、炭化水素ガス(C2日2,C2比,CM
C3日8等)、キャリアガスとして水素、アルゴン等を
用いて、Si基板温度を1200qo〜1400午0に
設定し、気相成長技術(CVD技術)により、丈形SI
C単結晶薄膜を得る方法■Si基板表面にグラフアィト
、炭化水素の熱分解により生ずるカーボンを1200q
o〜1400qo程度の温度で拡散させ、Si基板表面
をSICに変換させて丈形SIC単結晶薄膜を得る方法
、‘3粒蒸気を直流又は交流グロ−放電により活性化さ
れたアルゴン、炭化水素ガス中を通過させてSi基板上
にSIC単結晶薄膜を蒸着させる方法(蒸着法)等があ
る。しかしながら上記‘11,■,‘3}等のSi異質
基板上へのへテロェピタキシヤル技術により得られた父
形SIC薄膜単結晶の厚さは1〜10〃m程度の薄いも
のであり、又一般にはその結晶の完全性に於いても良好
なものとはいい難い。この理由は、Si基板とぶ形SI
C結晶の格子定数の差が大きい為に特にSIC基板とェ
ピタキシャル父形SIC界面近傍に多くのミスフィット
転位が発生し、その影響がヱピタキシャル層内部にまで
及んでいること、及びSi基板とSIC結晶の熱膨張係
数の差により成長温度から室温に冷却する過程でSIC
ェピタキシァル層中に歪が蓄積されるためと考えられる
。又仮にこのような方法で大面積かつ良質の舷形SIC
(エネルギーギャップEgは〜2.傘V)が得られたと
しても更にエネルギーギャップの大きい結晶構造のSI
C、例えば細(Egは〜3.0沙V),4日(Egは〜
3.2鷺V)岬(Egは〜2.畔V)等のo形SICを
ェピタキシヤル成長法で得ようとすると、その成長温度
は一般には1600℃以上の高温となり、Si基板及び
前述したSi基板上へ*形SIC薄膜を成長させた基板
($形SIC/Sミ構造)等はSiの融点が14100
0であるのでば形Sicヘアロエピタキシヤル成長用基
板として採用することはできなくなる。しかしながらS
i基板上へのへテロェピタキシャル成長による*形単結
晶薄膜成長が可能であるという結果は少なくとも大面積
のSICが得られるということで希望の見し、出せるも
のである。即ちSi基板上に形成された*形SIC単結
晶薄膜を何らかの方法で分離することが可能になれば、
このSi基板から分離した*形SIC単結晶薄膜を1次
基板として新たに従釆のェピタキシャル成長法により、
1次基板より改善された父形SIC結晶を成長させるこ
と及び1600℃以上の成長温度でQ形SIC結晶を成
長させることが可能となる。この様なSi基板から分離
したSIC薄膜基板へのェピタキシャル成長はホモヱピ
タキシャル成長となり、基板と成長層の格子定数の相違
、熱膨張係数の相違に基〈問題は発生せず、良好な結晶
性のェピタキシャル成長層が得られる。ところがこの点
に関し従来に於いてはSi基板上に形成された1〜10
山m厚程度の*形SIC薄膜を破損することなしに分離
する適当な製造技術が確立されていなかったため、実際
には上記1次基板(*形SIC薄膜)上へェピタキシャ
ル成長させて良質の*形、或いはQ形SIC結晶を形成
するところまで発展させた例はない。従来Si基板上に
形成された$形SIC薄膜をへテロェピタキシャル成長
させた後、Si基板を弗酸と硝酸の混液でエッチング除
去する方法がとられていた。しかしSi基板への丈形S
ICの成長は1200午0〜140ぴ○程度の比較的高
温で行なわれ、又Si基板とSICのェピタキシヤル成
長層では熱膨張係数が異なるために成長温度から室温に
温度を下げる過程でSi基板及びSICヱピタキシヤル
成長層に大きな歪が蓄えられる。そのためにSi基板を
エッチングにより薄く加工していくとSi基板及びェピ
タキシヤル成長層は湾曲していくことになり、ェピタキ
シャル成長層にクラックが発生したり、破損等によりS
IC薄膜として使用不能の結果となる。本発明は上記現
状に鑑み、Si異質基板上に従来のへテロェピタキシャ
ル技術により形成されたェピタキシャル成長層を*形S
IC薄膜として破損することないこSi異質基板から分
離し、この分離しため形SIC薄膜を新たな基板として
従来のェピタキシャル技術により良質のむ形SIC薄膜
、o形SIC薄膜を形成する為の新規有用なSIC薄膜
基板の製造方法を提供することを目的とする。本発明を
実施例に従って図面とともに以下に詳説する。
However, although it is possible to obtain a large number of single crystals using the sublimation recrystallization method and the solution method, it is difficult to obtain large-sized SIC substrates because many crystal nuclei are generated at the initial stage of crystal growth. This is an incomplete method for obtaining a large SIC single crystal with a single crystal structure with good reproducibility. In addition, SIC substrates accidentally obtained by the Acheson method have problems with purity and crystallinity when used as semiconductor materials, and even if relatively large SIC substrates can be obtained, they are obtained accidentally. , is not suitable as a method for industrially obtaining SIC substrates. On the other hand, with the improvement of semiconductor technology in recent years, relatively high-quality, large-sized single-crystal substrates are now available on heterogeneous silicon substrates. The energy gap is ~2.V) A single crystal thin film can now be obtained. As a heteroepitaxial growth method on a silicon substrate, '11 silicon source is SiH4, SIC14, (CH3)3.
SIC1, (C is)bujC12, and also CC14 as a carbon source, hydrocarbon gas (C2 day 2, C2 ratio, CM
Using hydrogen, argon, etc. as a carrier gas, the temperature of the Si substrate is set at 1200 qo to 1400 qo, and the vertical SI is grown by vapor phase growth technology (CVD technology).
Method for obtaining a C single-crystal thin film ■ 1200q of carbon produced by thermal decomposition of graphite and hydrocarbons on the surface of a Si substrate
A method for obtaining a long SIC single crystal thin film by diffusing at a temperature of about 1,400 qo to 1,400 qo to convert the surface of a Si substrate into SIC. Argon, hydrocarbon gas activated by direct current or alternating current glow discharge of 3-grain vapor There is a method (vapor deposition method) in which an SIC single crystal thin film is vapor-deposited on a Si substrate by passing through the Si substrate. However, the thickness of the parent type SIC thin film single crystal obtained by the heteroepitaxial technique on a Si foreign substrate such as '11, ■, '3} is as thin as 1 to 10 m. In general, the integrity of the crystals is also not good. The reason for this is that the Si substrate jump-type SI
Due to the large difference in the lattice constant of the C crystal, many misfit dislocations occur especially near the interface between the SIC substrate and the epitaxial father SIC, and the influence extends to the inside of the epitaxial layer. Due to the difference in thermal expansion coefficient of SIC crystal, SIC
This is thought to be due to the accumulation of strain in the epitaxial layer. Also, if such a method were used to create a large-area and high-quality broadside SIC,
Even if (the energy gap Eg is ~2.umbrella V) is obtained, the SI of the crystal structure with a larger energy gap
C, for example, thin (Eg is ~3.0saV), 4 days (Eg is ~
When attempting to obtain an o-type SIC such as 3.2 Sagi V) Misaki (Eg is ~2. Kazu V) by epitaxial growth, the growth temperature is generally higher than 1600°C, and the Si substrate and the aforementioned Si The melting point of Si is 14100 for substrates on which *type SIC thin films are grown ($type SIC/Smi structure).
If it is 0, it cannot be used as a substrate for SiC hair epitaxial growth. However, S
The result that it is possible to grow a *-type single crystal thin film by heteroepitaxial growth on an i-substrate is a hopeful sign that at least a large-area SIC can be obtained. In other words, if it becomes possible to separate the *type SIC single crystal thin film formed on the Si substrate by some method,
Using the *type SIC single crystal thin film separated from this Si substrate as the primary substrate, a new epitaxial growth method was applied to
It becomes possible to grow an improved father-type SIC crystal from the primary substrate and to grow a Q-type SIC crystal at a growth temperature of 1600° C. or higher. Such epitaxial growth on a SIC thin film substrate separated from a Si substrate results in homoepitaxial growth, and due to the difference in lattice constant and thermal expansion coefficient between the substrate and the growth layer, no problems occur and good crystal growth occurs. A layer of epitaxial growth is obtained. However, regarding this point, in the past, 1 to 10
Since no suitable manufacturing technology has been established to separate *-type SIC thin films with a thickness of about 100 m thick without damaging them, in reality, high-quality There are no examples of development to the point of forming *-type or Q-type SIC crystals. Conventionally, a $-shaped SIC thin film formed on a Si substrate is grown heteroepitaxially, and then the Si substrate is etched away using a mixed solution of hydrofluoric acid and nitric acid. However, the length S for the Si substrate
IC growth is performed at a relatively high temperature of about 1200 to 140 pm, and since the Si substrate and the epitaxial growth layer of the SIC have different coefficients of thermal expansion, the Si substrate and the epitaxial growth layer are Large strains are stored in the SIC epitaxial growth layer. For this reason, when the Si substrate is thinned by etching, the Si substrate and the epitaxial growth layer will become curved, and the epitaxial growth layer may crack or break, causing the S
As a result, it cannot be used as an IC thin film. In view of the above-mentioned current situation, the present invention provides an epitaxial growth layer formed by conventional heteroepitaxial technology on a Si heterogeneous substrate.
This is a new method for separating Si from a foreign substrate without damaging the IC thin film, and using this separated SIC thin film as a new substrate to form high-quality swallow-type SIC thin films and o-type SIC thin films using conventional epitaxial technology. An object of the present invention is to provide a method for manufacturing a useful SIC thin film substrate. The invention will be explained below in detail according to embodiments and with drawings.

第1図a,b,c,dは本発明の第1実施例を示すSI
C単結晶の製造工程図である。第1図aに示すように2
00〜即OAm厚で{111},{110}、又は{1
00}面方位を有し、片面を鏡面研磨したシリコン基板
1に於いて、鏡面研磨した側の面をエッチング処理する
Figures 1a, b, c, and d are SI showing the first embodiment of the present invention.
It is a manufacturing process diagram of C single crystal. As shown in Figure 1a, 2
00~ Immediate OAm thickness {111}, {110}, or {1
In a silicon substrate 1 having a plane orientation of 00} and having one side mirror-polished, the mirror-polished side is subjected to an etching process.

次に従来の気相ェピタキシヤル成長法、例えばキャリア
ガスとして水素を用い、水素に対してSIC14,CC
14を0.05〜0.5モル%とし、基板温度を130
0〜1360午0として60〜24の分間成長させると
、第1図bに示すように基板から1〜5ムm厚の$形S
IC単結晶層2が成長し、その上に10〜150仏mの
や形SIC多結晶層3が成長する。成長途中で多結晶化
する原因についてはまだ解明されていないが、基板とェ
ピタキシャルSIC層の格子定数の相違に起因するもの
と考えられる。成長後、ヱピタキシャル反応炉から成長
ウヱハーを取り出し、Si基板1を硝酸、弗酸系のSi
エッチング液によりエッチング除去し、第1図cに示す
ように$形SIC多結晶3上に$形SIC単結晶膜2が
形成された構造のSIC基板をうる。次に上記*形SI
C成長と同様の成長方法で第1図cに示しため形SIC
基板の単結晶ェピタキシャル層2上に基板温度1300
〜1360℃で30〜2o0分間ェピタキシャル成長さ
せて3〜100ムmの高品質のむ形SICェピタキシャ
ル層4を得る(第1図d)。このェピタキシヤル層4は
、Si基板上への$形SICェピタキシャル層と異なり
、SICのみにより構成された基板を用いているので、
基板とェビタキシャル層の格子定数の相違、熱側髪張係
数の差が問題とならず、第1図cにて示すSIC基板よ
り結晶性の良好なSICを得ることが可能となる。第2
図a,b,c,d,eは本発明の第2実施例を示すSI
C単結晶の製造工程図である。
Next, a conventional vapor phase epitaxial growth method, for example, using hydrogen as a carrier gas, SIC14, CC
14 is 0.05 to 0.5 mol%, and the substrate temperature is 130
When grown for 60 to 24 minutes at 0 to 1360 o'clock, a $-shaped S with a thickness of 1 to 5 mm is formed from the substrate as shown in Figure 1b.
An IC single crystal layer 2 is grown, and a 10 to 150 mm thick SIC polycrystalline layer 3 is grown thereon. Although the cause of polycrystalization during growth has not yet been elucidated, it is thought to be caused by a difference in lattice constant between the substrate and the epitaxial SIC layer. After the growth, the growth wafer is taken out from the epitaxial reactor, and the Si substrate 1 is heated with nitric acid or hydrofluoric acid based Si.
The substrate is removed by etching with an etching solution to obtain a SIC substrate having a structure in which a $-shaped SIC single crystal film 2 is formed on a $-shaped SIC polycrystalline 3 as shown in FIG. 1c. Next, the above *Type SI
The size of the SIC shown in FIG.
The substrate temperature is 1300 on the single crystal epitaxial layer 2 of the substrate.
Epitaxial growth is carried out at ~1360 DEG C. for 30-200 minutes to obtain a high-quality swallow-shaped SIC epitaxial layer 4 of 3-100 mm (FIG. 1d). Unlike the $-type SIC epitaxial layer formed on the Si substrate, this epitaxial layer 4 uses a substrate composed only of SIC.
Differences in lattice constants and thermal side tension coefficients between the substrate and the ebitaxial layer do not become a problem, and it becomes possible to obtain an SIC with better crystallinity than the SIC substrate shown in FIG. 1c. Second
Figures a, b, c, d, e are SI showing the second embodiment of the present invention.
It is a manufacturing process diagram of C single crystal.

第1実施例と同様に第2図aに示すようにエッチング処
理したSi基板5を用い、このSi基板5を高純度グラ
フアイト加熱支持台(サセプター)上で1250〜13
5000に加熱するか、CH4,C2は.C3比等の炭
化水素ガスを10‐1〜10‐2モル%程度アルゴンキ
ャリアガスに混入させ、やはり1250〜1350qo
程度の温度でSi基板5を加熱すると、グラフアィト、
又は炭化水素ガスの熱分解により発生したカーボンがS
i基板5表面から拡散し、Si基板5表面から次第に$
形SICに変換していく。この方法により第2図bに示
す如く1〜10〃m陣のや形SIC単結晶薄膜6を得る
。次に第1実施例と同様の従来の気相成長法、あるいは
スパッタ一法、反応性蒸着法等により多結晶鉾iC膜7
を第2図cに示す如く10〜200Lm厚で形成する。
その後Si基板5を硝酸、弗酸系のエッチング液でエッ
チング除去し、SIC多結晶7上にSIC単結晶6を形
成した構造のSIC基板を得る。(第2図d)。、この
ようにして得られたSICのみで形成された基板上に、
従来の気相成長法により第2図eに示す如く高品質のS
ICェピタキシャル層8を得る。以上本発明によれば大
面積で良質のSIC半導体材料を再現性良く得ることが
でき、従ってSIC半導体素子の工業的規模での量産が
可能となる。本発明に於けるSICェピタキシヤル成長
はホモヱピタキシャル成長となるためSIC基板とェピ
タキシヤル層の格子定数、熱膨張係数の差によるSIC
ェピタキシヤル層への悪影響が軽減され、従って高品質
のSIC半導体材料を製作することができる。本発明に
於ける上記以外の非常に優れた効果として、SICェピ
タキシヤル層形成用のSIC単結晶基板はSIC多結晶
層で補強されているため製造工程に於いてSIC単結晶
基板の破損あるいはクラックの発生等が効果的に防止さ
れる。即ち結晶学的に考察するに結晶の粒界は隣接する
結晶粒相互間の結合エネルギーにより粒内より高いエネ
ルギー準位に設定されている。従って粒界総面積の多い
多結晶程素地が粒界分布により強鞠化され、機械的強度
が強くなる。本発明のSIC単結晶基板はこの強瓢化さ
れた多結晶層で補強されているため、強度的に安定なも
のとなり得る。また本発明は従釆の気相成長法を基調と
する製造方法であるため従釆設備の有効的活用により上
記種々の優れた効果を奏することのできる非常に産業的
意義の高い製造技術である。
As in the first embodiment, a Si substrate 5 which has been etched as shown in FIG.
Heat to 5000℃ or CH4, C2. A hydrocarbon gas such as a C3 ratio is mixed into an argon carrier gas of about 10-1 to 10-2 mol%, and also 1250 to 1350 qo.
When the Si substrate 5 is heated at a temperature of about
Or carbon generated by thermal decomposition of hydrocarbon gas is S
Diffusion from the surface of the i-substrate 5, and gradually $ from the surface of the Si-substrate 5.
Convert to form SIC. By this method, a 1 to 10 m thick SIC single crystal thin film 6 is obtained as shown in FIG. 2b. Next, the polycrystalline iC film 7 is formed by the conventional vapor phase growth method, sputtering method, reactive vapor deposition method, etc. similar to the first embodiment.
is formed with a thickness of 10 to 200 Lm as shown in FIG. 2c.
Thereafter, the Si substrate 5 is removed by etching with a nitric acid or hydrofluoric acid based etching solution to obtain an SIC substrate having a structure in which an SIC single crystal 6 is formed on an SIC polycrystal 7. (Figure 2d). , on a substrate formed only of SIC obtained in this way,
As shown in Figure 2e, high-quality S was produced using the conventional vapor phase growth method.
An IC epitaxial layer 8 is obtained. As described above, according to the present invention, it is possible to obtain a high-quality SIC semiconductor material over a large area with good reproducibility, and therefore it is possible to mass-produce SIC semiconductor elements on an industrial scale. Since the SIC epitaxial growth in the present invention is homoepitaxial growth, the SIC due to the difference in lattice constant and thermal expansion coefficient between the SIC substrate and the epitaxial layer
Negative effects on the epitaxial layers are reduced and thus high quality SIC semiconductor materials can be produced. Another very excellent effect of the present invention other than the above is that the SIC single crystal substrate for forming the SIC epitaxial layer is reinforced with a SIC polycrystalline layer, which prevents damage or cracks in the SIC single crystal substrate during the manufacturing process. occurrence etc. is effectively prevented. That is, from a crystallographic perspective, the grain boundaries of a crystal are set at a higher energy level than the interior of the grains due to the bonding energy between adjacent crystal grains. Therefore, the larger the total grain boundary area of the polycrystal, the stronger the matrix becomes due to the grain boundary distribution, and the mechanical strength becomes stronger. Since the SIC single crystal substrate of the present invention is reinforced with this strengthened polycrystalline layer, it can be made stable in terms of strength. Furthermore, since the present invention is a manufacturing method based on a secondary vapor phase growth method, it is a highly industrially significant manufacturing technology that can achieve the various excellent effects mentioned above by effectively utilizing secondary equipment. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1実施例を示すSIC単結晶の製造
工程図である。 第2図は本発明の第2実施例を示すSIC単結晶の製造
工程図である。1,5・・・・・・シリコン基板、2,
6・・・・・・SIC単結晶層、3,7・・・・・・S
IC多結晶層、4,8・・・・・・SICェピタキシヤ
ル層。 第1図 第2図
FIG. 1 is a manufacturing process diagram of a SIC single crystal showing a first embodiment of the present invention. FIG. 2 is a process diagram for manufacturing an SIC single crystal showing a second embodiment of the present invention. 1, 5... Silicon substrate, 2,
6...SIC single crystal layer, 3,7...S
IC polycrystalline layer, 4,8...SIC epitaxial layer. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1 硅素基板上に炭化硅素単結晶層及び炭化硅素多結晶
層から成る2層結晶層を重畳形成し、次工程として前記
硅素基板を溶解除去することにより前記2層結晶層より
分離し、前記2層結晶層を炭化硅素基板とするとともに
前記炭化硅素単結晶層表面を炭化硅素のエピタキシヤル
層形成面に設定することを特徴とする炭化硅素基板の製
造方法。
1 A two-layer crystal layer consisting of a silicon carbide single crystal layer and a silicon carbide polycrystal layer is superimposed on a silicon substrate, and as a next step, the silicon substrate is separated from the two-layer crystal layer by dissolving and removing it. A method for manufacturing a silicon carbide substrate, characterized in that the layer crystal layer is a silicon carbide substrate, and the surface of the silicon carbide single crystal layer is set as a surface on which an epitaxial layer of silicon carbide is formed.
JP52062488A 1977-05-25 1977-05-25 Manufacturing method of silicon carbide substrate Expired JPS6014000B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52062488A JPS6014000B2 (en) 1977-05-25 1977-05-25 Manufacturing method of silicon carbide substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52062488A JPS6014000B2 (en) 1977-05-25 1977-05-25 Manufacturing method of silicon carbide substrate

Publications (2)

Publication Number Publication Date
JPS53146299A JPS53146299A (en) 1978-12-20
JPS6014000B2 true JPS6014000B2 (en) 1985-04-10

Family

ID=13201599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52062488A Expired JPS6014000B2 (en) 1977-05-25 1977-05-25 Manufacturing method of silicon carbide substrate

Country Status (1)

Country Link
JP (1) JPS6014000B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013252997A (en) * 2012-06-07 2013-12-19 Sumitomo Electric Ind Ltd AlN CRYSTAL BASE BOARD AND METHOD FOR PRODUCING THE SAME

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5373171A (en) * 1987-03-12 1994-12-13 Sumitomo Electric Industries, Ltd. Thin film single crystal substrate
JPH067594B2 (en) * 1987-11-20 1994-01-26 富士通株式会社 Method for manufacturing semiconductor substrate
JPH0832591B2 (en) * 1989-10-11 1996-03-29 日本ピラー工業株式会社 Composite material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013252997A (en) * 2012-06-07 2013-12-19 Sumitomo Electric Ind Ltd AlN CRYSTAL BASE BOARD AND METHOD FOR PRODUCING THE SAME

Also Published As

Publication number Publication date
JPS53146299A (en) 1978-12-20

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