JPS6013490B2 - Logarithmic conversion device - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a logarithmic conversion device that receives digital variable data as input, digitally converts it into a logarithmic value with a preset value as the base, and outputs the converted data as digital data. Conventionally, this type of logarithmic conversion device generally uses the so-called analog-logarithmic conversion method, in which an analog variable value is input using an electric circuit, and the value is logarithmically converted in an analog manner, and the result is also obtained in an analog manner. It is true. However, due to the nature of analog data, it is impossible to always achieve the conversion accuracy desired by the user.
Therefore, in such cases, that is, when a logarithmically converted value with higher precision is desired, the logarithm value must be obtained completely manually using a number display index prepared separately. Even in such cases, it is rare that a given input variable is always listed on a numerical table, and the desired converted value can be calculated by some kind of approximate calculation using the numerical table, such as linear interpolation. It was common to ask. The present invention has been made in view of these circumstances, and employs a digital logarithmic conversion method in order to enable high-precision conversion, which was impossible with analog methods. By adopting the number table indexing method of 2008 and using this method with a rational approximation calculation using the mathematical law of logarithms (however, it is completely different from the interpolation calculation described above), it is possible to create the necessary number table for variables. It is an object of the present invention to provide a logarithmic conversion device with a simple configuration and high precision, which can be significantly reduced in size. Therefore, before describing embodiments of the present invention, the underlying mathematical principles will be explained. First, the first basic principle will be explained. The input value is the independent variable × (× can be an integer or a real number, but from the definition of logarithm, × > 0)
, if the dependent variable Y is a logarithmic value with an arbitrary positive constant a as the base, then obtaining the logarithmic value Y by giving the variable X can be formulated as follows. Y=lo scales X...

[1} This m formula can be used as is, but using the constant K, '1
If Equation 1 is generalized, Y=K. lo saddle x
......■. The following will explain according to this formula [2}. X and Y are digital variables, and here they are assumed to be binary numbers expressed in the 2* base system. [In principle, it can be expressed in any number system, but in general digital methods, binary numbers are often used, with only 1 (true) and 0 (false) as digit display elements. , I just made this assumption. ] Furthermore, as shown in FIG. 1, it is assumed that the input variable X is described using one finite digit, and the upper m digits thereof are the integer part. In other words, if m=1, the input variable
is an integer. 0 (Making such an assumption is often misunderstood as severely limiting the scope of applicability, but in practice it does not limit the scope of applicability at all.) Based on this assumption, the following Introducing a constant M defined by Eq. Ta M=2m
...'3' Using this constant M, divide x in formula (2) by M, and then multiply by M, the value of Y will not change. That is, equation (2) can be transformed as follows. O
YniK. -. Bag (X/M) + K. logaM.・・・．・・【４）■
In the formula, if we replace ×/M with a new variable X' (that is, set X' = It can be easily proven as follows that the decimal point is simply moved to the leftmost position without changing the contents of the digits. (
i) ×′=×/M=×/2m=×・2-m/. Equivalent to moving the decimal point m places to the left. (ii) (X' upper limit) = (upper limit of X)/M, and (upper limit of The value is (21-1
)/2(1-m). Therefore, (upper limit of X') = [(2'1)/2 (1 hit)
]ノ2mi(2L1)/21=1-well, therefore, X'
<1 holds true. Therefore, the meaning of the '4} expression is simply to position the decimal point (correctly, the virtual decimal point) at the leftmost position, as shown in Figure 2, without changing the contents of each digit of the input variable X at all. By converting it into a logarithm and adding K to the result, it is possible to make the original x equal to the value converted into a logarithm. This is based on the basic principle of the present invention. It is something that becomes one. In the present invention, another basic principle is applied in order to perform processing more efficiently, so next, the second basic principle will be explained. As shown in Figure 3a, the input variable
''), if the upper n digits of It is also effective to reduce the amount of necessary numerical tables (and therefore the number of memory elements). To do this, as shown in Figure 3b,
All you have to do is shift × (or Y
NiK・lo saddle (X′・2n・2-n) 10K・logaM
=K. lo bait (X′.2n)-n. K・lo crab 20K・
1 Yui aM...[5
} is transformed like this. In formula '5}, the most significant digit of the first item, X'·2n, is necessarily 1 according to the above explanation, and the relationship of X'·2n<1 still holds true. By the way, X
'・2n is performed, for example, in a shift register, and it is clear that the value of n will naturally be a different value if the input variable is different, so the value of n is It must be something that can be automatically determined. For this reason, the shift register used in the present invention is equipped with a carry detection function, and as shown in FIG. Although the content of the most significant digit would normally be lost, it is assumed that this information is output as carry data C to an external device such as a shift register. This function is called a carry IJ-detection function and is well known in digital shift technology. (Therefore, in the following explanation, this "carry information" will be simply referred to as "carry.") Note that when performing a left shift as described above in a shift register, etc., there is no difference in the least significant digit. Although the function of assigning a value is also an important function, it is sufficient for the shift register and the like used in the present invention to have the function of simply inserting 0.
(Therefore, all shift operations in the following explanation are described in this sense.) Now, for example, if the calculation of If it is carried out using
■It can be seen that if the formula is left as is, it will cause inconvenience. This is because the carry detection function checks the carry of the most significant digit, but according to the above explanation, n
This is because in a digit shift, the value of carry C is always 0. Therefore, instead of adding n digits, we added one more digit (n+
1) Considering the case of digit shifting, the value of carry C in that case is 1, as is clear from the definition of n. That is, if the calculation procedure is to shift the shift register to the left one digit at a time, check the carry value each time, and repeat the shift operation until the value becomes 1, the final result in the shift register is It should be equal to X'·2n+1. In this case, rather than using formula '5} as is, the definition of M is changed to M = 2m-1 and Y = K lo scale (X' 2MI) - n K loga20K lo bait M
It is more effective to use a modified formula as shown in '6). Next, how to obtain K.lo saddle (X'.2 rivers 1) will be explained. X'・2n+1 can be transformed into (X'・2n)・2, and according to the explanation so far, (X
'・2n) is as shown in Figure 3b, and X'
- 2n times 1, and the value of the most significant digit was always 1. Therefore, regarding (X'・2n)・2 obtained by shifting one more digit with respect to (X′・2n), IS(×
'・2n)・2ku2 . . . It can be easily verified that the inequality {7} always holds true. Now, in the operation result of (X'・2n)・2, carry C
If we extract the value of the top k digits excluding , treat it as an integer value, and set it as S, it satisfies 0≦S≦(2k-1), so if we divide this S by 2k and let Q be ( That is, if Q=S/2k), it is clear from the definition of S that OSQ<1, and therefore the following equation is also satisfied. 1≦(10Q)<2 ... Comparing the formula ■(7) and the formula ■, the relationships of the inequalities are exactly the same, so if k is set large enough without exceeding i, Approximate formula (X'・2n)・2≠10.210S/2k……■*, (X′・2n)・2
The above (10Q) may be used instead. In this formula [9', the larger the value of k, the more 1
The value of 10Q approaches (X'.2n).2, so it can be seen that the value of k is an important factor that influences the conversion accuracy of the apparatus of the present invention. Of course, the value of k can be given as a constant when designing the device, but in that case, the most desirable way is to make it match the actual significant digits of the input variable. If used, the formula ■ can be transformed as follows: Y±K, lo scales (10Q)1n.K・loga20K・
Lo hair M...
...(1■Here, as shown in Figure 5, in total (2k
-1) Prepare a numerical table having elements, and each element shall be filled with one unit of memory element in the memory circuit, and each element shall be filled with 0, 1, 2, 3,
......S... (2k - 1), and the elements numbered in this way are numbered K loga (10S
/2k) is stored in advance as a constant. In this way, based on the above explanation, by extracting the upper k digits excluding carry C from the calculation result of
In the number table arranged as shown in Figure 5, the number S
If we index the value corresponding to , it will certainly give the value of the first term in equation (2). In addition, to supplement the second term of formula (1), that is, the part of 1n K loga2, the meaning of this part is that the value of the constant K loga2 is
According to the above explanation, the value of n is determined by the carry detection function in the shift register, so the subtraction of the constant K・lo saddle 2 is performed by one digit in the shift register. It is necessary to execute the shift operation in synchronization with the shift operation, and the subtraction means in the present invention uses a synchronization signal from the control system (which is output at the same time as the activation signal for the shift register or after a short delay). It is configured to perform calculations in batches. This is the mathematical principle underlying the present invention, which can be summarized as follows. To convert the input variable X into a logarithm and obtain the converted value Y, use the formula '1, (i)
Constant K stored in advance in the memory circuit as the initial value of Y
・Set the value of lohoko M, (li) Next, set the value of × to 1
The digit is shifted to the left, and at the same time, from the value of Y, the value of the constant K, which is also stored in the memory circuit in advance, is subtracted once, and the result of the shift on the side (ii) is output. Check the value of the carry information C of , and if it is 0, repeat the processing of the (il) term, and repeat this operation until the carry C becomes 1. , from the value remaining as the final result of the shift, extract the value of the upper k digits, consider this as a number value, and store the K loga in advance as shown in Figure 5.
If we index the element corresponding to that number from the numerical table of (10S/2k) and add the result of MG and the value remaining as the final result of the subtraction operation in term (il), we get the result indeed gives the logarithmically transformed value of the input variable value X. The features of the present invention based on this principle are as follows:
Temporarily holds digital N-ary data of finite digits, and moves this held data one by one from the lower to the upper digit by command, and if the value of the most significant digit before the digit movement is not 0, it is carried up when the digit is moved. A data holding means for outputting information, K・logaM and K・lo scales N (where, K is a constant, a is a positive constant, and M is the number of digits of the integer part of the input variable data, and M=Nm. -1 is a constant defined as ). First and second storage means for holding in advance digital data respectively, and the data stored in the first storage means are set as initial values and this data is set as an initial value. subtraction means for repeatedly subtracting the data stored in the second storage means from the second storage means once per command; and a finite number of K.multidot.1 sufficient to obtain the required conversion accuracy. Digital data of finite digits indicating the value of scales (・juka) (However, it is a silver k-digit numerical value) is stored in advance, and specific data in this stored data is converted into a numerical value S or a code corresponding to this. a third storage means Z that can be selectively read by specifying , and an addition for adding data selected in the third storage means and data as a result of the calculation in the subtraction means by a command. and input digital variable data into the data holding means, then give a digit movement command and a subtraction command to the data holding means and the subtraction means Z, respectively, and as a result of the digit movement, a carry is transferred from the data holding means. If no information is output, the operation of giving digit movement and subtraction commands is repeated in the same way, and when the carry information is output, the data held in the data holding means 2 or the code corresponding thereto is transferred as a result. Selection designation information is given to the third storage means, the third storage means selects specific stored data corresponding to the selection designation information, and an addition command is given to the addition means, and the addition result is input. The object of the present invention is to include a control means for controlling a series of operations to output as an object conversion value Y=K・lo saddle X for x.Hereinafter, embodiments of the present invention will be described with reference to the drawings. The figure shows the configuration of an embodiment of the present invention, and its components will first be explained in detail.In Figure 6, 1 is a shift register as data holding means having a shift function and a carry detection function;
3 is the first memory as a first storage means for storing the constant K.logaM in advance, and 3 is the constant K.logaM.
A second memory serves as a second storage means for storing scales 2 in advance; 4 is a subtraction register as a subtraction means capable of further subtracting from the result of subtraction, that is, repeatable subtraction; As shown in Fig. 5, a third memory 6 serves as a third storage means for pre-memorizing the value of the constant K...0hoko (juhana) in correspondence with the number S; This is an addition circuit as addition means for adding data, and GI to G6 are gate circuits. Further, 7 is a control circuit that controls the operations of the shift register 1, subtraction register 4, addition circuit 6, gate circuits GI to G6, etc., and is in charge of the operation of the entire system. The input variable x is given as digital variable data of finite digits, and the data buses ○1 and D2 that serve as the paths are sufficient lines to transfer the required number of digits (according to the assumption in the above explanation). The output value Y is also a digital variable consisting of finite digits, and therefore data buses 03 and D are used as data paths.
4 and D5, the number of lines corresponding to the number of digits is secured. (However, here, the number of digits of the output value Y is not specifically specified, but this value can be determined as appropriate depending on the use of this device, and for this reason, this point will not be mentioned in particular. )0 Furthermore,
The first memory 2 stores in advance the value of the constant K.lo scale M, and the second memory 3 stores the constant K.lo scale M.
The value of the chick is stored in advance. In addition, by specifying an arbitrary number, the array element corresponding to that number can be retrieved.The third memory 5 contains expressions {9} and
A uniquely determined value of a constant K.loga (10/2k) is stored in advance in association with the number S based on the formula. This device can operate correctly and zero when each component is installed in a state that satisfies the above-mentioned conditions. Next, the operation in the above configuration will be explained. First, the signal SI is output from the control circuit 7, the gate circuit GI is opened, and the input variable data is set in the shift register register 1 as an initial value. Next, the gate circuit G2 is opened by the signal S2 from the control circuit 7, and the constant held in the first memory 2 is set in the subtraction register 4 as an initial value. Subsequently, the control circuit 7 outputs signals S3 and S4 to 0, and first, the signal S3 causes the shift register 1 to be shifted by one digit to the left. Furthermore, in synchronization with the signal S4, the constant value held in the second memory 3 is subtracted from the original value in the subtraction register 4. On the other hand, the shift register 1 outputs a carry information signal S5 as a result of a one-digit left shift. When the signal S5 is input to the control circuit 7, the control circuit 7
Then, the value of the signal S5 is checked, and if the value is 0, the control circuit 7 outputs the signals S3 and S4 again, and the signal S3 causes the shift register to shift by one digit to the left. By subtraction register 4
, the constant value held in the second memory 3 is subtracted once from the original value held as a result of the previous subtraction, and then the carry information S5 from the shift register 1 is input again to the control circuit 7. Ru. The control circuit 7 checks the value of the signal S5 again, and if the value is 0, repeats the same operation as described above, and this operation is repeated until the value of the signal S5 becomes 1. The aforementioned shift operation and subtraction operation are stopped when the value of the signal S5 becomes 1, but the results are held for a certain period of time. Subsequently, a signal S6 is output from the control circuit 7, the gate circuit G3 is opened, and the result of the shift register is input to the third memory 5. In the third memory 52, regarding the input value,
Extracts only the value of a predetermined number of digits, considers it as a specific number, reads out the corresponding pre-held numeric table value, and outputs the value to the data bus D3,
When the reading is completed, a signal S7 is outputted to 2. When the signal S7 is input to the control circuit 7, the control circuit 7 successively outputs the signals S8 and G9. Therefore, on the one hand, the signal S8 opens the gate circuit G4 and the data on the data bus D3 is input to the adder circuit 36, and on the other hand, the signal S9 opens the gate circuit G5 and the data is held in the subtraction register 4. The calculated results are input to the adder circuit 6. The adder circuit 6 receives these two input data (
In this case, the data on the data buses D3 and 4) are added, and the result 3 is output to the data bus D5, and an addition completion signal SIO is output. After the signal 10 is input to the control circuit 7, the signal SII is outputted from the control circuit 7, and as a result, the gate circuit G6 is opened and the conversion result Y in this apparatus is outputted to the outside 40. This output value Y is a logarithmically transformed value of the input variable X.
The configuration shown in FIG. 6 as described above is only one embodiment of the present invention, and other embodiments that do not depart from the gist of the present invention are naturally included in the present invention. That is, although only the embodiment for binary numbers has been described above, as mentioned earlier in the explanation, the present invention can be applied to general N-ary numbers without changing the gist of the present invention. In that case, the meaning of 1 digit in the above is changed to 1 digit in the meaning of N-ary system, and furthermore, in formula '10, the constant value of the second term is changed from K・lo scale 2 to K・loga.
It is sufficient to change N', further modify the definition of MO to Nm, and modify the numerical table value stored in advance in the third memory 5 to K.lo chick (10S/Nk). Furthermore, although the shift register 1, subtraction register 4, and addition circuit 6 shown in FIG. 6 are explained as completely different circuits in the above embodiment, these three types of circuits are
Since it is a modification of the arithmetic register circuit known as a so-called accumulator, it is possible to use the same circuit for all of them, the subtraction register 4 and the addition circuit 6, or to integrate them. be. From the same point of view, the memories 2, 3, and 5 do not necessarily need to be separate memories; for example, the third memory 5 may be expanded and the stored contents of the first and second memories 2, 3 may be transferred to this third memory 5. It is also possible to memorize them all at once. Even in that case, it goes without saying that each constant value must be referenced using substantially the same procedure as explained above. However, in these embodiments other than the embodiment shown in FIG. 6, the operation contents of the control circuit 7 are naturally changed. As detailed above, according to the present invention,
By adopting a digital logarithm conversion method and basically using a number table indexing method, and by using approximation calculations using the mathematical law of logarithms, the amount of number tables required for conversion can be significantly reduced. Thus, it is possible to provide a logarithmic conversion device with a simple configuration and high accuracy.

[Brief explanation of the drawing]

1 to 5 are diagrams for explaining the basic principle of the present invention, and FIG. 6 is a block diagram showing the system configuration of an embodiment of the present invention. 1...Shift register, 2...First memory, 3...
...Second memory, 4...Subtraction register, 5
...Third memory, 6... Addition circuit,
7... Control circuit. Figure 1 Figure 2 Figure 3 Figure 5 Figure 6

Claims (1)

[Scope of Claims] 1. Temporarily holds digital N-ary data of finite digits, moves this held data one by one from lower to upper digits by command, and the value of the most significant digit before the digit movement is not 0. In the case of K.logaM and K.logaN (however, K.logaM and K.logaN (however, K.
is a constant, a is a positive constant, and M is a constant defined as M=N^m^-^1, where m is the number of digits of the integer part of input variable data. ) for holding digital data in advance, respectively; and the storage data of the second storage means is set from the data stored in the first storage means as an initial value. a subtraction means that repeatedly subtracts , once per command, and a finite number of K loga (1+S/(N^k)) sufficient to obtain the required conversion accuracy (where S is a k-digit number). ) is stored in advance in digital data of finite digits indicating the value of 3 storage means; addition means for adding the data selected by the third storage means and the data as a result of the calculation in the subtraction means according to a command; and input digital variable data for inputting input digital variable data to the data holding means. , Next, giving a digit movement command and a subtraction command to the data holding means and the subtraction means, respectively, and if carry information is not output from the data holding means as a result of the digit movement, similarly giving a digit movement and subtraction command. is repeated, and when the carry information is output, as a result, the data held in the data holding means or the code corresponding thereto is given to the third storage means as selection designation information, and the third storage means select specific stored data corresponding to the selection designation information, give an addition command to the addition means, and apply this addition result to the input X as Y=K.
A logarithmic conversion device comprising a control means for controlling a series of operations to output a logarithm conversion value called logaX. 2. In the logarithmic conversion device according to claim 1, at least two of the data holding means, the subtraction means, and the addition means
one using a common register circuit, at least two of the first to third storage means using different storage areas of the common storage circuit, and using these in a predetermined manner in the control means. A logarithmic conversion device characterized by having a dividing function.