JPS60127844A - Line/packet joint exchange system - Google Patents

Abstract

PURPOSE:To improve the efficiency and to simplify control by unifying truly a line exchange and a packet exchange in a line/packet joint exchange circuit network. CONSTITUTION:A frame of a prescribed period is provided to a communication loop. As for a line exchange signal incoming from a subscriber terminal device or a relay line to a communication node, it is classified by destination communication node at each period of the frame, plural line exchange signals at each same destination communication node are assembled into a mixing packet CS for one plural line exchanges and transmitted into a communication loop. As for a packet exchange signal incoming from a subscriber terminal device and a relay line to the communication node, each signal is assembled into a packet exchange single packet PS and transmitted to the communication loop. The communication node finds out address to the own node and receives, is decomposed into the line exchange signal and the packet exchange signal, and the result is outputted to the subscriber terminal device and the relay line.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for configuring a line/packet integrated switch that exchanges both line-switched signals and packet-switched signals in a mixed manner.

As is well known, switching methods include circuit switching methods and packet switching methods. Both have their advantages,
There are drawbacks and each has different areas of application. In other words, the circuit switching system has the characteristics that a call connection path with the required bandwidth or speed is secured from the start to the end of each call (or call), and that the delay is small and there is no variation in delay. It is also advantageous for data communications such as facsimiles and file transfers in which a large amount of data is transmitted and occurs in continuous songs. But Ta2('I'im
For interactive data communication in which data is generated only intermittently and in small amounts, such as e-Sharing System services and inquiry services, the line usage efficiency is poor, which is disadvantageous. On the other hand, the packet switching method is advantageous over the above-mentioned interactive data communication, as it allows the data to be sent to be stored in a buffer and then queued, allowing the data to be efficiently multiplexed onto the line. Become. However, compared to the circuit switching method, the delay is large and the delay fluctuates, so it is generally considered disadvantageous for voice communications, etc.

In this way, the suitable switching method differs depending on the type of service, but currently it is common to configure a separate communication network for each service and adopt the switching method suitable for that service. . For example, a voice communication network (circuit switching system), a telex network (circuit switching system), a circuit switching network for data, and a packet switching network for data are constructed separately.

This method has the advantage that each communication network can be optimized for the services it provides. but,
On the other hand, because there are multiple communication networks that have slightly different methods or characteristics but are generally similar, there are many overlapping parts, making the operation and management of communication networks complicated.
Furthermore, since the scale of each communication network becomes smaller, the so-called large grouping effect cannot be obtained, and the efficiency of the communication network equipment as a whole is reduced. Additionally, if communication networks differ for each service, there will be many difficulties in providing a composite service that combines multiple services, and it will be necessary to construct a new communication network to realize new services. This results in the occurrence of gender.

Therefore, if both the circuit switching method and the packet switching method could be realized in an integrated manner through a single communication network, and a wide variety of services could be centrally provided in a format suitable for each, the effect would be extremely large. It is. for that purpose,
Each of the transmission lines and exchanges that make up the communication network
It is essential to realize integrated transmission lines and line/packet integrated switching equipment.

As a conventional single-line/bucket integrated switch, the configuration shown in Figure 1 has been considered (G). That is, in FIG. 1, circuit switching signals and packet switching signals arriving from a transmission line 10 are separated by a switching unit 11, circuit switching signals are sent to a circuit switching unit 13 via a link 12, and packet switching signals are sent to a link switching unit 13. 14 and is transmitted to the packet switching unit 15. The line switching unit ■3 and the packet switching unit 15 are
They are equivalent to circuit switching equipment and packet switching equipment according to the prior art.

The circuit-switched signals and packet-switched signals exchanged at each switching section are transmitted to the switching section 11 via links 12 and 14, respectively. The exchange unit 11 outputs both signals to the transmission line 10 of the destination route. As for the allocation, the exchange section 11 is
The configuration differs depending on the form in which circuit-switched signals and packet-switched signals are integrated on the transmission path 10, but in any case, the circuit-switched signals and packet-switched signals on the transmission path are separated or reversed. The two are combined and output on the transmission line.

However, in the configuration shown in FIG. 1, even though line switching and packet switching are apparently implemented within the switching equipment, they are logically completely separate and cannot be called true integration. That is, the circuit switching section and the packet switching section must be configured individually based on the characteristics of the circuit switching signal and the packet switching signal, and there are still overlapping parts.
In addition, efficiency is inevitably reduced, and the benefits of circuit switching/packet switching integration described above cannot be obtained.

On the other hand, in private closed communication networks, especially local area networks (LANs), which have recently been attracting attention, attempts are being made to service circuit-switched signals and packet-switched signals on the same communication network, and It is also conceivable to configure the call switch network after a local area network. For example, as shown in FIG. 2, a plurality of modules 20 (hereinafter referred to as "communications cards") accommodating a large number of terminals or inter-office trunk lines are connected by a plurality of communication loops 21. A number of possible configurations are possible. At this time, if a conventional local area network configuration method is followed, for example, a third
As shown in the figure, a frame with a fixed time period is provided, and a plurality of time slots are further provided within the frame. Then, these time slots are separated into time slots for circuit switching and time slots for packet switching, and each communication node uses the time slots assigned for circuit switching to transmit circuit switching signals and packet switching. transmit and receive packet-switched signals using time slots assigned to The individual circuit-switched signals are then transmitted over the loop using the same time slots every frame during the call connection, while the packet-switched signals are transmitted using an appropriate algorithm (of the time slot access algorithms known to those skilled in the art). For example, the token passing method is used for transmission.

In the above method, if the division between circuit switching time slots and packet switching time slots is fixed, even if one of the time slots is empty, the signal of the other Unable to use one person,
Overall efficiency decreases due to waste. In this case, although physically circuit switching and packet switching are integrated, they are logically completely different, and there is no difference from the method shown in Figure 1. Benefit from exchange integration11. On the other hand, so-called movable boundaries that make the division variable
By adopting the ndary) method, the number of time slots can be allocated according to the traffic volume of each circuit switching and packet switching, and the decrease in efficiency due to the occurrence of waste mentioned above can be alleviated. However, in that case, a control node is required that has the function of observing the traffic volume of each exchange signal and indicating the boundaries of time slots. Or, if a control node originally exists,
It is necessary to add the above function to that node. However, even at this time, it is impossible to instantaneously observe the amount of traffic, and therefore it is impossible to instantaneously change the allocation of the number of time slots to eliminate waste. This is an essential problem arising from differentiating time slots into circuit-switched and packet-switched time slots.

On the other hand, several methods have been proposed that aim at true integration of the two. One method is to apply packet switching to signals such as voice, for which circuit switching was traditionally considered appropriate, and to integrate all communications using packet switching. In the case of audio, in this method, digitized audio signals within a predetermined time period are grouped together to form a packet, and the packet is transmitted to the destination using conventional packet switching techniques. A header containing control signals such as a destination address and a logical channel number is added to each packet, and the packet is transmitted to the destination while referring to this header. In this case, in order to prevent a drop in transmission efficiency due to the header, the size of one packet must be increased to some extent. For this reason, the delay due to so-called packet assembly time (the time for accumulating the amount of speech signals necessary to form a packet of a predetermined size) increases for voice signals. Furthermore, in the packet switching system, packets are stored and transmitted while waiting for a transmission line to become available, so the waiting time varies depending on the packets, even if the packets belong to the same call or calls. Therefore, voice communication, etc.
For communications that require time transparency (the property that the delay is always constant), a reception buffer is required to absorb delay fluctuations, which further increases the delay time. In a communication network that spreads over a wide area, when the caller passes through many exchanges from the caller to the receiver, the delays at each exchange accumulate, resulting in an extremely large delay, resulting in echoes or delays in the communication itself. Deterioration of call quality occurs. In order to reduce the delay, it is necessary to shorten the top bucket length, shorten the packet assembly time, and reduce the capacity of the delay absorbing buffer. Quality deterioration occurs.

On the other hand, there is also a method in which circuit switching is applied to communications that are considered suitable for packet switching, and circuit/packet switching signals are integrated using the circuit switching method. For example, in a method called fast circuit switching, a new circuit is set up each time transmission data occurs intermittently during a single call, and the circuit is restored immediately after the transmission is completed. This method aims to improve efficiency by preventing unnecessary suspension of roads.

In this method, the most important issue is how quickly the line can be set up and restored. ShikajinajJS
-In a communication network that spreads over a wide area as mentioned above,
The route from the sender to the receiver must be set up and restored through multiple exchanges, and it is not realistic to keep the time sufficiently short compared to the time that the transmitted data itself occupies the transmission path. This is extremely difficult. Therefore, a decrease in efficiency of the transmission line is unavoidable. In addition, when there are various required bandwidths (or speeds) for the data to be transmitted, that is, when dealing with so-called multi-component traffic, the communication connection path with the required communication bandwidth or signal speed for each communication service is determined for each call. In addition, it is necessary to secure control over all routes, and control to combine the secured call connection paths of multiple unit bands or unit speeds into one call, which makes the control extremely complex, and requires a large amount of switching hardware and software. This will lead to increased scale and complexity.

The drawbacks of the conventional methods described above are enumerated as follows.

(1) True integration of circuit switching and packet switching is not performed, and the benefits of integration such as improved equipment efficiency, unified operation, and management are hardly achieved. (In case of circuit switching and packet switching coexistence system) (2) There is a large delay for circuit switching signals such as voice signals. (In the case of an integrated system using a packet switching system) (3) There is no time transparency for circuit switching signals such as voice signals. (In case of integrated method using packet switching method) (4) Inefficient for communication where transmission data is generated intermittently (in case of integrated method using circuit switching method) (5) Control of multi-source traffic becomes complicated do.

The purpose of the present invention is to eliminate all these drawbacks (in the case of a circuit-switched integrated system), to truly integrate circuit-switching and packet-switching, and to guarantee low delay and time transparency for circuit-switched signals. The present invention aims to realize a line/packet convergence switching system that can easily handle multiple traffic without reducing efficiency for intermittent communications.

That is, according to the present invention, in a line/packet integrated switching circuit network consisting of a single or plural communication loops and a plurality of communication nodes that commonly access the communication loops, the communication loops are connected at a fixed time period. Set up a frame,
Circuit-switched signals arriving at the communication node from subscriber terminals or relay lines are classified by destination communication node for each period of the frame, and multiple circuit-switched signals for each same destination communication node are classified into one or more. It is assembled into a circuit-switched mixed packet and transmitted to the communication loop, and each packet-switched signal arriving at the communication node from a subscriber terminal or a relay line is assembled into a single packet-switched packet and transmitted to the communication loop. At the same time, among the circuit-switched mixed packets and packet-switched single packets transmitted from the communication loop to the communication node, find and receive circuit-switched mixed packets and packet-switched single packets addressed to the own node. and decomposes the received circuit-switched mixed packet and packet-switched single packet into individual circuit-switched signals and packet-switched signals, and sends them to subscriber terminals or trunk lines. method is obtained.

The present invention will be explained in detail below with reference to one drawing.

The present invention is realized on a call switch circuit network configuration in which a plurality of communication nodes 20 shown in FIG. 2 are connected by a plurality of communication loops 21 (including a single communication loop 21). Second
The communication nodes 20 in the figure each accommodate a large number of subscriber terminals 22% 23, U or interoffice trunk lines 25,
By further transmitting and receiving the call signals arriving from them between arbitrary communication nodes, and then sending the call signals again to arbitrary subscriber terminals or interoffice relay lines,
In total, a large number of calls (
or calls) arbitrarily and simultaneously. Here, the circuit switching mode and the packet switching mode represent exchange forms applied to the exchange of a certain call.

Each communication node 20 transmits call signals in circuit switching mode among the call signals arriving at the node in these large numbers of calls at a fixed cycle common to the nodes, for example, 125μ, which is the standard coding cycle of voice signals. For each expression, a plurality of classified call signals are classified by destination communication node, and a circuit switching mixed packet as shown in FIG. 4 is created for each destination communication node. Furthermore, the created line-switched mixed packet is transmitted onto the communication loop within the next fixed period. By the method described later, the circuit-switched mixed packet can always be transmitted within -periods. In Figure 4, the circuit-switched mixed packet is
It consists of a destination communication node address section D, a source communication node address section s, an exchange mode display section M1, a control signal section C1, and a line exchange signal section C8. The destination communication node address section D1 and the source communication node address section S are literally the sections that store the address numbers of the destination communication node and the source communication node of the line-switched mixed packet.

The switching mode display section M is a section that displays whether the packet is for a call signal in circuit switching mode or for a call signal in packet switching mode, which will be described later.For example, in the case of circuit switching mode, "1"" is displayed as "0" if the mode is packet switching mode. Generally, two types of packets, one for M-line conversion and one for packet exchange, are transmitted and received between a set of nodes, so it is necessary to display such exchange modes.

On the other hand, the circuit switching signal section C8 is shown in FIG. 4 as C81, C82,
As shown in C-83,..., it generally consists of multiple circuit-switched mode call signals, and each call occupies a certain amount of space within the circuit-switched mixed packet depending on its band (or speed). Occupies every cycle. This is true for circuit switched mode calls.

A certain amount of call signals depending on the band arrive at a communication node at each fixed cycle, and all of the call signals must be sent to the destination communication node in the next cycle without being accumulated in a buffer memory, etc. It is from. For example, in Figure 4, the period is 125μ type, % type, 8 bits for PCM audio, 192 kb for C82.
/s In the case of high-speed facsimile, the space of a single bit is occupied in the line-switched mixed packet every cycle. - When a call occurs in the circuit-switched mode, a space for the corresponding call signal is added to the end of the circuit-switched signal section C8, and when a call in progress is terminated, the corresponding space is added to the end of the circuit-switched signal section C8. is deleted from the circuit-switched signal portion C8, and subsequent call signals are carried forward. That is, the length of the circuit-switched mixed packet changes depending on the occurrence/termination of a circuit-switched mode call.

The control signal section C is a section that stores control signals related to communications between communication nodes, such as the setting of calls in circuit switching mode, the required bandwidth for recovery, notification of incoming subscriber/outgoing subscriber information, etc. be.

On the other hand, among the speech signals arriving at the communication node 20, the speech signals in the packet exchange mode are assembled into a single packet for packet exchange as shown in FIG. 5 and sent onto the communication loop. In FIG. 5, destination communication node address section D5 source communication node address section S1
The exchange mode display section M is as described in FIG. 4. The packet switching signal section PS stores one packet switching mode call signal at a time. A single packet for packet switching constructed in this way is also sent to the communication loop. However, in the case of a single packet for packet exchange, transmission is not necessarily completed within one period. Therefore, each time a new cycle begins, a new destination communication node address part, etc., is added to the remaining packet signal part P.
It is added to the beginning of S and sent to the communication loop in the packet format shown in FIG. 5 for each cycle. At this time, the length of the packet-switched signal part PS of each single packet generally changes from period to period depending on the amount of packet-switched mode speech signals reaching the communication node and the congestion of the communication loop. Therefore, a single call signal (packet) that generally belongs to a certain packet-switched mode call may be transmitted across multiple packet-switched single packets. That is, for calls in packet switching mode, the packet switching signal section PS can be regarded as a packet multiplex transmission path whose communication capacity changes.

Depending on the amount of call signals and the congestion of the communication loop,
There are also periods in which a single packet for packet switching is not sent.

Unlike calls in the 5-circuit switching mode, in packet switching mode calls, the call signals arriving at the communication node are allowed to wait in the buffer memory, so the transmission method described above is possible. .

On the other hand, control signals for setting up, restoring, etc. a packet-switched mode call are usually included in the call signal. Therefore, the part corresponding to the side leg signal part C in FIG.
Not necessarily required for packet-switched mode;
It is not included in the configuration shown in FIG.

As described above, each communication node sends circuit-switched mixed packets and packet-switched single packets onto the communication loop, and also transmits a large number of circuit-switched mixed packets transmitted from other communication nodes on the communication loop. Among packets and single packets for packet exchange, those addressed to the own node are detected, removed from the communication loop, and taken into the own node.

According to this method, for calls in circuit switched mode,
Since a fixed amount of speech signals depending on the band or speed is transmitted and received every cycle using circuit-switched mixed packets, the delay between nodes is constant, and time transparency for circuit-switched signals is guaranteed.

Furthermore, since one header (address, control signal, etc.) is added to a plurality of circuit-switched mode call signals, the proportion of headers per individual call is reduced. As a result, efficiency is achieved even when the amount of signal for each individual call within the circuit-switched mixed packet is small. Therefore, it is possible to shorten the assembling/sending cycle of the circuit switching mode packets mentioned above, and it is possible to reduce the delay due to so-called packet assembling time. For example, in FIG. 4, the line-switched mixed packet assembly/sending cycle is 125
When using the μ type, when the circuit switching signal part C8 is (capital) bits for 10 voice calls, in order to make the decrease in efficiency due to the header to the same degree as in the conventional method of configuring one packet with only 1 voice call. , a packet assembly time of 1.25 mm is required for the audio bits. As described above, according to the mixed packet method of the present invention, it is possible to significantly reduce the delay time compared to the case of a normal packet switching method.

On the other hand, as shown in Figure 4, for multiple traffic lines in circuit switching modes with different bandwidths or speeds, complex control is required, such as securing a certain amount of space according to the bandwidth or speed and grouping them together. becomes unnecessary.

Furthermore, according to this method, circuit switched signals and packet switched signals can be handled in a unified manner. The only difference between the two is whether a mixed packet or a single packet needs to be sent and received at each fixed period. On the other hand, since a mixed packet or a single packet is created for each of the circuit switching mode and the packet switching mode, the complexity of control can be avoided compared to a method in which both are further combined to form a mixed packet.

Next, a method for transmitting and receiving the line-switched mixed packet and packet-switched single packet between each communication node will be described. First, in the configuration in which multiple communication nodes are coupled by a single or multiple communication loops as shown in FIG. It is configured to have an assembly period (for example, 125μIX!c) or an integral multiple thereof. That is, one of the communication nodes is provided with such a delay adjustment function, or a dedicated node for delay adjustment is provided. Each communication loop is provided with a communication frame having a period equal to the line-switched mixed packet assembly period, ie, a period of 125 microns in the previous example. Furthermore, the communication frame is divided into a plurality of time slots, as shown in FIG. Note that FIG. 6 does not show the frame synchronization pattern bits. Each communication node includes the mixed bucket for recycle exchange and the single packet for packet exchange (hereinafter, when referred to as mixed packet, it includes both the mixed packet for recycle and the single packet for packet exchange). )
is divided into the size of this time slot, the frame is monitored from the beginning, and each time an empty time slot is detected, the divided mixed packets are sequentially sent out onto the communication loop.

It is assumed that the above-mentioned free time slots include free time slots that are generated when a mixed packet addressed to the node itself is taken into the node. Therefore, one mixed packet is transmitted using multiple and even discrete time slots within one frame. Furthermore, if there are many signals to be transmitted within one frame, it is also possible to transmit the mixed packet using all available time slots.

Each time slot is provided with several indicators to indicate whether each time slot is empty/occupied and to distinguish between a plurality of mixed packets. For example, as shown in Figure 6, an empty/busy display section 17B, a mixed packet head display section H, and a mixed packet identification section 1'll) are provided at the beginning of each time slot. The empty/busy display section 17H displays whether the time slot is vacant or in use, and each communication node monitors this part of each time slot when sending mixed packets. It detects an empty timeslot, then changes this portion of the timeslot to "in use" and then sends out one mixed packet divided into the timeslot's size on that timeslot. Further, among the time slots through which mixed packets addressed to the own node have been transmitted, an empty indication is written to the I/H of the time slots that the own node does not use for sending out mixed packets. For example, "1" is written in the mixed packet head display section H when the time slot corresponds to the head of the mixed packet when the time slot sends out the mixed packet, and rOJ is written otherwise. On the receiving side, for the time slots that are displayed as "in use", the mixed packet head display section H is further observed, and
If the beginning is displayed here, the destination communication node φ address field D (see FIGS. 4 and 5) at the beginning of the information in that time slot is monitored. If it is addressed to its own node, it continues to receive the source communication node address section S and exchange mode display section M, and identifies the other node and the mixed packet for line switching/single packet for packet switching. Based on the result, the following control signal section 01 circuit switching signal section C8 or packet switching signal section P
8 etc. is received and distributed to a predetermined location such as a buffer memory. In this way, it becomes possible to detect and receive the first time slot of a mixed packet addressed to the own node.

Furthermore, a number for identifying a large number of mixed packets sent out from each communication node is written in the mixed packet identification section PID. For example, the slot number of the first time slot of the mixed packet is written in the PID of the time slots belonging to the same mixed packet. A specific example is shown in FIG. In FIG. 7, one mixed packet has discontinuous time slots of $2.44, ≠5,
The signal is divided into N7, . . . n-1 and sent out onto a communication loop. The leading time slot number 2 is written in the PID of those time slots, and the leading time slot number is displayed in the mixed packet leading display section H mentioned above in the time slot number 2. Needless to say, "in use" is displayed on the empty display section I/B of these time slots. On the other hand, on the receiving side, by monitoring the mixed packet head display part and the destination communication node address mentioned above, it can detect the first time slot of the mixed packet addressed to its own node and memorize that number. Regarding time slots, by extracting the time slot whose number is written in the PID, even a mixed packet that is divided into discrete time slots and transmitted can be restored to its original state. At this time, it does not matter what is written in the PID of the first time slot of the mixed packet, but as long as the own time slot number is written here.

This alone can indicate that it is the beginning of a mixed packet. Therefore, it is also possible to eliminate the need for the mixed packet head display section H mentioned above. Also, among the communication nodes, there is a special node that controls the operation and management of the entire exchange, and a specific time slot is fixedly allocated for communication between this special node and other general communication nodes. If there are time slots that are not used for communication between communication nodes, or if there are time slot numbers that do not exist, another method of displaying vacancies is to write those time slot numbers in the PID section. is also possible. That is, by doing so, it is possible to perform an equivalent operation without specifically providing the empty/occupied display section I/B, and it is possible to reduce the overhead within the communication frame.

Another way to identify mixed packets is to chain time slots belonging to the same mixed packet.
It is also conceivable to store the slot number of each preceding time slot in each time slot. A specific example is shown in FIG. 8g8 diagram is
@7 Time slot na 2 4, na 5 of the communication loop with one mixed packet in Figure and Open. 7. River...
The mixed packet identification section PID Jζ is shown in which the slot number of the previous time slot belonging to the same mixed packet is written. On the receiving side, the first time slot is detected, the next time slot that has that slot number in the PID part is detected, and the chain is followed in the same way. Then, the mixed packet can be restored in almost the same way as in the case of Figure 7. It is possible to do so. In this method, the last time slot number (sn in Figure 8) is not written in the PID (because one mixed packet is completed within one frame), so this number is used as an empty indicator or It is also possible to use this instead of the first display. Also, as in the case of the example in Figure 7, if there is a time slot or time slot number that is not used for communication between general communication nodes, that number can be used instead of an empty display or a packet head display. It is.

Still another method for identifying mixed packets is to allocate unique and different numbers to each mixed packet and write the numbers in the mixed packet identification section PID. One method is to assign a unique number to each combination of transmitting and receiving communication nodes, and the other is to monitor the communication loop for a predetermined period of time when mixed packet transmission and reception actually starts between specific communication nodes. However, there is a method of selecting an unused number and making it a unique number. A typical example of the former is a method in which the unique number is the destination communication node address and the source communication node address arranged as they are.

On the other hand, it is also possible to assign a number to each combination of sending and receiving communication nodes independently of the communication node address, which reduces the bit width of the PID by about 1 bit compared to the case where addresses are arranged as is. be able to.

In these methods.

Since the PID directly or indirectly includes information regarding the destination communication node address and the source communication node address, among the components of the mixed packet or single packet shown in FIGS. 4 and 5, Communication node/
Addresses D and S can be omitted.

On the other hand, in the method of selecting an empty number that does not appear on one communication loop at the start of mixed packet transmission and using it as a unique number,
First, there is a procedure to declare to other communication nodes the relationship between the unique number and the sending/receiving communication node address of the mixed packet, and a procedure to prevent duplication of the unique number with similar declarations from other communication nodes. However, once the declaration is successful, it is possible to identify mixed packets only by their unique number. Therefore, in this case as well, addresses D and S can be omitted among the components of the mixed packet. Even in the case of these systems, it is possible to provide a specific unique number and use it in place of the vacancy display, thereby omitting the vacancy display section I/B. Furthermore, since the time slot in which each unique number first appears in the PID when monitoring from the beginning of the frame is the first time slot of the corresponding mixed packet, even in these methods, it is not necessary to display the packet beginning display part H. There is no need to provide it.

In addition, when using this method, the mixed packet identification part PID
If it also has an exchange mode display function (for example, PID
1 bit indicating the exchange mode is added within the packet), and the exchange mode display part M (see FIGS. 4 and 5) within the mixed packet or single packet is also unnecessary. In this case, for a single packet for packet exchange, there is no need to be aware of frames in practice, and all you need to do is find an empty tie 18 slot and send out a single packet along with the required mixed packet identifier PID, etc. , control is significantly simplified.

Regardless of the method described above, according to the present invention, each time slot is indicated as empty in some way, and each communication node
- The required number of time slots (including time slots that are used for communication to the node and become vacant at the own node) are selected from the beginning of the communication frame, and each mixed packet is transmitted. Therefore, when the amount of call signals to be sent is large, mixed packets can be sent using all available time slots. In other words, the transmission capacity of the communication loop can be reduced to 100% without distinguishing between circuit-switched signals and packet-switched signals.
It is extremely efficient because it can be used effectively. Moreover, circuit-switched mixed packets can be transmitted every frame without fail. The reason is explained below. However, it is assumed here that calls in each circuit switching mode are full-duplex signals with equal signal speeds in both upstream and downstream directions.

As mentioned above, in the present invention, each communication loop is -
The frame period is configured such that the time required to transmit the frame period is equal to or an integral multiple thereof. Therefore, any time slot within a frame always exists somewhere on the communication loop and circulates between communication nodes as time passes. In other words, it can be thought of as a belt conveyor circulating between communication nodes. Therefore, in each communication node, the time slot addressed to the node that has traveled around the loop and reached the node is released and becomes an empty time slot, so it is always used for mixed packet transmission from the node. It can be used for. In other words, if n time slots are sent to the own node within one frame, there are generally several other empty time slots, so at least n time slots should be used for transmission from the own node. will be possible. Now, for example, when communication nodes A and 8 are about to start sending and receiving circuit-switched mixed packets using one time slot, communication node A monitors the time slots on the communication loop and uses an empty time slot. When one is detected, an attempt is made to send a circuit-switched mixed packet having the configuration shown in FIG. 4 to it. The control signal portion C of this line-switched mixed packet includes an instruction to the node B to use the time slot (1) for the line-switched mixed packet. When node B receives this circuit-switched mixed packet and decodes the instruction, it also detects one free time slot and attempts to send a circuit-switched mixed packet addressed to node A. -7 Generally, the above instructions are decoded after receiving the circuit-switched mixed packet from node A, so that the time slot used by the mixed packet is immediately used to transmit the circuit-switched mixed packet from node B to node A. Therefore, the node B also needs to search for an empty time slot. Thereafter, nodes A and B each attempt to send circuit-switched mixed packets to the other node in one time slot per frame. Then, if either node succeeds in sending out the frame using the mechanism described above, the other node will always be able to send out that frame as well. If such transmission becomes possible for all the frames that exist during one round of the communication loop, then both nodes will continue to send circuit-switched mixed packets of one time slot every frame, and the transmission will be performed all the way around the loop. One time slot per %l frame can be occupied between nodes A and B over the period of time, and as a result, the right to transmit every frame required for one circuit-switched signal can be continuously secured. The increase in the number of time slots required for transmitting and receiving circuit switching signals is also achieved in the same way as above, by the control signal unit C having a meeting between communication nodes, and based on this, both nodes acquire the required number of vacant time slots. Ru. In this way, once the continuous transmission and reception of circuit-switched mixed packets of the required number of time slots is established between nodes A and B, access from other nodes can be obstructed without any special control. It is possible to maintain transmission and reception of circuit-switched signals for each frame between nodes A and 8 without being interrupted. Note that from the start of acquisition of free time slots until the transmission of bidirectional circuit switching signals is established, there is an empty space in the circuit switching mixed packet to be sent.

Note that each communication node generally sends out multiple circuit-switched mixed packets and a single packet-switched packet. It is necessary to send out all mixed packets for packet switching before sending out a single packet for packet switching.

On the other hand, in the packet switching mode, the call signal is efficiently sent out onto the communication loop while waiting in accordance with the number of available time slots as mentioned above.
The line/packet integration method according to the present invention is sufficiently efficient even for calls in which data is transmitted intermittently twice.

In the above description, for the sake of simplicity, it is assumed that each communication node transmits a mixed packet destined for any other node to any one communication loop.

In fact, in the case of a configuration in which a plurality of physical communication loops exist, these may be logically considered as one communication loop and the same method as described above may be applied. Alternatively, the method described above may be employed in which mixed packets are each sent to one of the physical communication loops.

In this case, if the amount of communication between specific communication nodes is large, the necessary amount of communication can be secured by creating multiple mixed packets between those nodes and sending them to separate physical communication loops. The method to do this can also be easily configured.

FIG. 9 and FIG. 1O are schematic diagrams showing one configuration example of a communication node in the present invention. However, this example is a configuration example in which one mixed packet is sent to the same communication loop. In FIG. 9, the communication node 20 uses a mixed packet transmitting/receiving unit 30 for each of the plurality of communication loops 21.
Among the mixed packets sent from each node according to any of the methods described above, the mixed packet addressed to the node itself is taken in from the communication loop, and the mixed packet addressed to other nodes is sent onto the communication loop. The mixed packet assembling/disassembling circuit 31 converts the circuit-switched mode speech signal and the packet-switched mode speech signal coming from the transmission line 10 into circuit-switched mixed packets and packet-switched single packets for each destination communication node. The mixed packets are assembled into two packets and sent to one of the mixed packet transmitting/receiving sections 30, respectively. At the same time, the communication loop 2 is transferred from each mixed packet transmitter/receiver 30.
1, and decomposes it into the original circuit switching mode speech signal and packet switching mode speech signal, and sends them to the destination transmission line 10. The control unit 32 creates/analyzes the control signal part C (see FIG. 4) of the circuit-switched mixed packet to be transmitted and received, processes the speech signal in the packet-switched mode, and controls the entire communication node. The clock unit 33 supplies an operating clock within the communication node synchronized with the unified clock within the exchange, and also supplies various timing signals within the communication node.

Clock synchronization is well known to those skilled in the art, and details will be omitted.

FIG. 10 shows the mixed packet transmitter/receiver 30 in FIG.
FIG. 2 is an explanatory diagram showing a more detailed configuration. In FIG. 10, a signal transmitted from another node on the communication loop 21 is received by a receiving circuit 34, equalized and amplified, and regenerated into a digital signal. The frame synchronization circuit 35 detects the frame phase from the reproduced digital signal sequence, and creates a timing signal for the operation within the mixed packet transmitter/receiver 30 based on it. Based on this timing signal, the reception time slot control circuit monitors the empty/busy indicator I/B, the mixed packet head indicator I (and the mixed packet identifier PID) of each time slot.

Detects the time slot in which a mixed packet addressed to - and sends the contents to the reception buffer memory circuit 37a.
, 37b. A line-switched mixed packet is written to the receive buffer memory circuit 373, and a packet-switched single packet is written to 37b. The mixed packet written to the receive buffer memory is transferred to mixed packet assembly/disassembly circuit 31 in FIG.

On the other hand, the transmission mixed packet transferred from the mixed packet assembly/disassembly circuit 31 is temporarily stored in the transmission buffer memory 138a.

38b, and then transmitted on one communication loop under the control of the transmit-time slot control port, path 39. Mixed packets for circuit switching are stored in the transmission buffer memory circuit 33a, and single packets for packet switching are stored in 3Bb.The reception time slot control circuit 36 detects the time slot in which the mixed packet addressed to its own node exists. At the same time, there is an empty time slot.

The transmitting time slot control circuit 39i is also notified of a time slot in which both mixed packets can be sent. When the mixed packet to be sent exists in the transmitting buffer and far memory circuit 38a%3Bb, the transmission time slot control circuit 39 sends a notification I(therefore, sends the mixed packet to the relevant time slot. , the line-switched mixed packet is sent C ahead of the packet-switched single packet as described above.Furthermore, the empty display section I/B of the relevant time slot and the mixed packet head display section H% Mixed packet, l-identifier PID
Also, write the necessary signals using the method described above.

On the other hand, even if there is a sendable time slot, if there is no mixed packet to be sent, an empty display signal is written in the empty display section I/B of the time slot. P.I.D.
When writing or sending out a mixed packet, etc., the switch 40 selects the insertion side terminal 41 under the control of the sending time slot control circuit 39. Further, for a time slot in use by a mixed packet from another communication node, the switch 40 selects the pass-through terminal 42 and allows the signal sent from the other communication node to pass through as is.

In the delay circuit 43, the reception time slot control circuit 36 analyzes the I/H, H% PID of each time slot, and the transmission time slot control circuit 39 analyzes the I/H, H% PID of each time slot.
B. This is a circuit for compensating for the delay until H%PID is written. The signal selected by the switch 40 is sent out again onto the communication loop 21 by the transmitting circuitry and transmitted to the next communication node.

As described above, according to the present invention, both 5-circuit switching signals and packet switching signals can be handled in a unified manner, and true integration can be realized.

Therefore, there is no need to allocate the transmission capacity of the communication loop to both parties in advance, and the capacity can be dynamically occupied instantaneously as needed, which simplifies control and eliminates the waste that occurs in conventional systems. It is extremely efficient. In addition, once the required amount of time slots is secured between specific nodes, circuit-switched mixed packets can be sent every frame thereafter, so there is no delay variation peculiar to conventional packet-switching methods for one circuit-switched signal. Time transparency is guaranteed. Furthermore, since a mixed packet format is adopted in which a plurality of simultaneous call signals are integrated, the overhead per one call is small, and the amount of call signals per one call that occupies the mixed packet can be reduced. As a result, the so-called packet assembly time can be shortened, and the sending interval of line-switched mixed packets, that is, the frame period, can be shortened, so that the overall transmission delay can be kept small. Furthermore, by providing a mixed packet identification section PID section in each time slot, it is possible to combine as many time slots as necessary for each frame and send out a mixed packet of variable length.
It is possible to provide a highly flexible switching function even for communications with different bands (or speeds) and communications with different traffic characteristics, that is, so-called multi-source traffic.

Therefore, the present invention is extremely effective as a method of integrating line switching/packet switching and realizing various communication services using a single switching device. Furthermore, if the configuration of FIG. 2 is regarded as a local area network, the present invention is similarly applicable to local area networks and has great effects.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional line/packet integration switch, Figure 2 is a block diagram showing the configuration of a line/packet integration switch inferred from a conventional local network system, and Figure 3 is a block diagram showing the configuration of a line/packet integration switch analogous to the conventional local network system. FIG. 4 is an explanatory diagram showing the configuration of a mixed packet for line switching in the present invention, and the fifth factor is the configuration of a single packet for packet switching in accordance with the present invention. FIG. 6 is an explanatory diagram showing the frame structure according to the present invention. FIGS. 7 and a8 are explanatory diagrams showing how to use the frame according to the present invention. FIGS. FIG. 2 is a block diagram showing a configuration example. In the figure, 10. i2.14 is the transmission path, 11 is the distribution switching section, 13 is the circuit switching section, 15 is the packet switching section,
20 is a communication node, 21 is a communication loop, 30 is a mixed packet transmission/reception unit, 31 is a mixed packet assembly/disassembly circuit,
32 is a control unit, the wing is a clock circuit, 34 is a reception circuit, A is a frame synchronization circuit, 36 is a reception time slot control circuit, 37 is a reception buffer memory circuit, 38 is a transmission buffer memory circuit, 39 is a transmission time slot A control circuit, 40 a switch, 43 a delay circuit, and 44 a transmission circuit.

Claims (1)

[Claims] 1. A line/line consisting of a single or multiple communication loops and a plurality of communication nodes that commonly access the communication loops.
In the packet integrated switching circuit network, frames with a fixed time period are provided in the communication loop, and circuit switched signals arriving at the communication node from subscriber terminals or relay lines are classified by destination communication node for each cycle of the frame. , a plurality of circuit-switched signals for the same destination communication node are assembled into one or more circuit-switched mixed packets and transmitted to the communication loop, and packets are exchanged that arrive at the communication node from a subscriber terminal or a relay line. As for the signals, each signal is assembled into a single packet for packet switching and sent to the communication loop, and among the single packets for AT exchange, a mixed packet for line switching and a single packet for packet switching addressed to the own node are found and received. The line/packet integrated switching is characterized in that the received circuit-switched mixed packet and packet-switched single packet are separated into individual circuit-switched signals and packet-switched signals, and sent to a subscriber terminal or a relay line. method. 2. the frame is divided into multiple time slots;
2. The circuit/packet integrated switching system according to claim 1, wherein the circuit-switched mixed packet and the packet-switched single packet are transmitted using a required number of the time slots.