JPS60125022A - Channel selecting device - Google Patents

Abstract

PURPOSE:To improve operativity by providing one digital memory, one microcomputer (MC), and one key matrix respectively so that >=2 channel selecting circuit share them. CONSTITUTION:The memory 3 is stored with all pieces of channel information, and a channel selection button in the key matrix 4 is pressed to allow both channel selecting circuits 14 and 14' to select a channel 1. When the channel selection button is pressed, address information on one channel is outputted from the output terminal (a) of the MC2. This address information is applied to the input terminal of the memory 3 and also applied to decoder drivers 9 and 9' of the circuits 14 and 14'. Simultaneously, a write command signal is applied from the MC2 to the memory 3 through a line (c), and latch input signals are applied to the decoder drivers 9 and 9' of the circuits 14 and 14' through lines (e) and (j), so the address of one channel in the memory 3 is specified and one-channel signals are supplied to display elements 10 and 10' to display ''1''. Then, one-channel information is outputted from the memory 3 to the input terminal (b) of the MC2 and supplied from the MC to DA converting circuits 5 and 5'.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television receiver and a channel selection device used in an integrated television and VTR.

Conventional configurations and their problems Recently, channel selection devices using microcomputers and digital memories have been developed.

FIG. 1 shows the configuration of a conventional example in which there are two channel selection circuits. In FIG. 1, arrows indicate the flow of signals, and some parts of the configuration, such as the power supply and oscillation circuit, are omitted to simplify the explanation.

Since the circuit 12 and the circuit 1' have the same functions and circuit configurations, only the circuit 1 will be explained below. An output terminal a of the microcombeater 2 is connected to an input terminal of a memory 3, an input terminal of a Dm conversion and band latch circuit 6, and an input terminal of a decoder driver 9. The well-known key matrix 4 is composed of a matrix of output terminals a and input terminals of the microcomputer 2, and a channel setting switch, a channel selection switch, etc. are provided therein. Furthermore, writing is performed on the memory 3 from the microcomputer 2 through the line C and the output terminal a, and the contents of the memory 3 are read from the microcomputer 2 through the long sword terminal. The memory 3 is configured not to operate if there is no instruction signal from the microconbeater 2 on this line C.

The DM conversion and band latch circuit 6 outputs an analog signal that becomes a tuning control voltage to the output terminal f, and this
The signal is converted into a DC voltage by the pass filter filter and applied to the variable capacitance diode, which is the tuning element of team 8, for tuning.

In addition, a band switching signal is output from output terminals g and h,
It is applied to tuner 8 via band switch 7. This band switching is, as is well known, switching between UHF and VHF.
This is used to switch between VHF low band and high band. The output of decoder driver 9 is applied to display element 10.

Similarly, the RF signal received by the antenna 12 is amplified by the booster 11 and then divided into two parts, and the respective outputs are fed together to the tuners 8 and 8'.

Next, the operation of this device will be explained. Keyma) Press the channel selection button in the IJ box 4 to select the address you want to store in the memory 3, and select the channel information using the channel setting button. Information is stored in the memory 3 in 16 bits. 8 bits are channel information and band information, and the remaining 8 bits are offset voltage information. The offset voltage information is used to avoid any interference in the channel selected by the previous channel setting button, and is stored in memory to finely adjust the tuning voltage.

Now, assuming that all the information has been stored in the memory 3 through the above-described procedure, a case will be described in which channel 1 is selected by pressing the channel selection button L7 in the key matrix 4. When the channel selection button is pressed, the microcomputer 2 operates to output address information for one channel from the output terminal a of the microcomputer 2. This address information is applied to the input terminal of the memory 3 and also to the input terminal of the decoder driver 9. At the same time, a write command signal is applied from the microcombeater 2 to the memory 3 through line C, and a latch input signal is applied to the decoder driver 9 through line e, so that the address of one channel of the memory 3 is specified, and A signal of one channel is applied to the display element 1o, and "1" is displayed.

Next, one channel information is outputted from the memory 3 to the input terminal of the microcombinator 2. 1 channel information is processed by the microcomputer 2 and applied to the DA conversion and band latch circuit 5 from the output terminal a. At this time, a latch signal is input from the microconbeater 2 via line d, and the 1 channel information is latched. This one-channel information is DA-converted by the DM conversion section of the circuit 6, outputted from the terminal f, passed through the entire low-pass filter 6, and applied to the variable capacitance diode of the tuner 8.

At the same time, band information is output from the g and h terminals, and a signal for selecting the low band of VI (F) is output from the band switch 7.

Note that the channel lock signal 13 input to the key matrix 4' in the circuit 11 causes the channel selection circuit in the circuit 1' to
When used as a channel selection circuit for R, this is a signal that is output when the VTR enters the recording state, and when the channel lock signal 13 is input to the key matrix 4', the recording channels of V and TH are held. Therefore, circuit 1'
Functions to disable the channel setting button and station selection button.

In addition, if the key matrix 4 is provided separately from the main body of the television receiver and the two are connected wirelessly by a remote control signal such as infrared rays, remote control can be performed.

In this way, when such a conventional channel selection device has a circuit 1 and a circuit 1' as shown in FIG.
2', digital memory 3゜3', and key matrix 4,4' have channel setting buttons and station selection buttons, but the digital memory that stores channel information is usually Since channel information is limited, when each channel is selected in each channel selection circuit, the same channel information is often stored at the same address in the memory, so the channel setting button in each key matrix is In many cases, the channel selection buttons also have the same function, which is uneconomical in terms of memory and the number of key switches. It was inconvenient.

OBJECTS OF THE INVENTION The present invention provides a channel selection device that solves these conventional problems, simplifies the circuit configuration, reduces costs, and has good operability.

Structure of the Invention The present invention is based on the present invention, in which the digital memory for storing tuning information is shared by two or more tuning circuits so that there is only one, and the microcomputer and key matrix that were conventionally in each tuning circuit are replaced. In the channel selection circuit 1', the signal supply line is shared, thereby simplifying the configuration.

DESCRIPTION OF THE EMBODIMENTS A channel selection device according to an embodiment of the present invention will be described below with reference to FIG. 2 of the drawings.

Compared to the conventional example shown in FIG. 1, the device shown in FIG. Two latch signals are added to be supplied to 14', and the signal supply line a is shared.

Next, the operation will be explained. It is assumed that all channel information is stored in the memory 3" shared by the circuit 145 and the circuit 14', and when the channel selection button in the key matrix 4" is pressed and both the circuit 149 and the circuit 14' select channel 1. explain. It is assumed that the channel lock signal 13 is not input to the key matrix 4''.

First, when the channel selection button is pressed, the address information of one channel is outputted from the output terminal -a of the microcomputer 2''.This address information is applied to the input terminal of the memory 3'', and the decoder of the circuit Also added to driver 9 and decoder driver 9' of circuit 14'. At the same time, a write command signal is sent from the microcomputer 2'' to the memory 3 through line ci, and a latch input signal is sent to the decoder drivers 9 and 9 of circuits 14 and 14' through lines e and j, respectively.
Since the address of one channel of the memory 3'' is specified, one channel of signals is applied to each of the display elements 10 and 10', and a ``1'' is displayed.

Next, one channel information is output from the memory 3'' to the input terminal of the microcomputer 2.

1 channel information is processed in the microcomputer 2'' and sent from output terminal a to circuits 14 and 14', respectively.
It is added to the ODA conversion and band latch circuits 5 and 6'. At this time, latch signals are input from the microcomputer 2'' through lines d and i, respectively, and one channel information is latched.

Next, channel lock signal 1 is sent to key matrix 4″.
The channel selection operation when 3 is input will be explained.

If you try to select channel 5 only on the circuit 14 side,
When the channel selection button is pressed, the address information of channel 5 is outputted from the output terminal a of the microconverter 2'', and this address information is added to the input terminal of the memory 3'' and the decoder driver 9. ,9“
It can also be added to

At the same time, Ikrocon Beater 2 Yoreline C
The write command signal is sent to the memory 3'', and the latch input signal is sent to the decoder driver 9 of the circuit 14 through line e.
Therefore, the display element 1o displays "5".

By the way, since no latch signal is output to line j, circuit 1
4' decoder driver 9' does not operate and display element 1
o/ remains displayed as "1".

Next, 5 channel information is outputted from the memory 3'' to the input terminal of the microcomputer 2.

5 channel information is processed by the microcomputer 2'' and applied to the DA conversion and band latch circuit 5 of the circuit 14 from the output terminal a. At this time, a latch signal is input from the microcomputer 2' via line di,
Channel information is latched. By the way, since no latch signal is output to line 1, the circuit 14' remains the original one channel.

Furthermore, by replacing the latch signal e mentioned above with j and similarly replacing d with 1, the channel of only the circuit 14' can be changed.

Effects of the Invention As described above, according to the present invention, it is possible to share the digital memory, thereby simplifying the key switch, reducing the number of soft steps of the microcomputer, and reducing the installation adjustment by setting two channels simultaneously. It is now possible to tune two or more channels at the same time, and one channel can be tuned individually.
This is made possible by the use of one channel selection button, and a channel selection device capable of selecting two or more channels with a simple configuration and good operability can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a conventional channel selection device, and FIG. 2 is a block diagram of a channel selection device according to an embodiment of the present invention. 2"...Microcomputer, 3"...
...Digital memory, 4"°°...Key matrix, 5,5'...DAfi conversion and band latch circuit, 6,6'...Low pass filter, 7
,7'...Band switch,8.8'...
...Children, 9,9' ...Decoder driver, 10,10' ...Display element, 11.
...Booster, 12...Antenna, 13
Channel lock signal for..., 14, 14' town-
・Tuition selection circuit.

Claims (1)

[Claims] 2. Select a predetermined channel based on a memory that stores channel selection information and the channel selection information read from this memory.
What is claimed is: 1. A channel selection device comprising at least one set of channel selection circuits, wherein the channel selection information of each channel selection circuit is read out from the one memory using different address information.