JPS60117810A - Equalizer - Google Patents

Equalizer

Info

Publication number
JPS60117810A
JPS60117810A JP22486883A JP22486883A JPS60117810A JP S60117810 A JPS60117810 A JP S60117810A JP 22486883 A JP22486883 A JP 22486883A JP 22486883 A JP22486883 A JP 22486883A JP S60117810 A JPS60117810 A JP S60117810A
Authority
JP
Japan
Prior art keywords
amplifier
input terminal
resistor
time constant
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22486883A
Other languages
Japanese (ja)
Other versions
JPH0467367B2 (en
Inventor
Noriaki Katsumata
憲明 勝俣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP22486883A priority Critical patent/JPS60117810A/en
Publication of JPS60117810A publication Critical patent/JPS60117810A/en
Publication of JPH0467367B2 publication Critical patent/JPH0467367B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/04Control of transmission; Equalising
    • H04B3/14Control of transmission; Equalising characterised by the equalising network used
    • H04B3/143Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers
    • H04B3/144Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers fixed equalizers

Abstract

PURPOSE:To secure the optional frequency characteristics and to facilitate easy handling with good reproducibility for an equalizer, by constituting a circuit with capacitors, resistances and an amplifier so that the pole on an S plane can be set on both a real axis and an imaginary axis. CONSTITUTION:For an amplifier A1, the 1st time constant circuit where a resistance R1 and a capacitor C1 are connected in parallel to each other and the 2nd time constant circuit containing a resistance R4 and a capacitor C4 connected in parallel to each other are connected in series between a non-inverse input terminal (+) and a signal input terminal IN. Furthermore a resistance R5 is set at a reference potential from a non-inverse input terminal. While the positive feedback is applied to a serial junctures of both constant circuits from an output terminal OUT of the amplifier A1 through a resistance R2. In addition, a resistance R7 is provided to an inverse input terminal (-) from the output terminal together with a resistance R6 provided between the inverse input terminal and the reference potential. In such a way, the transmission characteristics which could not be attained by a circuit consisting of a CR only can be obtained by applying the positive feedback to the serial junctures of both time constant circuits.

Description

【発明の詳細な説明】 本発明は伝送設備のうちのイコライザに関する。[Detailed description of the invention] The present invention relates to an equalizer in transmission equipment.

銅ケーブルなどを伝送路とする有線通信では、伝送路の
周波数特性による伝送波形歪みを補償するために中継器
等にイコライザ(等化器)が設けられ、伝送ケーブルの
周波数特性と逆の周波数特性を持つイコライザとされる
In wired communications using transmission lines such as copper cables, equalizers are installed in repeaters to compensate for transmission waveform distortion due to the frequency characteristics of the transmission line. It is considered to be an equalizer with

従来のイコライザは、伝送信号帯域が音声帯域を除く高
周波の場合にはコイルとコンデンサによって所期の周波
数特性を得る構成にされている。
Conventional equalizers are configured to obtain desired frequency characteristics using a coil and a capacitor when the transmission signal band is a high frequency excluding the audio band.

この従来のイコライザでは、コイルが持つ抵抗分のため
高いQ(選択度)の周波数特性を得るのが難しいしコイ
ル定数に一致したコイルを得ることや磁気シールドを必
要とするなど取扱いが面倒で高価なものになる。
With this conventional equalizer, it is difficult to obtain frequency characteristics with high Q (selectivity) due to the resistance of the coil, and it is difficult to handle and expensive as it requires obtaining a coil that matches the coil constant and magnetic shielding. Become something.

本発明の目的は、任意周波数特性を持たせて再現性良く
しかも取扱いを容易にしたイコライザを提供するにある
An object of the present invention is to provide an equalizer that has arbitrary frequency characteristics, has good reproducibility, and is easy to handle.

本発明は、コンデンサと抵抗と高利得増幅器によって構
成し、S平面における極を実軸上にも虚 −軸上にも設
定し得る回路構成を特徴とする。
The present invention is characterized by a circuit configuration that includes a capacitor, a resistor, and a high gain amplifier, and can set the pole in the S plane both on the real axis and on the imaginary axis.

第1図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing one embodiment of the present invention.

増幅器A−1は入力インピーダンスが非常に大きく出力
インピーダンスが非常に小さい高利得増幅器にされ、例
えば演算増幅器が使用される。増幅器A1はその非反転
入力端子(+)と信号入力端子(IN )間に、抵抗R
1とコンデンサC1を並列接続した第1の時定数回路と
、抵抗R4とコンデンサC4を並列接続した第2の時定
数回路が直列接続で設けられ、さらに非反転入力端子か
ら基準電位に抵抗R6が設けられる。また、増幅器A1
の出力端子(信号出力端子OUT )から抵抗R2を通
して上記両時定数回路の直列接続点に正帰還が掛けられ
、さらに出力端子から反転入力端子(−)に抵抗R7が
設けられ、該反転入力端子と基準電位間に抵抗R6が設
けられる。
The amplifier A-1 is a high gain amplifier with a very large input impedance and a very small output impedance, for example, an operational amplifier is used. Amplifier A1 has a resistor R between its non-inverting input terminal (+) and signal input terminal (IN).
A first time constant circuit has a resistor R4 and a capacitor C1 connected in parallel, and a second time constant circuit has a resistor R4 and a capacitor C4 connected in parallel. provided. Also, amplifier A1
Positive feedback is applied from the output terminal (signal output terminal OUT) to the series connection point of both time constant circuits through the resistor R2, and further, a resistor R7 is provided from the output terminal to the inverting input terminal (-), and the inverting input terminal A resistor R6 is provided between the reference potential and the reference potential.

このように、両時定数回路の直列接続点に正のフィード
バックをかけることにより、CRのみの回路では実現で
きない伝達特性を得ることを特徴とする。本実施例にお
ける伝達関数は入力信号Vin に対する出力信号Vo
ut として次の(1)式になる。
In this way, by applying positive feedback to the series connection point of both time constant circuits, a characteristic of the present invention is that transfer characteristics that cannot be achieved with a circuit consisting only of CRs can be obtained. The transfer function in this embodiment is the output signal Vo for the input signal Vin.
The following equation (1) is obtained as ut.

±5Gs(CI+C4)+5Ca(G1+(1−K)G
2)+S”CsC4・・・・・・・・・・・・(1) ここで、Kは増幅器A1の設定利得であってに−(1+
R7/R6)、G1−G5は夫々1/R1〜1/R5、
S=juJ この(1)式からも明らかなように、S平面における極
は各定数の値によって実軸上にも虚軸上にも存在させう
るもので、通常のCRのみの回路ではS平面における極
、零点共に実軸上にしか存在し得ないものと比較して応
答の時間に対する変化の形を決める極を任意に設定して
任意の周波数特性を得ることができる。そして、コイル
を不要にするため、コイルと違ってコンデンサは高性能
のものが容易に得じれるし、小型で磁気シールドも不要
にする。さらに、1つの増幅器とCRのみで構成され、
再現性良い回路になるし、低出力インピーダンスになっ
て縦続接続を容易にして複雑な特性も藺単に実現できる
±5Gs(CI+C4)+5Ca(G1+(1-K)G
2) +S”CsC4・・・・・・・・・・・・(1) Here, K is the set gain of amplifier A1, and −(1+
R7/R6), G1-G5 are respectively 1/R1 to 1/R5,
S=juJ As is clear from equation (1), the pole in the S plane can exist on the real axis or the imaginary axis depending on the value of each constant, and in a normal CR-only circuit, the pole in the S plane By comparing poles and zeros in which can only exist on the real axis, it is possible to obtain arbitrary frequency characteristics by arbitrarily setting the poles that determine the form of change in response over time. And since a coil is not required, a capacitor with high performance can be obtained easily, and unlike a coil, a capacitor is small and does not require a magnetic shield. Furthermore, it is composed of only one amplifier and CR,
This results in a circuit with good reproducibility, low output impedance, easy cascade connections, and the ability to easily realize complex characteristics.

第2図は本発明の他の実施例を示す。同図において、高
利得増幅器A1の非反転入力端子と信号入力端子(IN
)間にコンデンサC1と抵抗R1の第1の並列回路が設
けられ、さらに非反転入力端子にはコンデンサC2と抵
抗R2の並列回路の一端が接続され、その他端が抵抗R
aを介して基準電位に接続され、さらに抵抗R3との接
続点と増幅器A1の出力端子(OUT ) との間に抵
抗R4が接続される。また、増幅器A1の反転入力端子
と出力端子間に抵抗R6が設けられ、さらに反転入力端
子と基準電位間に抵抗R5が設げられる。
FIG. 2 shows another embodiment of the invention. In the figure, the non-inverting input terminal and signal input terminal (IN
), a first parallel circuit of a capacitor C1 and a resistor R1 is provided between the capacitor C1 and a resistor R1, one end of the parallel circuit of a capacitor C2 and a resistor R2 is connected to the non-inverting input terminal, and the other end is connected to a resistor R.
A is connected to the reference potential via a, and a resistor R4 is further connected between the connection point with the resistor R3 and the output terminal (OUT) of the amplifier A1. Further, a resistor R6 is provided between the inverting input terminal and the output terminal of the amplifier A1, and a resistor R5 is further provided between the inverting input terminal and the reference potential.

こうした構成においてもS平面における極を各定数の値
によって実軸上にも虚軸上にも存在させ得るもので、第
1図の場合と同様の作用効果を得ることができる。本実
施例の伝達関数はとなる0但し、ω0IQ01 ω0′
、QoIは次のとおり。
Even in this configuration, the pole in the S plane can be made to exist on the real axis or the imaginary axis depending on the value of each constant, and the same effect as in the case of FIG. 1 can be obtained. The transfer function of this example is 0, where ω0IQ01 ω0'
, the QoI is as follows.

十CIRt(RzR4−1−R3R4+2RzRs≠K
R2R3)第3図は本発明の他の実施例を示す。高利得
増幅器A1の反転入力端子には信号入力端子との間にC
IRIとCsR5の2つの時定数回路の直列回路が設け
られ、その直列接続点と基準電位間に抵抗R2が設けら
れ、さらに直列接続点と増幅器A1の出−力端子間にコ
ンデンサC4が設けられる。増幅器A1の出力端子と反
転入力端子間に抵抗1taが設けられ、非反転入力端子
は基準電位に接続される。
10CIRt(RzR4-1-R3R4+2RzRs≠K
R2R3) Figure 3 shows another embodiment of the invention. The inverting input terminal of high gain amplifier A1 has a C between it and the signal input terminal.
A series circuit of two time constant circuits, IRI and CsR5, is provided, a resistor R2 is provided between the series connection point and the reference potential, and a capacitor C4 is provided between the series connection point and the output terminal of the amplifier A1. . A resistor 1ta is provided between the output terminal and the inverting input terminal of the amplifier A1, and the non-inverting input terminal is connected to a reference potential.

本実施例は負帰還になるが、前述までの実施例と同様に
5sfL面の極を実軸上及び虚軸上に設屋しうる。また
入出力位相は反転する。本実施例の伝達関数は次式とな
る。
Although this embodiment uses negative feedback, the poles of the 5sfL plane can be placed on the real axis and on the imaginary axis as in the previous embodiments. Also, the input and output phases are reversed. The transfer function of this embodiment is expressed by the following equation.

以上のとおり、本発明によるイコライザは、増幅器とコ
ンデンサと抵抗によって任意周波数特性のものを得るた
め、取扱いを容易にして再現性良いなど種々の効果を奏
し、特にS平面で極を実軸上と虚軸上の何れにも認定可
能にする効果がある。
As described above, since the equalizer according to the present invention obtains arbitrary frequency characteristics using an amplifier, a capacitor, and a resistor, it has various effects such as easy handling and good reproducibility. This has the effect of allowing recognition anywhere on the imaginary axis.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図及び第3図は本発明の各実施例を示す回
路図である。
FIGS. 1, 2, and 3 are circuit diagrams showing each embodiment of the present invention.

Claims (3)

【特許請求の範囲】[Claims] (1)高入力インピーダンスで低出力インピーダンスの
高利得増幅器と、この増幅器の非反転入力端子と信号入
力端子間に設けられる抵抗と;ンデンサ並列の第1の時
定数回路と第2の時定数回路の直列接続回路と、上記増
幅器の非反転入力端子と基準電位間に設けられる第1の
抵抗と、上記増幅器の出力端子と上記第1と第2の時定
数回路の接続点との間に設けられる第2の抵抗と、上記
増幅器の出力端子と該増幅器の反転入力端子との間に設
けられる#g3の抵抗と、上記増幅器の反転入力端子と
基準電位間に設けられる第4の抵抗とからなるイコライ
ザ。
(1) A high gain amplifier with high input impedance and low output impedance; a resistor provided between the non-inverting input terminal and the signal input terminal of this amplifier; a first time constant circuit and a second time constant circuit in parallel with the capacitor; a series connection circuit, a first resistor provided between the non-inverting input terminal of the amplifier and a reference potential, and a connection point between the output terminal of the amplifier and the first and second time constant circuits. a #g3 resistor provided between the output terminal of the amplifier and the inverting input terminal of the amplifier, and a fourth resistor provided between the inverting input terminal of the amplifier and the reference potential. An equalizer.
(2) 高入力インピーダンスで低出力インピーダンス
の高利得増幅器と、この増幅器の非反転入力端子と信号
入力端子間に設ゆられる抵抗とコンデンサ並列の第1の
時定数回路と、上記増幅器の非反転入力端子に一端が接
続され他端が第1の抵抗を介して基準電位に接続される
抵抗とコンデンサ豆列の第2の時定数回路と、上記増幅
器の出力端子と上記第2の時定数回路と籐1の抵抗の接
続点との間に設けられる第2の抵抗と、上記増幅器の出
力端子と該増幅器の反転入力端子との間に設けられる第
3の抵抗と、上記増幅器の反転入力端子と基準電位間に
設けられる第4の抵抗とからなるイコライザ。
(2) A high-gain amplifier with high input impedance and low output impedance, a first time constant circuit in which a resistor and a capacitor are connected in parallel, and which are installed between the non-inverting input terminal and the signal input terminal of this amplifier, and the non-inverting circuit of the above-mentioned amplifier. a second time constant circuit of a resistor and a capacitor string, one end of which is connected to the input terminal and the other end of which is connected to a reference potential via a first resistor; and an output terminal of the amplifier and the second time constant circuit. and a connection point of the resistor of rattan 1; a third resistor provided between the output terminal of the amplifier and the inverting input terminal of the amplifier; and a third resistor provided between the output terminal of the amplifier and the inverting input terminal of the amplifier. and a fourth resistor provided between the reference potential and the reference potential.
(3) 非反転入力端子が基準電位にされ高入力インビ
ーダンスで低出力インピーダンスの高利得増幅器と、こ
の増幅器の反転入力端子と信号入力端子間に設けられる
抵抗とコンデンザ並列の第1の時定数回路と第2の時定
数回路の直列接続回路と、上記第1と第2の時定数回路
の接続点と基準電位との間に設けられる第1の抵抗と、
上記第1と第2の時定数回路の接続点と上記増幅器の出
力端子間に設けられるコンデンサと、上記増幅器の出力
端子と非反転入力端子との間に設けられる第2の抵抗と
からなるイコライザ。
(3) A first case in which a high gain amplifier with a non-inverting input terminal set to a reference potential, high input impedance and low output impedance, and a parallel resistor and capacitor provided between the inverting input terminal and the signal input terminal of this amplifier. a series connection circuit of a constant circuit and a second time constant circuit; a first resistor provided between a connection point of the first and second time constant circuits and a reference potential;
An equalizer comprising a capacitor provided between the connection point of the first and second time constant circuits and the output terminal of the amplifier, and a second resistor provided between the output terminal of the amplifier and the non-inverting input terminal. .
JP22486883A 1983-11-29 1983-11-29 Equalizer Granted JPS60117810A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22486883A JPS60117810A (en) 1983-11-29 1983-11-29 Equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22486883A JPS60117810A (en) 1983-11-29 1983-11-29 Equalizer

Publications (2)

Publication Number Publication Date
JPS60117810A true JPS60117810A (en) 1985-06-25
JPH0467367B2 JPH0467367B2 (en) 1992-10-28

Family

ID=16820423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22486883A Granted JPS60117810A (en) 1983-11-29 1983-11-29 Equalizer

Country Status (1)

Country Link
JP (1) JPS60117810A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6225503A (en) * 1985-07-26 1987-02-03 Matsushita Electric Ind Co Ltd Signal emphasis device
JP2005235516A (en) * 2004-02-18 2005-09-02 Fujitsu Component Ltd Connector for balanced transmission and cable equipped with the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6225503A (en) * 1985-07-26 1987-02-03 Matsushita Electric Ind Co Ltd Signal emphasis device
JP2005235516A (en) * 2004-02-18 2005-09-02 Fujitsu Component Ltd Connector for balanced transmission and cable equipped with the same

Also Published As

Publication number Publication date
JPH0467367B2 (en) 1992-10-28

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