JPS60113509A - Differential amplifier - Google Patents

Abstract

PURPOSE:To attain both high-gain and high-frequency characteristics at a time and to obtain a high input impedance by combining a differential amplifier containing a pair of FETs and a pair of bipolar transistors. CONSTITUTION:The input signals are applied to gate electrodes of FETs Q1 and Q2, and a constant current source 7 is connected to source electrodes of those paired FETs Q1 and Q2 via resistances 5 and 6. Then the base voltage of a pair of bipolar transistors Q3 and Q4 are controlled via the resistances 5 and 6. The drain electrodes of the Q1 and Q2 are connected to collectors of the Q3 and Q4 in an X-shaped formation. When a differential amplifier has the optimum frequency characteristics, the corner frequency and the voltage gain are set at about 160MHz and at +6dB respectively. Thus the input offset voltage can be reduced down to about 1/2 for all comparators.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The invention relates to differential amplifiers, particularly field effect transistors.
The present invention relates to a differential amplifier using an input means as an input means.

[Background of the invention]

The performance of semiconductor circuits continues to improve year by year.

Operational amplifiers and comparators are commonly used circuits, and it goes without saying that there is a strong desire to improve the performance of these types of circuits.

Since operational amplifiers and comparators require high input impedance, differential amplifiers using FETs as input means are often used in input circuits. In this case, the performance of this differential amplifier is determined by the characteristics related to the input of the operational amplifier, that is, the input offset voltage.

Since it directly affects frequency characteristics, its improvement is increasingly desired.

FIG. 1 shows an example of a circuit of a conventional differential amplifier applied to an operational amplifier or the like. In this figure, the differential amplifier can be roughly rewritten as shown in FIG.

Here, Ql and Q2 are differential amplifier circuits using PET, and Q3. Q4 is an active load circuit, Q5 is a voltage amplifier, and Q6 + Q7 is an output amplifier.

In such a configuration, the input offset voltage is
It is determined by the T differential amplifier circuit. That is, if N stages of amplifiers are connected in cascade, the input offset voltage of each stage is set to sV61*V(+21...VoN) from the input side, and the voltage gain is set to A□+A2...AM in order, then the total O 7 set voltage V. is Vo=V, 10V2/A□+V3
/A, expressed as ・A2・O. Here, if the gain of each stage, especially the first stage's gain, is sufficiently high, vo+Vo□, and further V. If □ is small, vo, that is, the input offset voltage of the entire circuit can be made small. Therefore, it is desirable that the FET input differential amplifier circuit used in the first stage has a small input offset voltage and a high gain.

In the circuit shown in Fig. 2, a monolithic FET is used in the FET differential amplifier circuit to reduce the onoset voltage, and the load is an active load using a current mirror.
In other words, a high gain is obtained by using a high impedance load.

In order to increase the speed of operational amplifiers, etc., it is necessary that the first stage amplifier has good frequency characteristics.

Generally, the corner frequency of cascaded amplifiers, that is, the frequency at which the frequency characteristic is 13 dB, is determined by the amplifier with the worst frequency characteristic among the amplifiers used in each stage. Therefore, in order to increase the speed of operational amplifiers and the like, it is first necessary that the frequency characteristics of the FET input differential amplifier circuit used in the input stage be good. Further, when used with negative feedback like an operational amplifier, oscillation occurs when the phase rotation of the amplifier reaches 180 degrees within a frequency band where the loop gain in the negative feedback path is 1 or more. For this reason, the corner frequencies, or balls, of the amplifiers that are cascaded in multiple stages to form an operational amplifier are not preferably close in frequency to each other, but are preferably far apart from each other.

In the circuit shown in FIG. 2, transistor Q5 serves as an amplifier that generates a major portion of the gain of an operational amplifier or the like. Generally, the corner frequencies of other amplifiers are designed to be much higher than this corner frequency to eliminate the possibility of oscillation. The frequency characteristics of the circuit shown in Figure 1 are as follows:
As shown in the figure, the characteristics above the corner frequency are approximately -6
Since it is dB10ct, it can be seen that the corner frequency is determined by one voltage amplifier. For the above reasons as well, it is necessary that the FET input differential amplifier has good frequency characteristics.

In the l+'ET differential amplifier shown in FIG. 2, the following is a method for improving the corner frequency.

There is a so-called improvement method using an element that uses a good frequency characteristic for F E'1', and a so-called circuit method that reduces the load resistance. The upper operating frequency of the FET is the input fi
C15s by tciss and transconductance gin
It can be evaluated using the time constant of /gln as an index,
Using an element with a small index is a method for improving the characteristics of the former element. On the other hand, the latter circuit improvement method is based on the load impedance tL and the output capacitance Co of the FET.
55 forms a time constant ratio, .Co55, which operates as a low-pass filter. Therefore, by reducing the load impedance 9, the corner frequency can be increased to the characteristic limit of the I, T E II+ element. To achieve this, the relationship between the input and output time constants should be l'LLCoss≦C157gm, but since the FET0 input and output capacitances are generally the same, this condition is gm≦1. Here, the voltage gain AV of the FET differential amplifier is AV=gm几, so AV≦1, and if we try to make the frequency characteristics the best, the voltage gain is 1
The situation is that it is below that level, that is, it is attenuated.

As described above, according to the prior art, in order to realize an operational amplifier with good characteristics, that is, an operational amplifier with low input offset voltage and good frequency characteristics.

An l"ET large input differential amplifier with high gain and good frequency characteristics is required. However, in order to improve the gain, it is necessary to increase the load impedance, but in order to improve the frequency characteristics, this is necessary. It becomes necessary to lower the value, and the two demands conflict with each other.

One way to simultaneously improve both of these problems is to increase the mutual conductance gin of the FET used in the differential amplifier, but due to the nature of semiconductors, this means that the input/output capacitance of the FET0 increases. In other words, this is
This results in a decrease in input impedance, making it unsuitable for operational amplifiers that require high input impedance.

Therefore, the above FE aiming at high input impedance
According to the prior art of the T-input differential amplifier, the gain is set at
Moreover, it has the disadvantage that it cannot simultaneously satisfy two characteristics: a high corner frequency.

[Purpose of the invention]

Therefore, an object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to provide a differential amplifier that simultaneously achieves both high gain and high frequency characteristics, thereby providing a high input impedance. .

[Summary of the invention]

Thus, the present invention is realized in a differential amplifier having a pair of FE'l' each having an input signal applied to its gate electrode and an output signal obtained from its drain electrode.

That is, the source electrodes of the pair of FETs are connected to a constant current source via a resistor, and the base voltage of the pair of bipolar transistors is controlled via this resistor.
It is constructed by cross-connecting the drain electrode of an ET and the collector of a bipolar transistor.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 shows an example of a circuit in which the differential amplifier according to the present invention is applied to a comparator. As shown in the figure, this circuit includes a bipolar transistor comparator and a FET input preamplifier (dotted chain line in the figure).
The aim is to realize a high-speed comparator with high input impedance.

That is, the drain electrodes of PET Qll Q2 and the collector electrodes of bipolar transistors Q31 and Q4 are connected to the power supply +Vcc via resistors 9 and 10, respectively. This FET Q□IQ20 source electrode is connected to the bipolar transistor Q31, respectively.
It is connected to the base electrode of Q4 and to the common constant current source 7 via a resistor 5.6. Also, bipolar transistor Q3. The emitter electrode of Q4 is connected to a common constant current source 8. In such a configuration, FETQ
The gate electrodes of li"ETQl and Q2 serve as input terminals to which input signals are applied, and the drain electrodes of li"ETQl and Q2 serve as output terminals.

The output of the differential amplifier indicated by the dashed line, that is, FETQl,
The drain electrode of Q2 is, for example, an iC controller (later 1).
1 input. Then, ■C conno (rater 1
The output of transistor Q5. The signal is led to the output terminal through a level shift circuit of the output interface constituted by Q6.

If the frequency characteristics of a differential amplifier configured in this way are optimized, the corner frequency will be approximately 160 MI (z.

The voltage gain was approximately doubled, ie, +6 dB, and compared to the circuit according to the prior art, the gain could be improved to 6.4 times without substantially lowering the corner frequency.

It should be noted that monolithic dual denomination devices were used for both pErl+ and the Ibora transistor.

The frequency characteristics of both circuits are shown in FIG. In this figure, the characteristic according to this embodiment is indicated by a, and the characteristic according to the conventional technique is indicated by b. By using the FET input differential amplifier according to this embodiment, first, the input offset voltage of the entire controller circuit could be reduced to about 1/2.This is because the voltage gain was improved, and the subsequent circuit This is due to the fact that the influence has disappeared.

Next, the overdrive characteristics of the entire comparator circuit could be improved as shown in FIG.

In this figure, a shows the characteristics according to this embodiment, and b shows the characteristics according to the prior art. In other words, this characteristic is better if the inflection part is steeper, the horizontal part on the right side is horizontal, and the vertical part on the left side is closer to vertical.
This means high-speed voltage comparison operation of input waveforms. As shown in figure a, the characteristics of the comparator can be improved by using the circuit of this embodiment. This is because the gain has been improved with almost no decrease in the corner frequency of the input section.
That is, this is due to an increase in the original bandwidth product.

The FET input differential amplifier according to this embodiment is 1i”ET
A resistor is inserted into the pair of source electrodes, a voltage is supplied from the source electrodes to the bipolar transistor pair, and the drain and collector are commonly connected to form one differential amplifier.

Since the voltage gain of the source output of this FET is close to 1'il, a voltage approximately equal to the input signal voltage is input to the bipolar transistor pair. Since the voltage amplification factor of the transistor is larger than that of fi'ET, the gain of this circuit is even higher. 1 for input! Since 'E'l' is used, the human power impedance is large. As shown in FIG. 7, this input/output characteristic is the sum of the characteristics of the bipolar transistor and the I'ET.

In a circuit using only 'E'1' according to the prior art, the voltage gain AV is gl11⇠. In this example J:
In this circuit, considering the input impedance of the bipolar transistor as P; AV=gm(1+1ife/(1+0.026
hfe°gm/io) )tonashi, here 0.026h
Since it is easy to make the term fe-gm/I smaller than IIfe, the gain of the circuit increases by this amount. Here ■. are the emitter currents of the two bipolar transistors. At this time, since the collector output capacitance of the bipolar transistor is small, the capacitance connected to the load resistance to form a low-pass filter is determined only by the FET, and the load resistance is the same value as in the case of only the ET. Therefore, regarding the gain, the above considerations can be realized and a high corner frequency can be maintained.

The circuit according to this embodiment has properties suitable for a comparator, and the voltage applied to the input terminal is allowed up to the breakdown voltage of the FET, and like a bipolar transistor differential amplifier, the voltage applied to the input terminal is allowed to exceed the base-emitter reverse breakdown voltage of 3. There is no limit to ~6■. This is due to the fact that the FETs are operated differentially through resistors.

Furthermore, when it is desired to realize improved limiter characteristics with the circuit according to this embodiment, the drain of the FET can be directly connected to the power supply, and the output can be taken out only from the collector of the bipolar transistor.

At this time, the input/output characteristics become node clip.

Since the collector capacitance of the transistor is small, the load resistance value can be increased to obtain the same corner frequency, and the voltage gain can be further increased. The above example focuses on the conditions that give the best frequency characteristics, but the same approach can be taken to focus on high gain and improve the frequency characteristics at that time. Of course, it is possible to do so.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to obtain a differential amplifier that simultaneously satisfies high gain and high frequency characteristics, and thus still has input impedance.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a common example of a differential amplifier according to the prior art, and Fig. 2 is a circuit diagram showing the main seven points to explain the operating principle of Fig. 1.
3 is a diagram showing the frequency characteristics of a conventional differential amplifier, FIG. 4 is a circuit diagram showing an application example of a differential amplifier according to an embodiment of the present invention, and FIG. 5 is a diagram showing the frequency characteristics of a conventional differential amplifier. A diagram showing a comparison of the frequency truncated characteristics of the circuit according to the example and the conventional circuit, FIG. 6 is a diagram showing the overdrive characteristics of the circuit according to the present example, and FIG. 7 is a diagram showing the input/output characteristics of the circuit according to the present example. It is a diagram. Q,, Q2...ll'ET% Q31Q4... Bipolar transistor 1st 1 Fig. 3 (3) Far soft) fHz) Fig. 4 ■(( 昂5!,!J 61st Overtry ° Voltage (mV) 70

Claims (1)

[Claims] A differential amplifier having a pair of FETs each having an input signal applied to its gate electrode and receiving an output signal from its drain electrode, the base voltage of which is controlled via a resistor connected to the source electrode of the pair of FETs. What is claimed is: 1. A differential amplifier comprising: a bipolar transistor, the drain electrode of the FET and the collector of the bipolar transistor being cross-connected.