JPS60110122A - Etching method of semiconductor - Google Patents

Etching method of semiconductor

Info

Publication number
JPS60110122A
JPS60110122A JP21743083A JP21743083A JPS60110122A JP S60110122 A JPS60110122 A JP S60110122A JP 21743083 A JP21743083 A JP 21743083A JP 21743083 A JP21743083 A JP 21743083A JP S60110122 A JPS60110122 A JP S60110122A
Authority
JP
Japan
Prior art keywords
gas
plasma
etching
hydrogen
electrical energy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21743083A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Toshiji Hamaya
敏次 浜谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP21743083A priority Critical patent/JPS60110122A/en
Publication of JPS60110122A publication Critical patent/JPS60110122A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02019Chemical etching

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To prevent the generation of other impurity through reaction of internal wall of reaction tube with HF gas not changed to plasma by supplying inactive gas before supplying or after stopping supply of electrical energy for generating plasma. CONSTITUTION:A substrate 1 to be etched is placed on a holder and the substrate inserted to a quartz reaction furnace 2 is heated by a heater from the outside. Plasma is supplied by a high frequency power supply 13 in such a manner that an electrical energy is applied to a pair of mesh type electrodes 3, 3'. The reaction furnace opens respectively the valves 9, 10 with a vacuum pump 11 for the vacuum exhaustion. Thereafter, hydrogen is supplied from 6 and thereby internal pressure of reaction furnace is set to 0.05-3Torr. The valve 14 is then closed, the valve 8 is opened and the HF gas is supplied from 5. Thereafter, an output is applied from the high frequency power supply 13, plasma etching is carried out with the HF gas, the HF gas is stopped and the power supply (electrical energy supply source) is turned OFF. After the reaction tube is brought to the atmospheric condition with hydrogen, the substrate is taken out from the reaction furnace.

Description

【発明の詳細な説明】 本発明は、珪素または炭化珪素を主成分とする半導体の
プラズマ・エツチングを行う方法において、特に弗化水
素(以)肝という)気体を用いることにより、エツチン
グ後に良質な残存物のない表面を得る方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for plasma etching a semiconductor whose main component is silicon or silicon carbide, in particular by using hydrogen fluoride (hereinafter referred to as liver) gas to provide high-quality etching after etching. Concerning a method for obtaining a residue-free surface.

半導体ディバイス作製プロセスにおいて、小型化、高集
積化が進み、プラズマ・エツチングを含むドライ・エツ
チングが重要になってきている。
In semiconductor device manufacturing processes, as miniaturization and higher integration progress, dry etching including plasma etching has become important.

従来、珪素または珪素化合物のプラズマ・エンチングに
は反応性ガスとしてCF9+ CHF3 、 CF、3
11r等のようなハロゲン化炭化水素を用い、それらに
必要に応じて水素、窒素、酸素等の補助ガスを添加して
プラズマ・エツチング・プロセスを行っている。
Conventionally, plasma etching of silicon or silicon compounds uses CF9+ CHF3, CF,3 as a reactive gas.
A plasma etching process is performed using halogenated hydrocarbons such as 11r and adding auxiliary gases such as hydrogen, nitrogen, and oxygen as necessary.

しかし、エツチングされる半導体がアモルファスのごと
き非単結晶または単結晶の珪素または炭化珪素のごとき
珪素を主成分とする半導体にあっては、この中にプラズ
マ・エッチの際同時にC20゜CI、Br等のラジカル
の一部がスパッタされて混入する。しかしこれら混入す
るBr、CIは再結合中心を発生し、またC、Oは絶縁
化をさせてしまう。
However, if the semiconductor to be etched is a non-single-crystal or single-crystal silicon such as amorphous, or a semiconductor whose main component is silicon such as silicon carbide, C20° CI, Br, etc. may be present at the same time during plasma etching. Some of the radicals are sputtered and mixed in. However, these mixed Br and CI generate recombination centers, and C and O cause insulation.

一般にエツチング反応に直接関係していると考えられて
いるのは、プラズマのエネルギにより活性化された弗素
ラジカル(F・)であり、残りの炭素(C)や塩素(C
1)、臭素(Br)等は反応に関与せず、排気されてい
くとされている。しかし、これらのうち炭素は不揮発性
不活性物質であり、反応管壁、電極、試料台および試料
表面に堆積してしまう。堆積する炭素の多くは化学的に
活性であり、一般に C→−4F −) CF。
It is generally believed that fluorine radicals (F) activated by plasma energy are directly related to the etching reaction, and the remaining carbon (C) and chlorine (C)
1) It is said that bromine (Br) and the like do not participate in the reaction and are exhausted. However, among these, carbon is a non-volatile inert substance and is deposited on reaction tube walls, electrodes, sample stands, and sample surfaces. Much of the carbon deposited is chemically active, generally C→-4F-)CF.

または、 C+O→ Co (酸素がある場合) などの反応式で示されるように、即座に取り除かれると
考えるが、それにもかかわらず炭素は堆積し、エツチン
グ後の珪素または炭化珪素化音物を主成分とする半導体
の物性に悪影響を与えることが知られている。
Or, as shown by reaction equations such as C + O → Co (in the presence of oxygen), carbon is thought to be immediately removed, but it is nevertheless deposited and mainly forms silicon or silicon carbide compounds after etching. It is known to have an adverse effect on the physical properties of semiconductors as components.

本発明はC+ CI + Br等の悪性不純物を組成と
して含まないtlFガスを用いてプラズマエツチングを
行い、その前または後工程に水素または不活性ガスを導
入して反応炉内壁その他がプラズマ化していないいわゆ
る肝気体 −反応し、他 の不純物が発生してしまうことを防止することを特徴と
する 特に反応炉が石英においては、プラスマ化しているHF
雰囲気では殆どエツチングされない。しかし他方、プラ
ズマ化されていないいわゆる肝気体とは反応してしまう
ため、この石英中の不純物がエツチングにより放出され
てしまう。かかる反応炉の内壁のエツチングを防ぐため
、水素、窒素または不活性ガスをその前または後工程に
導入することはきわめて重要であった。
The present invention performs plasma etching using tIF gas that does not contain malignant impurities such as C + CI + Br as a composition, and introduces hydrogen or an inert gas in the pre- or post-process to prevent the inner wall of the reactor and other parts from becoming plasma. So-called liver gas - characterized by preventing the reaction and generation of other impurities.Especially when the reactor is quartz, plasma-formed HF
There is almost no etching in the atmosphere. On the other hand, however, since it reacts with so-called liver gas that has not been turned into plasma, impurities in the quartz are released by etching. In order to prevent etching of the inner walls of such reactors, it has been extremely important to introduce hydrogen, nitrogen or an inert gas into the pre- or post-process.

本発明はIIFガスを用いてプラズマエツチングを行う
のであるから、従来問題となっていたエツチングに伴う
C,O,CI、Br等の混入の汚染がまったくなく、良
好なエツチング表面および界面特性が得られる。さらに
エツチング後のIIFガスによる表面汚染を防ぐことが
肝ガスプラズマエツチングに伴う活性表面の汚染防止に
重要であることが判明した。本発明ではプラズマエツチ
ングの前または後工程において、水素、窒素または不活
性気体を反応炉内に導入し、非エツチングプラズマプロ
セスを初めて完成することができ得る利点がある。
Since the present invention performs plasma etching using IIF gas, there is no contamination such as C, O, CI, Br, etc. that accompanies conventional etching, and good etched surface and interface properties can be obtained. It will be done. Furthermore, it has been found that preventing surface contamination by IIF gas after etching is important for preventing contamination of the active surface due to liver gas plasma etching. The present invention has the advantage that hydrogen, nitrogen or an inert gas can be introduced into the reactor in a step before or after plasma etching, thereby completing a non-etching plasma process for the first time.

特にエツチング後の半導体の不活性気体によるクリーニ
ングは重要で、酸素または酸化物を混入させることなく
、窒素、水素、不活性気体は大気圧とすることにより不
純物特に酸化物、炭化物の表面付着のない清浄な半導体
表面を得ることができた。
In particular, it is important to clean the semiconductor with an inert gas after etching. By keeping the nitrogen, hydrogen, and inert gases at atmospheric pressure without mixing oxygen or oxides, there is no possibility that impurities, especially oxides, and carbides will adhere to the surface. A clean semiconductor surface could be obtained.

以下に実施例を示す。Examples are shown below.

実施例1 第3図は本発明に用いたプラズマエツチング装置の概要
を示す。
Example 1 FIG. 3 shows an outline of a plasma etching apparatus used in the present invention.

図面において、エツチングされる基板(1)はホルダ上
に配設され、石英製の反応炉(2)内に挿入した基板は
外側より室温〜300℃例えば100℃にヒータにより
加熱した。プラズマは高周波型flR(13)により1
3.56M1lzの電気エネルギを一対の網状電極(3
)、(3’)に加え供給した。反応炉は真空ポンプ(1
1)によりバルブ(9)、<10)をそれぞれ開けて真
空排気を行い、10″4tor’r以下にした。
In the drawing, a substrate (1) to be etched is placed on a holder, and the substrate inserted into a quartz reactor (2) is heated from the outside to room temperature to 300°C, for example 100°C, by a heater. Plasma is generated by high-frequency flR (13).
Electrical energy of 3.56M1lz is transferred to a pair of mesh electrodes (3
) and (3'). The reactor is equipped with a vacuum pump (1
According to step 1), the valves (9) and <10) were opened to perform vacuum evacuation, and the pressure was reduced to 10"4 tor'r or less.

この後(6)より水素を30cc 7分供給し、反応炉
内の圧力を0.05〜3 torrここでは0.5to
rrとした。次にバルブ(14)を閉じバルブ(8)を
開け(5)よりIIFガスを30cc 7分供給した。
After that, 30 cc of hydrogen was supplied from (6) for 7 minutes, and the pressure inside the reactor was adjusted to 0.05 to 3 torr, here 0.5 torr.
It was set as rr. Next, the valve (14) was closed, the valve (8) was opened, and 30 cc of IIF gas was supplied from (5) for 7 minutes.

その後高周波電源(13)より40Wの出力を加え、I
IFガスでプラズマエツチングを10分間行い、肝ガス
を止め電源(電気エネルギ供給源)をOFFにし、水素
にて反応炉内を大気圧にした後、反応炉より基板を取り
出した。基板としては単結晶珪素基板上に熱酸化膜を1
000人の厚さに形成し、選択的に酸化珪素を残せしめ
、珪素を一部において露呈させたものを用いた。この時
単結晶珪素は5000人工ツチングすることができ、5
i02は100Å以下でほとんどエツチングされなかっ
た。本実施例のように、1115ガスを用いて酸化珪素
をほとんどエツチングすることなく珪素を所望の景プラ
ズマエツチングすることができた。
After that, 40W output was applied from the high frequency power supply (13), and the I
Plasma etching was performed for 10 minutes using IF gas, the liver gas was stopped, the power source (electrical energy supply source) was turned off, and the inside of the reactor was brought to atmospheric pressure with hydrogen, and then the substrate was taken out from the reactor. The substrate is a single crystal silicon substrate with one thermal oxide film.
The silicon oxide film was formed to a thickness of 1,000 mm thick, selectively leaving silicon oxide, and exposing the silicon in some parts. At this time, single crystal silicon can be artificially etched for 5,000 times, and
i02 was hardly etched at a thickness of 100 Å or less. As in this example, silicon could be plasma-etched to a desired extent using 1115 gas without etching much silicon oxide.

第1図に温度25℃の時のエツチング速度と印加電力の
関係を示す。
FIG. 1 shows the relationship between etching rate and applied power at a temperature of 25°C.

このように非晶質珪素(1)と単結晶珪素(2)のエツ
チング速度は、印加重力が0の時は0であるが、しかし
低出力側にピークを示す。また逆に5iOz (3)の
エツチング速度は印加重力がOの時は約900人/分の
速度を持ったが、電力を少しでも加えると殆どエツチン
グされなくなる。
As described above, the etching rates of amorphous silicon (1) and single crystal silicon (2) are 0 when the applied force is 0, but show a peak on the low output side. On the other hand, the etching speed of 5iOz (3) was about 900 people/min when the applied load was O, but when even a small amount of electric power was applied, the etching rate was almost no longer etched.

また第2図に示されるように、エツチング温度を上げて
ゆくに従って、非晶質珪素(1’>、単結晶珪素(2′
)はエツチング速度は減少する。逆にSiOユ(3゛)
は高温になるに従い若干速度が増すが、エツチング速度
の絶対値は小さかった。
Furthermore, as shown in Figure 2, as the etching temperature is increased, amorphous silicon (1'>) and single crystal silicon (2'
), the etching speed decreases. On the contrary, SiOyu (3゛)
The etching speed increased slightly as the temperature increased, but the absolute value of the etching speed was small.

このように25℃、IOWの条件下で非晶質珪素または
単結晶珪素と5iOLの選択比は100以上という大き
い値が得られた。
As described above, under the conditions of 25° C. and IOW, the selectivity ratio between amorphous silicon or single crystal silicon and 5iOL was as large as 100 or more.

さらに珪素表面を観察した結果、その表面は鏡面を有し
、炭素等の残存物が全く見られなかった。
Furthermore, as a result of observing the silicon surface, it was found that the surface had a mirror surface and no residual substances such as carbon were observed.

以上の説明のごとく、本発明方法は純度99%以上の肝
を用いているため、プラズマ・エッチをした後、炭素、
塩素、臭素が残存物としてエッチされた表面に残ること
はない。
As explained above, since the method of the present invention uses liver with a purity of 99% or more, after plasma etching, carbon
No chlorine or bromine residue remains on the etched surface.

このため、VLSI (超集積化回路)工程においても
、またアモルファス半導体を用いた半導体装置の作製に
おいても、為信頼性を有せしめることが可能となった。
For this reason, it has become possible to ensure reliability both in the VLSI (ultra integrated circuit) process and in the fabrication of semiconductor devices using amorphous semiconductors.

また、HF中に酸素または酸化物気体の混入により、ま
たプラズマエッチの後酸化物が混入していると、酸化珪
素が形成され、プラズマエッチのマスク材料として作用
し、エツチング表面がきわめて凹凸を有してしまった。
Additionally, if oxygen or oxide gases are mixed into HF, or if oxides are mixed in after plasma etching, silicon oxide is formed and acts as a mask material for plasma etching, making the etching surface extremely uneven. have done.

このため、l(F純度が99%以上を有すること、また
は後工程において非酸素化物を導入することはかかる局
部的な酸化珪素を作ることを防ぐために特に重要であっ
た。
For this reason, it was particularly important to have a 1(F purity of 99% or higher) or to introduce non-oxygenates in the post-process to prevent the formation of such local silicon oxides.

また、CF Br等の炭化弗化物はその弗素ラジカル(
CFラジカルともいわれている)の寿命がきわめて長い
。このため排気ポンプ(第3図(11) )のオイルを
劣化させて精度が低下し、真空引きを不可能にしてしま
うという欠点を有する。他方、本発明方法の)IFを用
いた場合はオイルの精度低下が100時間使用してもま
った(見られないという他の特長を有する。
In addition, carbide fluorides such as CF Br have their fluorine radicals (
(also called CF radical) has an extremely long lifespan. This has the disadvantage that the oil in the exhaust pump (FIG. 3 (11)) deteriorates, reducing accuracy and making vacuuming impossible. On the other hand, when using the IF (method of the present invention), another feature is that the deterioration in oil accuracy is not observed even after 100 hours of use.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はI11’ガスプラズマエツチングの25℃にお
けるエツチング速度と印加電力の関係を示す。 第2図は肝ガスプラズマエツチングのプラズマ電力10
Wでのエツチング速度と温度との関係を示す。 第3図は本発明に用いられたプラズマエツチング装置の
概要を示す。 特許出願人 株式会社半導体エネルギー研究所 代表者 山 崎 舜 平 印加t1:l(w) 誠11刃 0 100 200 温戊 (°C)
FIG. 1 shows the relationship between etching rate and applied power at 25° C. for I11' gas plasma etching. Figure 2 shows plasma power 10 for liver gas plasma etching.
The relationship between etching rate and temperature in W is shown. FIG. 3 shows an outline of the plasma etching apparatus used in the present invention. Patent applicant: Semiconductor Energy Research Institute, Inc. Representative: Shun Yamazaki Applied t1:l(w) Makoto 11blade 0 100 200 Warm (°C)

Claims (1)

【特許請求の範囲】 1、珪素または炭化珪素を主成分とする半導体を弗化水
素気体を用いてプラズマ・エツチングを行う際において
、プラズマ発生用の電気エネルギの供給の前工程または
該エネルギの供給停止後に水素、窒素、アルゴンおよび
ヘリューム等の不活性気体を導入することを特徴とする
半導体エツチング後法。 2、特許請求の範囲第1項において、弗化水素気体は9
9%以上の純度を有することを特徴とする半導体エツチ
ング方法。 3、特許請求の範囲第1項において、プラズマ発生用の
電気エネルギの供給停止後、水素、窒素、アルゴンおよ
びヘリューム等の不活性気体を導入して大気圧とするこ
とを特徴とする半導体エツチング方法。
[Claims] 1. In plasma etching a semiconductor whose main component is silicon or silicon carbide using hydrogen fluoride gas, a pre-process of supplying electrical energy for plasma generation or supplying said energy A post-semiconductor etching method characterized by introducing an inert gas such as hydrogen, nitrogen, argon or helium after stopping. 2. In claim 1, hydrogen fluoride gas is 9
A semiconductor etching method characterized by having a purity of 9% or more. 3. A semiconductor etching method according to claim 1, characterized in that after stopping the supply of electrical energy for plasma generation, an inert gas such as hydrogen, nitrogen, argon, helium, etc. is introduced to bring the etching pressure to atmospheric pressure. .
JP21743083A 1983-11-18 1983-11-18 Etching method of semiconductor Pending JPS60110122A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21743083A JPS60110122A (en) 1983-11-18 1983-11-18 Etching method of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21743083A JPS60110122A (en) 1983-11-18 1983-11-18 Etching method of semiconductor

Publications (1)

Publication Number Publication Date
JPS60110122A true JPS60110122A (en) 1985-06-15

Family

ID=16704090

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21743083A Pending JPS60110122A (en) 1983-11-18 1983-11-18 Etching method of semiconductor

Country Status (1)

Country Link
JP (1) JPS60110122A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022230118A1 (en) * 2021-04-28 2022-11-03

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022230118A1 (en) * 2021-04-28 2022-11-03
WO2022230118A1 (en) * 2021-04-28 2022-11-03 東京エレクトロン株式会社 Etching method

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