JPS60103923U - Muting circuit - Google Patents

Muting circuit

Info

Publication number
JPS60103923U
JPS60103923U JP19669283U JP19669283U JPS60103923U JP S60103923 U JPS60103923 U JP S60103923U JP 19669283 U JP19669283 U JP 19669283U JP 19669283 U JP19669283 U JP 19669283U JP S60103923 U JPS60103923 U JP S60103923U
Authority
JP
Japan
Prior art keywords
muting
inverting amplifier
input terminal
inverting
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19669283U
Other languages
Japanese (ja)
Inventor
黒田 洋
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP19669283U priority Critical patent/JPS60103923U/en
Publication of JPS60103923U publication Critical patent/JPS60103923U/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面はこの考案のミューティング回路の1実施例を示し
、第1図はブロック図、第2図は第1図の詳細な結線図
、第3図a、 bは時間と電源電流、電源電圧との関係
説明図である。 1・・・テープレコーダ、2・・・パワーアンプ内蔵型
スピーカ装置、3・・・電源プラグ、4・・・電源トラ
ンス、5・・・整流器、6・・・安定化回路、7・・・
安定化基準電源、8・・・インピーダンス素子、9・・
・比較回路、10・・・検出部、11・・・出力ミュー
ト部、121.12r・・・パワーアンプ、131,1
3r・・・スピーカ、lcl・・・反転増幅器、IC2
・・・非反転増幅器、Ql、 Q2・・・ミューティン
グ用第1、第2トランジスタ、π・・・ツェナダイオー
ド、R1・・・第1抵抗。
The drawings show one embodiment of the muting circuit of this invention. Fig. 1 is a block diagram, Fig. 2 is a detailed wiring diagram of Fig. 1, and Fig. 3 a and b are diagrams showing time, power supply current, power supply voltage, and FIG. DESCRIPTION OF SYMBOLS 1... Tape recorder, 2... Power amplifier built-in speaker device, 3... Power plug, 4... Power transformer, 5... Rectifier, 6... Stabilization circuit, 7...
Stabilized reference power supply, 8... Impedance element, 9...
-Comparison circuit, 10...detection section, 11...output mute section, 121.12r...power amplifier, 131,1
3r...Speaker, lcl...Inverting amplifier, IC2
... Non-inverting amplifier, Ql, Q2... First and second transistors for muting, π... Zener diode, R1... First resistor.

Claims (1)

【実用新案登録請求の範囲】 ■ 音響機器への電源供給ラインに設けられたインピー
ダンス素子と、該インピーダンス素子を流れる電流値の
変化を検出する検出部と、′該検出部の検出信号により
前記電流値の変化時に前記音響機器の出力信号をミュー
ティングする出力ミュート部とを備えたミューティング
回路。 ■ 検出部を反転増幅器および非反転増幅器により形成
するとともに、出力ミュート部をミューティング用トラ
ンジスタにより形成し、かつ、前記反転増幅器の非反転
入力端子および前記非反転増幅器の反転入力端子に安定
化電圧を印加するとともに、インピーダンス素子を形成
する抵抗素子の音響機器側の一端に前記反転増幅器の反
転入力端子および前記非反転増幅器の非反転入力端子を
接続し、前記両増幅器の出力信号により前記ミューティ
ング用トランジスタをオン、オフして音響機器の出力信
号をミューティソゲするようにした実用新案登録請求の
範囲第1項に記載のミューティング回路。
[Claims for Utility Model Registration] ■ An impedance element provided in the power supply line to the audio equipment, a detection unit that detects a change in the value of the current flowing through the impedance element, and a detection signal from the detection unit that detects the current A muting circuit comprising: an output muting section that mutes an output signal of the audio device when a value changes. ■ The detection section is formed by an inverting amplifier and a non-inverting amplifier, and the output muting section is formed by a muting transistor, and a stabilizing voltage is applied to the non-inverting input terminal of the inverting amplifier and the inverting input terminal of the non-inverting amplifier. At the same time, the inverting input terminal of the inverting amplifier and the non-inverting input terminal of the non-inverting amplifier are connected to one end of the resistance element forming the impedance element on the audio equipment side, and the muting is performed by the output signals of both the amplifiers. 2. A muting circuit according to claim 1, which mutes an output signal of an audio device by turning on and off a transistor.
JP19669283U 1983-12-20 1983-12-20 Muting circuit Pending JPS60103923U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19669283U JPS60103923U (en) 1983-12-20 1983-12-20 Muting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19669283U JPS60103923U (en) 1983-12-20 1983-12-20 Muting circuit

Publications (1)

Publication Number Publication Date
JPS60103923U true JPS60103923U (en) 1985-07-16

Family

ID=30421847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19669283U Pending JPS60103923U (en) 1983-12-20 1983-12-20 Muting circuit

Country Status (1)

Country Link
JP (1) JPS60103923U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080305A (en) * 1983-10-09 1985-05-08 Rohm Co Ltd Sound signal processing circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080305A (en) * 1983-10-09 1985-05-08 Rohm Co Ltd Sound signal processing circuit

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