JPS60103781A - Modulator for video signal - Google Patents

Abstract

PURPOSE:To obtain an accurate and stabilized modulation degree by comparing the demodulation level at the time of changing the prescribed characteristics of a carrier and the demodulation level during the synchronizing signal period and controlling the modulation degree in the prescribed period except the synchronizing signal period. CONSTITUTION:In the prescribed period except a synchronizing signal period, a signal is outputted from an error detection circuit 12 in accordance with the difference between the output level of the demodulatin means at the time of changing the prescribed characteristics of a carrier wave by the prescribed ratio, and the output level of the demodulation means in the synchronizing signal period. This output signal is supplied to a modulation-degree control circuit 13, and is controlled so that the modulation degree of a video modulation circuit 2 will be the constant prescribed value.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a modulation device, and in particular to a modulation device for video signals.

A device as shown in FIG. 1 is known as a modulation device for video signals. In FIG. 1, a video signal is supplied to a low-pass filter/DC clamp circuit 1, which removes high frequency noise components and reproduces the DC component.

The video signal output from the low-pass filter/DC clamp circuit 1 is supplied to a video modulation circuit 2. The video modulation circuit 2 changes the amplitude of a carrier wave of a predetermined frequency by using a signal obtained by dividing a video signal by a voltage dividing circuit formed by, for example, a volume 2a as a modulation signal, and changes the amplitude of a carrier wave of a predetermined frequency to a degree of modulation determined by the volume 2a. The configuration is such that the modulation degree indicator meter 2b is driven accordingly. The video signal is amplitude-modulated from the video Δ modulation circuit 2, and an AM-multiplied signal obtained by lq is outputted, which is supplied to the vestigial sideband filter 3. The residual sidewave 4tY filter 3 receives the supplied A M
(From a frequency 1.251vlHz lower than the frequency fa of the carrier wave of the M number to 4.5fvll-lz lower than this frequency fc
It has frequency characteristics such that only components within a range of high frequencies are selectively passed. The output of the vestigial sideband filter 3 is supplied to a phase equalizer 4, subjected to phase correction to match and linearize the phase characteristics of the transmitting side and the receiving side, and then supplied to the frequency converter 5.

In the frequency converter 5, the phase-corrected AM signal is mixed with a local signal output from the local oscillator 6 and converted into a predetermined television broadcast channel signal.

In the above configuration, deviations in the degree of modulation tend to occur due to fluctuations in the video I@ level, power supply voltage fluctuations, temperature changes, and the like. Since the modulation degree is set by manual operation of the volume 2a of the video modulation circuit 2, it is necessary to manually correct the deviation in the modulation degree. Furthermore, since the modulation degree indicating meter 2b that indicates the degree of modulation is generally inaccurate, in order to set the degree of modulation accurately, it is necessary to use a level replacement method using a spectrum analyzer, attenuator, etc. There was a drawback in that the modulation device required frequent adjustment, which took an hour.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a video signal modulation device that can eliminate deviations in modulation degree.

A modulation device for video output 71 +nn output according to the present invention includes a modulation means for receiving a video signal and using the video signal as a modulation signal to change a predetermined characteristic of a carrier wave with a degree of modulation according to a control signal, and an output of the modulation means. demodulating means for demodulating a video signal, the level of the output of the demodulating means and the synchronizing signal period when a predetermined characteristic of the carrier wave in the output of the modulating means is changed at a predetermined ratio during a predetermined period other than the synchronizing signal period. A control signal is generated in accordance with the difference between the level of the output of the demodulating means at J3, and the degree of modulation is
'It is configured to control.

Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 2 to 6.

In FIG. 2, a low-pass filter/DC clamp circuit 1, a video modulation circuit 2, a vestigial sideband filter 3, and a phase equalizer 4 (connected in the same way as the device in FIG. 1. However, in this example, The output of the phase equalizer 4 is supplied to a frequency converter 5 via a brancher 7 and is also supplied to a level switching circuit 8.The level switching circuit 8 is supplied with switching pulses from a timing signal generation circuit 9. .

The level switching circuit 8 includes, for example, a resistive attenuator that attenuates an input signal with a predetermined amount of attenuation, and a signal switching circuit that selectively outputs either the pano signal or the output of the resistive attenuator using a switching pulse. It consists of

The output of this level switching circuit 8 is supplied to a video detection circuit 10 consisting of an A fvl detector or the like. The video signal is detected by the video detection circuit 10 and the synchronization separation circuit 11
and is supplied to the error detection circuit 12. Synchronous separation circuit 11
The synchronizing signal is separated from the video signal and supplied to the timing signal generating circuit 9. The timing signal generation circuit 9 detects the vertical synchronization signal and the horizontal synchronization signal forming the synchronization signal, and detects the switching pulse that occurs when the horizontal synchronization signal is not present and the presence of this switching pulse during the vertical blanking period. The configuration is such that it outputs a sample pulse Δ which occurs at the same time and has a time width shorter than the time width of the switching pulse, and a sample pulse B which occurs when a horizontal synchronization signal is present. Output from this timing signal generation circuit 9]
The sample pulses Δ and B thus obtained are supplied to the error detection circuit 12. The error detection circuit 12 holds the instantaneous levels of the video signals supplied by sample pulses Δ and B, and outputs a signal corresponding to the difference between the instantaneous levels of the video signals at the time these sample pulses A and B occur. It is configured as follows. The output signal of the error detection circuit 12 is supplied to the modulation degree controller 1 and the roll circuit 13. The modulation degree control circuit 13 is formed of a variable resistor whose resistance value changes depending on the output of the error detection circuit 12, for example, and is connected to the video modulation circuit 2 by a voltage dividing circuit that divides the incoming J signal. connected to form a part.

In the above configuration, the synchronization separation circuit 11 outputs a synchronization signal as shown in FIG. 3 (Δ) during the vertical blanking period. In other words, the timing signal generation circuit 9 generates the first signal in which there is no horizontal synchronizing pulse within the vertical blanking period.
A switching pulse that exists for a predetermined period of time is output as shown in FIG. At the same time, a sample pulse A that exists for a second predetermined time period shorter than the first predetermined time period is outputted as shown in FIG. Also, the same figure (D
The sample pulse B is output over a third predetermined time within the existence time of the horizontal synchronizing pulse as shown in . These synchronization signals, switching pulses, sample pulses 8 and B are shown in Figure 4 (
In the case shown in A) to (D) of the same figure, the output of the video modulation circuit 2 becomes as shown in (E) of the same figure.

That is, during the first predetermined time T1 during which the switching pulse exists, the video modulation circuit 2
The signal level of the carrier component at the output of increases.

Here, when the modulation degree of this video modulation circuit 2 is a predetermined value, a level switching circuit is configured so that the levels of the envelope components of the output of the video modulation circuit 2 during the first predetermined time T1 and the third predetermined time T3 are equal. It is assumed that the signal attenuation m of the resistive attenuator at 8 is set. Then, the output of the video modulation circuit 2 becomes the vestigial sideband filter 3.
, is supplied to the video detection circuit 10 via the phase equalizer 4 and the level switching circuit 8, the envelope component is detected, and then supplied to the error detection circuit 12, so that the modulation degree of the video modulation circuit 2 reaches a predetermined value. Error detection circuit 1
2, no error is detected and the modulation degree of the video modulation circuit does not change. When the modulation degree of the video modulation circuit 2 changes due to fluctuations in the power supply voltage, etc., the output of the video modulation circuit 2 at the first predetermined time T+7J and the third predetermined time T3 is 1.
Differences occur between the levels of the complex components. Then,
In the error detection circuit 12, the envelope component of the output of the video modulation circuit 2, that is, the video signal, is held by the sample pulses A and B, and an IC signal is outputted according to the difference corresponding to the change in the degree of modulation. The output of the error detection circuit 12 controls the modulation degree of the video modulation circuit 2 to be constant at a predetermined value.

FIG. 5 is a specific circuit diagram of the level switching circuit 8, in which the output of the phase equalizer 4 is supplied via a branching device 20 to a variable resistance attenuator 21 and a resistance attenuator 22 consisting of resistors R1 to R3. 1 in transformers T1 and T2 after being attenuated
are applied to the next windings L+ and L2, respectively. One ends of the secondary windings L3 and L4 of the transformer T+ are connected to each other via a capacitor C1. A series connection circuit consisting of resistors R4 and R5 is connected in parallel to the capacitor C1. The cathodes of rectifying diodes D1 and D2 are connected to the other ends of the secondary windings L3 and L4, respectively.

On the other hand, one ends of the secondary windings L5 and L6 of the transformer T2 are connected to each other via a capacitor C2. A series connection circuit consisting of resistors R6 and R7 is connected in parallel to the capacitor C2. The cathodes of rectifying diodes D3 and D4 are connected to the other ends of the secondary windings L5 and L6, respectively.

Each anode of diodes D1 and D2 and diode D3
and D4 are connected to each other. Between the connection point of these diodes D1 and D3 and the connection point of diodes D2 and D'4, one of the transformers T3 is connected.
Secondary windings L7 and L8 are connected in series. Primary winding L
A capacitor C3 and a resistor R8 are connected in parallel between the series connection point of 7 and L8 and ground. Also, this primary winding L
Noise prevention coil 1- is connected to the series connection point of 7 and L8.
9 and a resistor R9.

Further, the power supply VCC is supplied to the output of the open collector buffer gate G via the coil L9 and the resistor R1G. A switching pulse is supplied to the input terminal of the buffer gate G. The output of this buffer gate G is supplied via a resistor Rn to each series connection point of resistors R4 and R5 and resistors R6 and R7.

One end of the secondary winding L+o of the transformer T3 is grounded. The signal led out to the other end of the secondary winding L+o is attenuated by a resistance attenuator 23 made up of resistors R12 to R14, and then becomes the output of the level switching circuit 8. In addition, coil L
Decoupling capacitors C4 and C5 are connected between the ground and one end to which the power supply VCC is not directly applied.

In the above configuration, when there is no switching pulse, the output of the buffer gate G becomes a low level, and the transformer T1
Current is supplied to the primary windings L2 and L8 of the transformer 3 by the voltage induced at the other ends of the secondary windings L3 and L4. When the switching pulse is present, the output of the buffer gate G goes high and the secondary winding L5. of the transformer T2.
The voltage induced at the other end of transformer T3's primary winding L7. Current is supplied to La. Therefore, when there is no switching pulse, a signal is outputted to the other end of the secondary winding L10 of the transformer T3 according to the output of the phase etc. 4 attenuated by the variable resistance attenuator 21, and then resistance attenuated. 23 and then the output of the level switching circuit 8. Further, when a switching pulse exists, a signal corresponding to the output of the phase equalizer 4 attenuated by the resistive attenuator 22 is led out to the other end of the secondary winding L+o of the transformer T3, and then passed through the resistive attenuator 23 to the level This becomes the output of the switching circuit 8.

FIG. 6 is a specific circuit diagram of the error detection circuit 12, in which the video signal output from the video detection circuit 10 is transmitted to the resistor RI5.
1R16 through each of the analog switches 25 and 26
(7) Input f44 is supplied to the child. The control input terminals of analog switches 25 and 26 are supplied with sample pulse A.
and B are supplied, respectively. Apgo” Guswitch 25
．． 26 is constructed so that when a non-pulse pulse and B are generated, each becomes A. Hold capacitors C6 and C7 are connected between each output terminal of these analog switches 25 and 26 and ground, respectively.

The terminal voltage of the capacitors C6 and C7 is supplied to the differential amplifier 29 via buffer amplifiers 27 and 28, which are operational amplifiers connected to form a low voltage lower. In the differential amplifier 29, the outputs of the buffer amplifiers 27 and 28 are supplied to the negative input terminal and positive input terminal of the operational amplifier 3o via resistors RI7 and R+s, respectively. A feedback resistor R+s and a capacitor c8 are connected in parallel between the negative input terminal and the output terminal of the operational amplifier 30. A resistor R211/J< is connected between the positive input terminal of the operational amplifier 3o and the slider of the volume VR.

The resistor of the volume VR is connected in series with the resistor Ru between the power supply and ground.

In the above configuration, a voltage corresponding to the instantaneous level of the video signal at the time of generation of sample pulses A and B is derived to each output terminal of the analog switches 25 and 26. Therefore, when these sample pulses △ and B are generated, a voltage corresponding to the instantaneous level of the video signal is applied to the capacitor C.
6 and C7, and is supplied to the differential amplifier 29 via buffer amplifiers 27 and 28. As a result.

Sample pulses A and B are output from the output terminal of the operational amplifier 30.
A signal corresponding to the difference between the instantaneous levels of the video signal at the time of occurrence of is output from the error detection circuit 12. In the above embodiment, the switching pulse [well, the equivalent value during the vertical blanking period] is output from the error detection circuit 12. It is assumed that the leak occurs approximately at the center of the period corresponding to the 10th 1st and 272nd 0th horizontal scanning line from the start of the vertical synchronizing pulse in the first field during the horizontal scanning period following the period in which the pulse exists. However, the switching pulse is A
P L (Average picture L ev
(el) That is, the brightness may be generated at any timing within the period in which the brightness is always constant.

As described above in detail, the video 7I signal modulation device according to the present invention has a difference between the level of the demodulated signal obtained when the predetermined characteristic of the carrier wave is avoided in a predetermined period other than the synchronization signal period and the synchronization signal period by J-3. Since the modulation depth is determined by comparing the level of the demodulated signal with the level of the demodulated signal, it is possible to detect and correct minute fluctuations in the modulation depth, making it possible to adjust the modulation depth extremely accurately. And it can be made stable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional video signal modulation device, and FIG. 2 is a block diagram showing an embodiment of a conventional video signal modulation device.
3 and 4 are waveform diagrams showing the operation of the device in FIG. 2, and FIG. 5 is a level switching circuit 8 in the device in FIG. 2.
FIG. 6 is a specific circuit example diagram of the error detection circuit 12 that is applied to the apparatus shown in FIG. ...Timing signal generation circuit 10...
・Video detection circuit 11... Synchronization separation circuit 12... Error detection circuit 13... Modulation degree control circuit Applicant Pioneer Co., Ltd. Agent Patent attorney ± Motohiko Ibun (external 1) given name)

Claims (1)

[Claims] a modulator for receiving a video signal and using the video signal as a modulation signal to change a predetermined characteristic of a carrier wave with a degree of modulation according to a control signal; a demodulator for demodulating the video signal from the output of the modulator; characteristic changing means for changing the predetermined characteristic of the carrier wave in the output of the modulating means at a predetermined ratio during a predetermined period other than the signal synchronization signal period; 1. A video signal modulation device comprising: control signal generating means for generating the control signal according to a difference between the level of the signal and the level that increases during a synchronization signal period.