JPS5999978A - Starting control system for dc motor - Google Patents

Abstract

PURPOSE:To reduce the capacity of a power source by displacing the arriving time of a DC motor start signal to each device. CONSTITUTION:When access requests for floppy disk drives FDD5-FDD8 are generated from an exterior, a CPU1 sets a start command signal to a latch circuit 4. Thus, the latch circuit 4 outputs an ON signal ON5 of the FDD5 to turn ON the motor of the FDD5, thereby starting the FDD5. A CPU1 waits for the lapse of a time T by a programmable timer 3 and then outputs a start command signal of the next FDD. In this manner, the peak current under the starting condition can be dispersed, and the capacity of a power source can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a DC motor startup control system in a configuration in which a plurality of devices driven by DC motors are connected to a central processing unit.

[Technical background of the invention]

In devices that use a direct current (DC) motor, such as Fronbie Disk R Live (hereinafter abbreviated as PDD),
A) The peak current value of the motor is 1 of the steady current value.
．． It becomes 5 to 2 times. Therefore, the longer this peak current flows, the more a large-capacity power supply with a human-sized capacitor is required to flow this peak current.

[Problems with background technology]

By the way, for example, in a device configuration that includes two or more FDDs, the motor peak current value when these FDDs are started at the same time will be very large, and therefore the capacitance of the peak current supply capacitor provided in the power supply will be very large. This has become a problem as it takes up installation space and increases the cost of the power supply.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above drawbacks, an object of the present invention is to provide a DC motor startup control method in which the capacity of a power source for supplying electric power to a DC motor is small and inexpensive in a system having a plurality of DC motor drive devices. It is in.

[Summary of the invention]

According to the present invention, when a plurality of DC motor drive devices are driven by a central processing unit, by shifting the arrival time of the DC motor start signal to each device, the peak current at the time of -C start is dispersed, and the peak current value is This reduces the power supply capacity by suppressing the increase in .

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a system to which the DC motor starting control method of the present invention is applied.

A ROM (LiP only memory) 2 that stores a program that instructs the operation of the CPU 1 and a timer (programmer sol timer) 3 that counts a set time are connected to the common path of the CPU, and also holds the FDD motor ON signal. A launch circuit 4 is connected thereto. FDDs 5 to 8 are connected to this latch circuit 4, and these FDDs
Electric power for driving the T''DD motor is supplied to DDD from a power source 9.

Next, the operation of this embodiment will be explained. FD from outside
When an access request for D 5 to F I) D 8 occurs, CI) Ul sets a start command signal to the latch circuit 4, and as a result, the launch circuit 4 outputs the ON signal ON5 of FDD 5 and F D f) Turn on the motor (DC motor) in step 5 and start this FDI. By the way, the peak current flows for one hour when one FDD motor is powered on. Therefore, this time T is set in the programmable timer 3, and the CPU waits for the time T of the programmable timer 3 to elapse before outputting the next FDD activation command signal. That is, after T time has elapsed, a start command signal for the CPU FD 6 is set in the latch circuit 4. The latch circuit 4 sends a motor on signal O signal N6 to the FDD 6 to turn on the motor of the FDD 6. After that, repeat the same operation and turn on the motors of FDD7 and FDD8 one after another after shifting by T time and turn on all F'
Start DD.

Figure 2 shows the motor peak current values when FDDs 5 to 8 are started one after another at different times according to the above embodiment, and when four FDDs are started using the conventional method shown in Figure 3 for reference. It can be seen that the peak current value in this example is clearly smaller than the motor peak current value that flows when both are turned on at the same time.

According to this embodiment, the motor drive signals ON5 to ON8 are output to FDD5 to FDD8 one after another via the latch circuit 4 every CPU time T.
The motors of D8 are turned on at intervals shown in Figure 2, and the motor peak current value is made stepwise, making it possible to significantly reduce this peak current value compared to the conventional case where four motors are turned on at the same time. By reducing the capacitance of a peak current supply capacitor (not shown) that is provided for the power supply R9, the power supply capacity can be reduced, and the power supply can be made inexpensive.

In the above embodiment, the startup time difference of FDDs 5 to 8 is determined by spacing the startup command signals from the CPU 1 by the programmable timer 3, but if an external signal delay means such as a monostable is provided, Even if the motor outputs motor-on commands to all FDDs at the same time, the signal delay means takes the time difference between the motor-on commands and can start each FDD at different times. Further, in the above embodiment, the tin portion using four FDDs has been described, but any number of FDDs may be used. Also, each FDI
') The motor power-on time difference does not have to be at equal intervals.

〔Effect of the invention〕

As described below-12, starting t4i of the DC motor of the present invention
! According to the 1?1l11 method, by sequentially turning on the DC motors of a plurality of devices at intervals, the capacity of the power source that supplies power to each DC motor can be reduced and the cost can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of a system to which the DC motor start control method of the present invention is applied, Fig. 2 is a characteristic diagram of the motor peak current value according to the embodiment shown in Fig. 1, and Fig. 3 The figure is a peak current characteristic diagram when a plurality of F l) I) motors are turned on using a conventional method. 1... CPTJ 2... R, OM 3... Timer 4... Latch circuit 5-8... FDD 9.
··power supply. Agent Patent Attorney Noriyuki Chika (and 1 other person) 7-・Bin---417- Min・Pi

Claims (4)

[Claims] (1) In a system having a configuration of a central processing unit and a plurality of DC motor-driven devices controlled by the central processing unit, when the central processing unit starts up the plurality of devices, each device A DC motor start control method characterized by outputting a DC motor start signal to each device at predetermined time intervals. (2) The first aspect of the present invention is characterized in that it includes a timer in which a predetermined period of time is set, and that the central processing unit outputs a DC motor start signal to each of the devices each time the timer counts the predetermined period of time. Direct current motor start control method described in section. (3) a signal delay means is provided for each of the plurality of devices;
Claim 1, characterized in that the DC motor starting signal outputted from the central processing 'AM is outputted to each device at predetermined time intervals via the signal delay means.
Direct current motor start control method described in section. (4) The DC motor according to Claims 1, 2, and 3, wherein the predetermined time is set to be longer than the time during which a peak current flows when starting the DC motor of each device. Upper control system.