JPS5999920A - Digital protecting relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital protection relay that is applied to a power system and has an improved analog input circuit for detecting faults.

Conventionally, as a circuit of this type, there has been an analog input circuit for a digital protective relay shown in FIG. In the figure, 1a to 1h are filters for removing noise wave forming components that are inconvenient for relay determination, and 2a to 2h are filters 1a to 1h, respectively.
3 is an AD conversion circuit, and 4 is a multiplexer for selecting the input of the AD conversion circuit. Also,
A to P indicate analog input signals, and p indicates a digital output signal. These analog input signals a through level convert various status signals of each system such as detection transformer PT and detection current transformer CT arranged in the power system, perform current/voltage conversion,
It is introduced after undergoing waveform shaping.

Next, the operation will be explained. The voltage or current waveform introduced from the grid contains DC components and harmonic components, and these can falsify the results of accident determination, so each filter 1a to 1h is
Only the necessary components are extracted and held on all channels simultaneously by the corresponding sample hold circuits 2a to 2h, and the previous voltage level is maintained at the output of each sample hold circuit 2a to 2h for a certain period of time. The multiplexer 4 sequentially scans each of these channels and connects them to the AD conversion circuit 3. The series of operations begins with the sample-and-hold circuits 2a to 2h in a hold state, and each channel is connected to the AD converter 3 according to sequential time-division scanning, and all channels are time-divisionally converted into digital signals. Ends at this point.

Since the conventional circuit is constructed as described above, as the number of multi-channel inputs increases, the number of filters and sample-and-hold circuits must correspond to the corresponding number of channels, which clearly results in an increase in the number of components. In addition, each filter and sample/hold circuit often needs to be equipped with offset adjustment and gain adjustment circuits depending on the magnitude of the input analog signal for characteristic management purposes. There were drawbacks such as the need to provide duplicates.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by sharing the operational amplifier in the sample and hold circuit and the operational amplifier for the filter,
The object of the present invention is to provide a digital protective relay having an analog input circuit, which achieves low cost, space saving, and improved reliability by reducing the number of parts and eliminating redundant adjustment functions.

Embodiments of the present invention will be described below with reference to the drawings.

Figure 2 (d) is an input circuit configuration diagram applied to a digital protective relay according to an embodiment of the present invention, and the same reference numerals as in Figure 1 indicate the same or corresponding parts, so the explanation will be omitted. In Fig. 2, there is a filter/sample/hold circuit (hereinafter abbreviated as FSH circuit) that integrates a 5fd filter circuit and a sample/hold circuit, 4 is a multiplexer/multiplexer, and 3 is an AD conversion circuit.F S Hl There are three types of circuits: low-pass type, high-pass type, and bandpass type.
Specific configuration examples of the FSHN path are shown in FIGS. 3, 4, and 5, respectively, and further, a specific configuration example of the filter circuit provided in the FSH circuit 5 is shown in FIG.

Before explaining the operation of the present invention, the sample and hold circuit 10 will be explained based on FIG. In the same figure, 15.16
17 is an operational amplifier, 17 is a switch, 18 is a hold capacitor, 19 is an input terminal, 20 is an output terminal, and 21 is a control signal input terminal (hereinafter abbreviated as S/H terminal) for controlling the opening and closing of the switch 17.

Now, when a control signal is applied to this S/I (terminal), the switch 17 is closed, so the sample and hold circuit 10 is connected in series with two stages of difollowers, and it appears from the outside as a non-inverting operational amplifier, and the hold The capacitor 18 has the same potential as the input terminal 19 and the output terminal 20. On the other hand, when the control signal is released and the switch 17 is opened, the potential of the hold capacitor 18 is applied to the input of the operational amplifier 16, and the potential is the same as that of the input terminal 19 and the output terminal 20. 1 and 7 are held. Therefore, even if the potential of the input terminal 19 changes, the previous potential of the output terminal 20 is maintained as the potential of the hold capacitor 18.Hereinafter, the switch The state in which 17 is closed is called sampling mode, and the state in which it is open is called hold mode.

The common use of the operational amplifier in the sample hold circuit 10 and the operational amplifier of the filter circuit as described above will be explained. FIG. 3 shows the sample and hold circuit 10 described in FIG.
This is an example of a specific configuration of a low-pass filter 11 to which this is applied. 10 is a sample hold circuit, 22.23 is a filter resistor, and 24.

25 is a filter capacitor, 18 is a hold capacitor, 27 is an input terminal, and 28 is an output terminal.

In FIG. 3, when the sample and hold circuit 10 is viewed as a non-inverting connected operational amplifier, the relationship between the input terminal 27 and the output terminal 28 can be expressed by the following equation (1).

However, ■1 is the potential of input terminal 27, and ■2 is the potential of output terminal 2.
8, and S represents a variable expressed by ω, that is, “2π×frequency”. The relationship between the analog signal voltage V2 h and Vl shown in the above equation (1) when S is changed is
= Oa) When V2/Vl = 1, and when S-■, V2/Vl = O. Therefore, the filter 11 functions as a sample-and-hold circuit and realizes a second-order low-pass filter. That is, in the sampling mode, it operates as a 2.2-order low-pass filter. Further, equation (1) is the same equation as an active filter realized using a non-inverting amplifier, and this operation is well known. Further, when the hold mode is entered, the output is held at the t11 potential immediately before the mode switching, as described in the explanation of the sample and hold operation. Since this output fg is an output signal during filter operation in the sampling mode, the signal waveform of the analog input signal from which unnecessary components have been removed is held. Since the output impedance of the sample and hold circuit 10 is very small, the capacitor 24
The influence of the potential change of the input terminal 27 through the input terminal 27 can be ignored.

In hold mode, the feedback loop with capacitor 24 is opened, so resistors 22 and 23 and capacitor 2
The potential from which high frequencies have been removed by the low-pass primary filter 5 is applied to the sample hold 100 input terminal, and when switching to sampling mode from this state, 2
Although it changes to an order low-pass filter, the tracking time is extremely short, so there is no problem in terms of usage.

As described above, the operational amplifier of the sample-and-hold 10 can be used both as an operational amplifier for the active filter in the sampling mode and as an operational amplifier for the original sample-and-hold circuit in the hold mode.
It has been found that there is no problem in the functions of the two.

4 and 5 are examples of FSH circuits 12 and 13 applied to digital protective relays according to other embodiments of the present invention, and FIG. 4 shows a specific example of a high-pass filter. A circuit configuration diagram is shown, and FIG. 5 shows a specific circuit configuration diagram of a band-pass filter. Note that in these figures, the same reference numerals as in FIG. 3 indicate the same or corresponding parts, so a detailed explanation will be omitted. In the embodiment shown in FIG. 4, a high-pass filter is formed by filter resistors 22 and 23 and filter capacitors 24 and 25, and in the embodiment shown in FIG. 24 and 25 each act as an active filter together with the operational amplifier of the sample-and-hold circuit 10, similar to the embodiment of FIG.

As described above, according to the present invention, the filter circuit and the sample-and-hold circuit are integrated, and the operational amplifier of the filter circuit is no longer required, resulting in cost reduction and space saving, as well as improved reliability and low cost. In addition to reducing power consumption, the sample-and-hold circuit is connected in series with two stages of voltage followers in the sampling mode, resulting in an input circuit with extremely high input impedance. Since the value can be set high, the capacitor capacity can be reduced when the time constant of the resistive capacitor circuit is kept constant, which is advantageous in terms of cost and space.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an analog input circuit applied to a conventional digital relay, Fig. 2 is a circuit diagram of an analog input circuit applied to a digital relay according to an embodiment of the present invention, and Fig. 3 is the same. F'S applied to the example
4 and 5 are circuit diagrams of the H circuit, and FIGS. 4 and 5 show another F circuit diagram applied to a digital relay according to another embodiment of the present invention.
The circuit configuration diagram of the S H circuit is shown in Fig. 6 from Figs. 3 to 5.
2A and 2B each show a block diagram of a sample and hold circuit applied to the FSH circuit shown in the figure. 1a to 1h...filter circuit, 2a to 2h...
Sample and hold circuit, 3...Analog-digital converter, 4...Multiplexer, 5a~
5h...FSH circuit, 10...Sample hold circuit, 11...Low pass type FSH circuit, 1
2... High-pass type FSH circuit, 13... Band-pass type FSH circuit, 15.18... Operational amplifier, 1
7...Switch, 18.24.25...Capacitor, 22,23°26...Resistor. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Shin Kuzuno - (1 other person) No.
1 Figure 2 Written amendment to the procedure (voluntary) Commissioner of the Patent Office], matter f! Display of l Patent application 1982-208217
No. 2, Name of the invention Digital protective relay 3, Supplementary IL 1-Name of the person (601) Mitsubishi Electric Corporation Representative Hitoshi Katayama Department 4 Agent 5 Subject of amendment (1) Patent claims in the specification Scope Column (2) Detailed Description of the Invention Column 6 of the Specification, Contents of Amendment (1) Amend the claims as shown in the attached sheet. +21 In the 4th page of the specification, lines 1 to 2, the phrase ``Eli will share the operational amplifier for the filter with Eri'' is replaced with ``Eri will realize the function of the performance amplifier for the filter with Eri.'' ” he corrected. 7. List of attached documents A document stating the amended scope of patent claims 1 or more copies + 21 amended scope of claims Counting analog status signals via detection transformers, detection currents, etc. installed in the power system In a digital protective relay having an analog human power circuit for converting into a digital state signal after being scanned by a multiplexer, the analog state signal is introduced into the multiplexer through a filter/sample/hold circuit, and the filter/sample/hold 1 Kawaji is a digital protection relay characterized by having an operational amplifier function for an active filter in addition to an operational amplifier for a sample-and-hold circuit for simultaneous sampling.

Claims (1)

[Claims] In a digital protection relay having an analog input circuit for scanning a plurality of analog status signals with a multiplexer through a detection transformer, a detection current transformer, etc. arranged in the power system and then converting the analog status signals into digital status signals, the analog status signals are converted into digital status signals. A digital device that is introduced into the multiplexer via a filter sample and hold circuit, and in which the sample and hold circuit operational amplifier for simultaneous sampling is shared by the active filter operational amplifier. Protective relay.